CN108649534A - A kind of motor of electric motor car controller hardware protection circuit and method based on CPLD - Google Patents
A kind of motor of electric motor car controller hardware protection circuit and method based on CPLD Download PDFInfo
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- CN108649534A CN108649534A CN201810490271.8A CN201810490271A CN108649534A CN 108649534 A CN108649534 A CN 108649534A CN 201810490271 A CN201810490271 A CN 201810490271A CN 108649534 A CN108649534 A CN 108649534A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/08—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors
- H02H7/0822—Integrated protection, motor control centres
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
Abstract
The present invention is a kind of motor of electric motor car controller hardware protection circuit and method based on CPLD; including CPU, CPLD chip, signaling conversion circuit, fault-signal conversion circuit, CPLD output conversion circuits and other peripheral circuits; CPU is connected by signaling conversion circuit with CPLD chips; other peripheral circuits are connected by faulty change-over circuit with CPLD chips, other peripheral circuits are also connected directly with CPLD.It is an advantage of the invention that：Logical process is carried out to signal using CPLD chips, the response time is short, the summary responses in the driving wheel system failure；Watchdo functions are integrated into CPLD chips, part category and quantity is few, watchdog disabler rates are low；A part of cpu resource can be discharged with operations such as expansion switch amount signal processing and logical process.
Description
Technical field
The present invention relates to Motor Control Field more particularly to a kind of motor of electric motor car controller hardware guarantors based on CPLD
Protection circuit and method.
Background technology
Drive motor controller is one of component most crucial in electric vehicle, increasingly with domestic New-energy electric vehicle
Increase and be gradually introducing 26262 standards of European Union ISO, being related to security function relevant design for vehicle requires higher and higher, active
Safe design is industry development trend.Such as be abnormal suddenly when vehicle high-speed cruising, inverter is in high speed weak magnetic at this time
Operation is failed, and actively initiating three-phase shortcircuit protection at this time can make vehicle enter comparatively safe on-position, final safety
Parking.
Judge to be carried out by CPU software about state processing after the Collections such as overcurrent-overvoltage in conventional motors controller
Operation, response speed are executed all duration values by collection of simulant signal frequency and software code, and failure response time needs hundreds of micro-
Time second, then IGBT is still being worked normally during this, it is easy to failure or uncontrollable torque.
What the crash detection generally use of CPU was special in conventional motors controller feeds dog chip or discrete component progress
It builds, dedicated watchdog chips or discrete device, which are built, will bring additional cost and component failure probability to rise.
Traditional fault-signal logical process, indicator light processing and other on-off models are required for occupying the I/O port of CPU, cpu resource
Occupancy is high.
Invention content
Present invention mainly solves electric machine controllers in the prior art for fault-signal operation response time length, cost
Problem high, cpu resource occupancy is high, providing one kind can protect power conversion module, at low cost, cpu resource to occupy immediately
Rate low motor of electric motor car controller hardware protection circuit and method based on CPLD.
The technical solution adopted by the present invention to solve the technical problems is：A kind of motor of electric motor car control based on CPLD
Device hardware protection circuit, including CPU, CPLD chip, signaling conversion circuit, fault-signal conversion circuit, CPLD output conversion electricity
Road and other peripheral circuits, CPU are connected by signaling conversion circuit with CPLD chips, other peripheral circuits pass through Conversion fault electricity
Road is connected with CPLD chips, other peripheral circuits are also connected directly with CPLD.
In the present invention overcurrent, overvoltage, driving are managed while acquiring to the CPU pwm signals exported using CPLD chips
The signals such as failure carry out prime processing to the higher signal of failure priority；Using the nanosecond response time of CPLD to signal
The operations such as output pwm signal carries out three-phase shortcircuit, six phases are opened a way are directly controlled after carrying out logical process, power can be protected to turn immediately
Change the mold block.The functions such as watchdog, fault logic processing, indicating fault are integrated in a chip using CPLD chips, can be subtracted
Few number of devices simultaneously reduces crash rate caused by device, while reducing cost, release part cpu resource.
Scheme as a preference of the above scheme, the signaling conversion circuit include the letter of resistance R and capacitance C, CPU
Number output end is electrically connected with resistance R, and the resistance R other ends are electrically connected with the pin of capacitance C and CPLD chip respectively, and capacitance C is another
End ground connection.Signaling conversion circuit is used to convert the PWMX-T of CPU outputs, and PWMX-B signals, which are converted to, is input to CPLD chips
PWMF-XT, PWMF-XB signal, X can be U, V, W, i.e. motor three-phase.Signaling conversion circuit is equally used for other output letters of CPU
It number is converted to slow-speed of revolution signal speed1, high tach signal speed2, actively triggers three-phase shortcircuit signal CPLD-EN, overcurrent shape
State clear signal OC_Clear, overvoltage condition clear signal OV_Clear, feeding-dog signal SW-5KHz, crash state clear signal
Die_Clear and reset signal RST1, RST2.
Scheme as a preference of the above scheme, the fault-signal conversion circuit include input Fault-T,
Fault-B, magnetic bead FB3, FB4, resistance R62, R63, R64, R65, R66, R67, R68, R69, capacitance C91, C92, C104,
C105, C106, C107 and electrical level transferring chip U5, input Fault-T be electrically connected with magnetic bead FB3, the magnetic bead FB3 other ends respectively with
Resistance R63 and resistance R64 electrical connections, resistance R63 connect+5V power supplys, the resistance R64 other ends respectively with electrical level transferring chip U5 the
Seven pins are connected with capacitance C105 to be connected, and capacitance C105 other ends ground connection, input Fault-B is electrically connected with magnetic bead FB4, magnetic bead
The FB4 other ends are connected with resistance R62 and resistance R67 respectively, and resistance R62 connects+5V power supplys, the resistance R67 other ends respectively with level
The 6th pin of conversion chip U5 is connected with capacitance C104, battery C104 other ends ground connection, the 5th pipe of electrical level transferring chip U5
Foot is grounded, and the 8th pin connects+5V power supplys, and the 8th pin is connected to capacitance C91, another terminations of capacitance C91 with+5V power connection points
First pin on ground, electrical level transferring chip U5 connects+3.3V power supplys, and the first pin is connected to capacitance C92 with+3.3V power connection points,
The capacitance C92 other ends are grounded, and the second pin of electrical level transferring chip U5 is electrically connected with resistance R65, the resistance R65 other ends respectively with
The 37th pin electrical connection of resistance R68, capacitance C106 and CPLD chip, resistance R68 are grounded with the capacitance C106 other ends, electricity
The third pin of flat conversion chip U5 is electrically connected with resistance R66, the resistance R66 other ends respectively with resistance R69, capacitance C107 and
38th pin of CPLD chips is electrically connected, and resistance R69 is grounded with the capacitance C107 other ends, and the 4th of electrical level transferring chip U5 the
Pin is grounded.Fault-signal conversion circuit turns the upper bridge fault-signal Fault-T of driving and the lower bridge fault-signal Fault-B of driving
CPLD-T and CPLD-B signals are changed to, CPLD chips are input to.
As a kind of preferred embodiment of said program, the 94th to the 99th pin of the CPLD chips, the
14 to the 22nd pin is electrically connected with signaling conversion circuit all the way respectively, the first to the 4th pin of CPLD chips, and the 8th
19 pins, the 91st pin and the 100th pin receive overcurrent and over-pressed signal respectively, the 5th pin to the 9th pin, the
11 pins, the 20th three-prong, the 68th to the 70th outside output signal of three-prong.68th to the 73rd pipe
The outside output pwm signal of foot, the 5th pin to the 9th pin, the 11st pin, the 20th three-prong output status signal and multiple
Position signal.
The motor of electric motor car controller hardware guard method based on CPLD that the present invention also provides a kind of, using claim
Motor of electric motor car controller hardware described in 1 or 2 or 3 or 4 protects circuit, includes the following steps：
S1：CPLD carries out crash detection；
S2：If detecting deadlock, deadlock processing is carried out；If not detecting deadlock, other events are carried out
Barrier detection and processing；
S3：After the completion of deadlock processing or other fault detects and processing, the open circuit output of six phases is carried out；
S4：Crash detection is carried out again, and the open circuit output of six phases is persistently carried out if still having deadlock, if without deadlock,
Restore the normal output states of PWM, restarts S1 steps.
Scheme as a preference of the above scheme, deadlock processing include the following steps：
S01：CPLD chips export crash status signal and cpu reset signal outward；
S02：It controls pwm signal and carries out the open circuit output of six phases；
S03：Carry out bridge arm fault detect and processing；
S04：Deadlock processing is completed.
Scheme as a preference of the above scheme, the bridge arm fault detect and processing include the following steps：
S11：Detect upper and lower bridge arm malfunction；
S12：Upper bridge three-phase shortcircuit is carried out if lower bridge failure；It is short that lower bridge three-phase is carried out if upper bridge failure or without bridge arm failure
Road；Six phases are maintained to open a way if the equal failure of upper and lower bridge；
S13：Bridge arm fault detect and processing are completed.
Scheme as a preference of the above scheme, other described fault detects and processing include the following steps：
S21：Export the state that do not crash；
S22：It carries out overcurrent and over-pressed signal detection restarts S1 steps if not detecting overcurrent-overvoltage signal；If inspection
Overcurrent-overvoltage signal is measured, then detects whether CPU actively initiates three-phase shortcircuit operation；
S23：If not CPU is actively initiated, then first carries out six phase open circuits and carry out rotating speed judgement again；If CPU is actively initiated, then directly
Tap into the judgement of row rotating speed；
S24：If it is high speed to detect rotating speed, bridge arm fault detect and processing are carried out；If detection rotating speed is low speed, does not do and locate
Reason；
S25：Other fault detects and processing are completed.
It is an advantage of the invention that：Logical process is carried out to signal using CPLD chips, the response time is short, in the event of driving wheel system
Summary responses when barrier；Watchdo functions are integrated into CPLD chips, part category and quantity is few, watchdog disablers
Rate is low；A part of cpu resource can be discharged with operations such as expansion switch amount signal processing and logical process.
Description of the drawings
Fig. 1 is a kind of circuit diagram of signaling conversion circuit.
Fig. 2 is a kind of circuit diagram of fault-signal conversion circuit.
Fig. 3 is a kind of pin connection figure of CPLD chips.
Fig. 4 is a kind of flow chart of motor of electric motor car controller hardware guard method of the present invention.
Fig. 5 is a kind of flow chart of deadlock processing.
Fig. 6 is a kind of flow chart of bridge arm fault detect and processing.
Fig. 7 is a kind of flow chart of other fault detects and processing.
Specific implementation mode
Below with reference to the embodiments and with reference to the accompanying drawing being further described to technical scheme of the present invention.
Embodiment：
A kind of motor of electric motor car controller hardware based on CPLD of the present embodiment protects circuit, it is characterized in that：Including CPU,
CPLD chips, signaling conversion circuit, fault-signal conversion circuit, CPLD output conversion circuits and other peripheral circuits, CPU pass through
Signaling conversion circuit is connected with CPLD chips, other peripheral circuits are connected by faulty change-over circuit with CPLD chips, outside other
Circuit is enclosed also to be connected directly with CPLD.
As shown in Figure 1, the signal output end that signaling conversion circuit includes resistance R and capacitance C, CPU is electrically connected with resistance R,
The resistance R other ends are electrically connected with the pin of capacitance C and CPLD chip respectively, capacitance C other ends ground connection.The circuit exports CPU
PWMX-T, PWMX-B signals are converted to PWMF-XT, and PWMF-XB signals, X can be U, V, W, i.e. motor three-phase.The circuit will also
PPC_Speed1, PPC_Speed2, PPC_5KHz, PPC_ClearDie, PPC_ClearOC, PPC_ of CPU outputs
ClearOV, PPC_EN, PPC_RST1, PPC_RST2 are converted into slow-speed of revolution signal speed1, high tach signal speed2, active
It triggers three-phase shortcircuit signal CPLD-EN, over-current state clear signal OC_Clear, overvoltage condition clear signal OV_Clear, feed
Dog signal SW-5KHz, crash state clear signal Die_Clear and reset signal RST1, RST2.
As shown in Fig. 2, fault-signal conversion circuit includes input Fault-T, Fault-B, magnetic bead FB3, FB4, resistance
R62, R63, R64, R65, R66, R67, R68, R69, capacitance C91, C92, C104, C105, C106, C107 and electrical level transferring chip
U5, input Fault-T are electrically connected with magnetic bead FB3, and the magnetic bead FB3 other ends are electrically connected with resistance R63 and resistance R64 respectively, resistance
R63 connects+5V power supplys, and the resistance R64 other ends are connected with the 7th pin and capacitance C105 of electrical level transferring chip U5 respectively to be connected, electricity
Hold the C105 other ends ground connection, input Fault-B be electrically connected with magnetic bead FB4, the magnetic bead FB4 other ends respectively with resistance R62 and resistance
R67 is connected, and resistance R62 connects+5V power supplys, the resistance R67 other ends respectively with the 6th pin and capacitance of electrical level transferring chip U5
C104 is connected, battery C104 other ends ground connection, and the 5th pin ground connection of electrical level transferring chip U5, the 8th pin connects+5V power supplys, the
Eight pins are connected to capacitance C91, capacitance C91 other ends ground connection with+5V power connection points, and the first pin of electrical level transferring chip U5 connects
+ 3.3V power supplys, the first pin are connected to capacitance C92, capacitance C92 other ends ground connection, electrical level transferring chip with+3.3V power connection points
The second pin of U5 is electrically connected with resistance R65, the resistance R65 other ends respectively with resistance R68, capacitance C106 and CPLD chip
37 pins are electrically connected, and resistance R68 is grounded with the capacitance C106 other ends, the third pin and resistance of electrical level transferring chip U5
R66 is electrically connected, and the resistance R66 other ends are electrically connected with the 38th pin of resistance R69, capacitance C107 and CPLD chip respectively,
Resistance R69 is grounded with the capacitance C107 other ends, the 4th pin ground connection of electrical level transferring chip U5.Fault-T is the upper bridge event of driving
Hindering signal, Fault-B is the lower bridge fault-signal of driving, and electrical level transferring chip U5 is SN74LVC2T45QDCURQ1 chips,
Fault-T, Fault-B signal are converted into CPLD-T, CPLD-B signal and are separately input to the 37th of CPLD chips the, 38
Pin.
As shown in figure 3, CPLD chips use LAMXO640C-3TN100E chips, the 94th of the CPLD chips arrives
99th pin sequentially inputs PWMF_VB, PWMF_UB, PWMF_UT, PWMF_VT, PWMF_WB, PWMF_VT, and the 14th arrives
22nd pin is electrically connected with signaling conversion circuit all the way respectively, and the 14th to the 22nd pin sequentially inputs crash state
Clear signal Die_Clear, high tach signal speed2, slow-speed of revolution signal speed1, over-current state clear signal OC_Clear,
Overvoltage condition clear signal OV_Clear, reset signal RST2, reset signal RST1, three-phase shortcircuit signal CPLD- is actively triggered
The first to the 4th pin of EN, feeding-dog signal SW-5KHz, CPLD chip, the 89th pin, the 91st pin and the 100th
Pin receives motor U phase negative current over-current signals OC_U_L, motor U phase positive current over-current signals OC_U_H, motor W phases and bears successively
Overcurrent signal OC_W_L, motor W phase positive current over-current signals OC_W_H, motor V phase negative current over-current signals OC_V_L, electricity
Machine V phases positive current over-current signal OC_U_H and over-pressed signal DCV_OV, the 5th pin to the 9th pin, the 11st pin, second
Ten three-prongs, the 68th to the 70th three-prong outside output status signal and reset signal successively.
The motor of electric motor car controller hardware guard method based on CPLD that the present invention also provides a kind of, as shown in figure 4, packet
Include following steps：
S1：CPLD carries out crash detection；
S2：If detecting deadlock, deadlock processing is carried out；If not detecting deadlock, other events are carried out
Barrier detection and processing；
S3：After the completion of deadlock processing or other fault detects and processing, the open circuit output of six phases is carried out；
S4：Crash detection is carried out again, and the open circuit output of six phases is persistently carried out if still having deadlock, if without deadlock,
Restore the normal output states of PWM, restarts S1 steps.
As shown in figure 5, the deadlock processing includes the following steps：
S01：CPLD chips export crash status signal and cpu reset signal outward；
S02：It controls pwm signal and carries out the open circuit output of six phases；
S03：Carry out bridge arm fault detect and processing；
S04：Deadlock processing is completed.
As shown in fig. 6, the bridge arm fault detect and processing includes the following steps：
S11：Detect upper and lower bridge arm malfunction；
S12：Upper bridge three-phase shortcircuit is carried out if lower bridge failure；It is short that lower bridge three-phase is carried out if upper bridge failure or without bridge arm failure
Road；Six phases are maintained to open a way if the equal failure of upper and lower bridge；
S13：Bridge arm fault detect and processing are completed.
As shown in fig. 7, described other fault detects and processing include the following steps：
S21：Export the state that do not crash；
S22：It carries out overcurrent and over-pressed signal detection restarts S1 steps if not detecting overcurrent-overvoltage signal；If inspection
Overcurrent-overvoltage signal is measured, then detects whether CPU actively initiates three-phase shortcircuit operation；
S23：If not CPU is actively initiated, then first carries out six phase open circuits and carry out rotating speed judgement again；If CPU is actively initiated, then directly
Tap into the judgement of row rotating speed；
S24：If it is high speed to detect rotating speed, bridge arm fault detect and processing are carried out；If detection rotating speed is low speed, does not do and locate
Reason；
S25：Other fault detects and processing are completed.
Specific embodiment described herein is only an example for the spirit of the invention.Technology belonging to the present invention is led
The technical staff in domain can make various modifications or additions to the described embodiments or replace by a similar method
In generation, however, it does not deviate from the spirit of the invention or beyond the scope of the appended claims.
Claims (8)
1. a kind of motor of electric motor car controller hardware based on CPLD protects circuit, it is characterized in that：Including CPU, CPLD chip,
Signaling conversion circuit, fault-signal conversion circuit, CPLD output conversion circuits and other peripheral circuits, CPU are converted by signal
Circuit is connected with CPLD chips, other peripheral circuits are connected by faulty change-over circuit with CPLD chips, other peripheral circuits are also
It is connected directly with CPLD.
2. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, it is characterized in that：Institute
The signaling conversion circuit stated includes that the signal output end of resistance R and capacitance C, CPU are electrically connected with resistance R, resistance R other ends difference
It is electrically connected with the pin of capacitance C and CPLD chip, capacitance C other ends ground connection.
3. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, the failure
Signaling conversion circuit include input Fault-T, Fault-T, magnetic bead FB3, FB4, resistance R62, R63, R64, R65, R66, R67,
R68, R69, capacitance C91, C92, C104, C105, C106, C107 and electrical level transferring chip U5, input Fault-T and magnetic bead FB3
Electrical connection, the magnetic bead FB3 other ends are electrically connected with resistance R63 and resistance R64 respectively, and resistance R63 connects+5V power supplys, and resistance R64 is another
End is connected with the 7th pin and capacitance C105 of electrical level transferring chip U5 respectively to be connected, capacitance C105 other ends ground connection, input
Fault-B is electrically connected with magnetic bead FB4, and the magnetic bead FB4 other ends are connected with resistance R62 and resistance R67 respectively, and resistance R62 connects+5V electricity
Source, the resistance R67 other ends are connected with the 6th pin and capacitance C104 of electrical level transferring chip U5 respectively, another terminations of battery C104
Ground, the 5th pin ground connection of electrical level transferring chip U5, the 8th pin connect+5V power supplys, and the 8th pin is connected to+5V power connection points
The first pin of capacitance C91, capacitance C91 other ends ground connection, electrical level transferring chip U5 meet+3.3V power supplys, the first pin and+3.3V
Power connection points are connected to capacitance C92, and capacitance C92 other ends ground connection, the second pin and the resistance R65 of electrical level transferring chip U5 are electrically connected
It connects, the resistance R65 other ends are electrically connected with the 37th pin of resistance R68, capacitance C106 and CPLD chip respectively, resistance R68
It is grounded with the capacitance C106 other ends, the third pin of electrical level transferring chip U5 is electrically connected with resistance R66, the resistance R66 other ends point
It is not electrically connected with the 38th pin of resistance R69, capacitance C107 and CPLD chip, resistance R69 and another terminations of capacitance C107
Ground, the 4th pin ground connection of electrical level transferring chip U5.
4. the motor of electric motor car controller hardware according to claim 1 based on CPLD protects circuit, it is characterized in that：Institute
State the 94th to the 99th pin of CPLD chips, the 14th to the 22nd pin respectively with signaling conversion circuit all the way
Electrical connection, the first to the 4th pin of CPLD chips, the 89th pin, the 91st pin and the 100th pin receive respectively
Overcurrent and over-pressed signal, the 5th pin to the 9th pin, the 11st pin, the 20th three-prong, the 68th to the 73rd
The outside output signal of pin.
5. a kind of motor of electric motor car controller hardware guard method based on CPLD, described in claims 1 or 2 or 3 or 4
Motor of electric motor car controller hardware protect circuit, it is characterized in that：Include the following steps：
S1：CPLD carries out crash detection；
S2：If detecting deadlock, deadlock processing is carried out；If not detecting deadlock, other events are carried out
Barrier detection and processing；
S3：After the completion of deadlock processing or other fault detects and processing, the open circuit output of six phases is carried out；
S4：Crash detection is carried out again, and the open circuit output of six phases is persistently carried out if still having deadlock, if without deadlock,
Restore the normal output states of PWM, restarts S1 steps.
6. the motor of electric motor car controller hardware guard method according to claim 5 based on CPLD, it is characterized in that：Institute
The deadlock processing stated includes the following steps：
S01：CPLD chips export crash status signal and cpu reset signal outward；
S02：It controls pwm signal and carries out the open circuit output of six phases；
S03：Carry out bridge arm fault detect and processing；
S04：Deadlock processing is completed.
7. the motor of electric motor car controller hardware guard method according to claim 6 based on CPLD, it is characterized in that：Institute
The bridge arm fault detect and processing stated include the following steps：
S11：Detect upper and lower bridge arm malfunction；
S12：Upper bridge three-phase shortcircuit is carried out if lower bridge failure；It is short that lower bridge three-phase is carried out if upper bridge failure or without bridge arm failure
Road；It is not processed if the equal failure of upper and lower bridge；
S13：Bridge arm fault detect and processing are completed.
8. the motor of electric motor car controller hardware guard method according to claim 7 based on CPLD, it is characterized in that：Institute
Other fault detects and processing stated include the following steps：
S21：Export the state that do not crash；
S22：It carries out overcurrent and over-pressed signal detection restarts S1 steps if not detecting overcurrent-overvoltage signal；If inspection
Overcurrent-overvoltage signal is measured, then detects whether CPU actively initiates three-phase shortcircuit operation；
S23：If not CPU is actively initiated, then first carries out six phase open circuits and carry out rotating speed judgement again；If CPU is actively initiated, then directly
Tap into the judgement of row rotating speed；
S24：If it is high speed to detect rotating speed, bridge arm fault detect and processing are carried out；If detection rotating speed is low speed, does not do and locate
Reason；
S25：Other fault detects and processing are completed.
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Cited By (4)
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| CN110380386A (en) * | 2019-06-14 | 2019-10-25 | 浙江零跑科技有限公司 | Automatic seat controller and its control method with defencive function |
| CN111106788A (en) * | 2018-10-26 | 2020-05-05 | 上海汽车集团股份有限公司 | Active short-circuit protection system of motor |
| CN112751521A (en) * | 2020-12-31 | 2021-05-04 | 安徽工程大学 | Controller system applied to motor |
| CN114401463A (en) * | 2021-12-31 | 2022-04-26 | 广州芯德通信科技股份有限公司 | Method and device for reducing clock component port radiation of OLT (optical line terminal) equipment |
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| CN114401463A (en) * | 2021-12-31 | 2022-04-26 | 广州芯德通信科技股份有限公司 | Method and device for reducing clock component port radiation of OLT (optical line terminal) equipment |
| CN114401463B (en) * | 2021-12-31 | 2024-03-29 | 广州芯德通信科技股份有限公司 | Method and device for reducing clock component port radiation of OLT (optical line terminal) equipment |
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