CN208337596U - G.fast SFP module - Google Patents

G.fast SFP module Download PDF

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Publication number
CN208337596U
CN208337596U CN201820579230.1U CN201820579230U CN208337596U CN 208337596 U CN208337596 U CN 208337596U CN 201820579230 U CN201820579230 U CN 201820579230U CN 208337596 U CN208337596 U CN 208337596U
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CN
China
Prior art keywords
sfp
interface
fast
signal input
output terminal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201820579230.1U
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Chinese (zh)
Inventor
杨卫东
蒋学鸿
李伟
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TP Link Technologies Co Ltd
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TP Link Technologies Co Ltd
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Priority to CN201820579230.1U priority Critical patent/CN208337596U/en
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Publication of CN208337596U publication Critical patent/CN208337596U/en
Expired - Fee Related legal-status Critical Current
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Abstract

The utility model discloses a kind of G.fast SFP module, the G.fast SFP module includes: multiple twin line interface, AFE(analog front end), digital front-end, SFP interface, PHY unit and POE interface;The analog signal input/output terminal of the AFE(analog front end) is connect with the multiple twin line interface, the digital signal input/output terminal of the AFE(analog front end) is connect with the SERDES digital signal input/output terminal of the digital front-end, the Ethernet digital signal input/output terminal of the SFP interface and the PHY unit is connect with the Ethernet digital signal input/output terminal of the digital front-end simultaneously, and the ethernet physical layer signal input/output terminal of the PHY unit is connect with the POE interface.SFP G.fast module described in the utility model, can support G.fast technical communication, and have the function of SFP and SFU simultaneously, versatile.

Description

G.fast SFP module
Technical field
The utility model relates to the communications field more particularly to a kind of G.fast SFP modules.
Background technique
With the fast development of network technology, requirement of the user to network transfer speeds is also higher and higher, and network insertion Technology is used technology on the final stage route connecting in network with user, is had to the development of network technology heavy to closing The meaning wanted.
At present miniaturization SFP module because its high-performance, low cost and transmission rate are fast the features such as, be widely used in In Ethernet optic communication or passive optical network communication, SFP module provides the connection between fiber optic cables and the network switch, but Existing SFP module can not be adapted to access copper networks cable interface, in addition, existing SFP module connects often by SFP interface Enter SFP host, to realize the communication with SFP host, and can not support single home unit (Single Family Unit, SFU) Access, limit the application of SFP module.
Utility model content
The utility model embodiment proposes a kind of G.fast SFP module, can be adapted to access copper networks cable interface, branch G.fast technical communication is held, and has the function of SFP and SFU simultaneously, extends the function of SFP module, it is versatile.
The utility model embodiment provides a kind of G.fast SFP module, and the G.fast SFP module includes: multiple twin Line interface, G.fast processing unit, SFP interface, PHY unit and POE interface;
The G.fast processing unit includes AFE(analog front end) and digital front-end, and the AFE(analog front end) has analog signal defeated Enter/output end and digital signal input/output terminal, the digital front-end have SERDES digital signal input/output terminal and with Too network data signal input/output terminal, the PHY unit have Ethernet digital signal input/output terminal and Ethernet physics Layer signal input/output terminal;
The analog signal input/output terminal of the AFE(analog front end) is connect with the multiple twin line interface, the AFE(analog front end) Digital signal input/output terminal is connect with the SERDES digital signal input/output terminal of the digital front-end, the SFP interface It is defeated with the Ethernet digital signal of the digital front-end simultaneously with the Ethernet digital signal input/output terminal of the PHY unit Enter/output end connection, the ethernet physical layer signal input/output terminal of the PHY unit is connect with the POE interface.
Further, the G.fast processing unit further includes hybrid circuit, and the input of the analog signal of the AFE(analog front end)/ Output end is connect by the hybrid circuit with the multiple twin line interface.
Further, before the digital signal input/output terminal of the AFE(analog front end) is by SERDES bus and the number The SERDES digital signal input/output terminal at end connects;The SFP interface passes through SGMII bus, iic bus and GPIO interface It is connect with the Ethernet digital signal input/output terminal of the digital front-end;The Ethernet digital signal of the PHY unit is defeated Enter/output end passes through SGMII bus and SMI interface is connect with the Ethernet digital signal input/output terminal of the digital front-end.
Further, the G.fast SFP module includes DC-DC converter and PHY electrical source switch, the DC-DC conversion The power input of device is connect with the power supply output foot of the POE interface, the enabled control terminal of the DC-DC converter and institute The SFP insertion detection pin connection of SFP interface is stated, the power output end of the DC-DC converter is simultaneously and at the G.fast The power input of reason unit is connected with the first connecting pin of the PHY electrical source switch;The power supply output foot of the SFP interface It is connect simultaneously with the first connecting pin of the power input of the G.fast processing unit and the PHY electrical source switch;The PHY The second connection end of power switch is connect with the power input of the PHY unit, the control terminal of the PHY electrical source switch and institute State the SFP insertion detection pin connection of SFP interface;The DC-DC converter enables the level that control terminal receives according to it and believes Number disability of the control DC-DC converter or work, described in the PHY electrical source switch is controlled according to the level signal of its control terminal The on-off of first connecting pin and the second connection end;Wherein, when the DC-DC converter disables, first connecting pin It is in an off state with the second connection end.
Further, the SFP insertion detection pin is the 20th pin VeeT of the SFP interface.
Further, the PHY electrical source switch includes N-type triode, p-type metal-oxide-semiconductor, first resistor, second resistance and Three resistance;
The base stage of the N-type triode is the control terminal of the PHY electrical source switch, and the collector of the N-type triode is logical It crosses the first resistor to connect with the grid of the p-type metal-oxide-semiconductor, the emitter ground connection of the N-type triode;
The source electrode of the p-type metal-oxide-semiconductor is the first connecting pin of the PHY electrical source switch, and the drain electrode of the p-type metal-oxide-semiconductor is The second connection end of the PHY electrical source switch, the first end of the second resistance is connect with the source electrode of the p-type metal-oxide-semiconductor, described The second end of second resistance is connect with the grid of the p-type metal-oxide-semiconductor, the first end of the 3rd resistor and the N-type triode Base stage connection, the second end of the 3rd resistor connect with the second end of the second resistance.
Further, the multiple twin line interface is RJ11 interface or RJ12 interface.
Further, the POE interface is RJ45 interface.
Compared with prior art, G.fast SFP module provided by the embodiment of the utility model, by the way that G.fast will be handled The AFE(analog front end) and digital front-end of signal are integrated in small-sized SFP module, so that G.fast SFP module supports G.fast skill Art communication;By design SFP interface and PHY unit and POE interface, so that the G.fast SFP module can not only pass through SFP Interface access SFP host, realize and SFP host between communication, can also by POE interface access POE equipment, realize with Communication between POE equipment, so that G.fast SFP module can be linked into SFP host or POE is set by user according to application scenarios Standby middle realization communicates, and overcomes the limitation that existing SFP module only has access SFP host, extends the function of SFP module, leads to It is strong with property.
Detailed description of the invention
Fig. 1 is the structural schematic diagram for the G.fast SFP module that the utility model first embodiment provides.
Fig. 2 is that the application note for the G.fast SFP module access SFP host that the utility model first embodiment provides shows It is intended to.
Fig. 3 is that the application note for the G.fast SFP module access POE equipment that the utility model first embodiment provides shows It is intended to.
Fig. 4 is the structural schematic diagram for the G.fast SFP module that the utility model second embodiment provides.
Fig. 5 is the structural schematic diagram of PHY electrical source switch described in the utility model second embodiment.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without creative efforts Every other embodiment obtained, fall within the protection scope of the utility model.
In the utility model embodiment, a kind of G.fast SFP module is provided, the G.fast SFP module is supported ((Fast access to subscriberTerminals, quickly access user terminal) technical communication can access G.fast SFP host and POE (Power Over Ethernet, active Ethernet) equipment, to realize the terminals such as PC, mobile phone, tablet computer Communication between equipment and local side.
Referring to Fig. 1, Fig. 1 is the structural schematic diagram for the G.fast SFP module that the utility model first embodiment provides, The G.fast SFP module includes: multiple twin line interface 10, G.fast processing unit 20, SFP interface 30, PHY unit 40 and POE Interface 50.
The G.fast processing unit 20 includes hybrid circuit 201, AFE(analog front end) 202 and digital front-end 203.The simulation There is analog signal input/output terminal a and digital signal input/output terminal b, the digital front-end 203 to have for front end 202 SERDES digital signal input/output terminal c and Ethernet digital signal input/output terminal d, the PHY unit 40 have ether Network data signal input/output terminal e and ethernet physical layer signal input/output terminal f.
The analog signal input/output terminal a of the AFE(analog front end) 202 passes through hybrid circuit 201 and the multiple twin line interface The digital signal input/output terminal b of 10 connections, the AFE(analog front end) 202 passes through SERDES bus and the digital front-end 203 SERDES digital signal input/output terminal c connection;The SFP interface 30 by SGMII bus, iic bus and GPIO interface with The Ethernet digital signal input/output terminal d connection of the digital front-end 203, the Ethernet digital signal of the PHY unit 40 Input/output terminal e passes through the Ethernet digital signal input/output of SGMII bus and SMI interface and the digital front-end 203 Hold d connection;The ethernet physical layer signal input/output terminal f of the PHY unit 40 is connect with the POE interface 50.
The AFE(analog front end) 202 is used to the received G.fast analog signal of the multiple twin line interface 10 being converted to G.fast The G.fast digital signal that digital front-end 203 transmits is converted to G.fast analog signal by digital signal.
When the SFP interface 30 of the G.fast SFP module accesses SFP host, the digital front-end 203 is used for institute The G.fast digital signal that AFE(analog front end) 202 transmits is stated to be converted to Ethernet digital signal or transmit the SFP interface The Ethernet digital signal conversion G.fast digital signal to come over, to realize the number between G.fast SFP module and SFP host According to communication.
When the POE interface 50 of the G.fast SFP module accesses POE equipment, the digital front-end 203 is used for institute The G.fast digital signal that AFE(analog front end) 202 transmits is stated to be converted to Ethernet digital signal or pass the PHY unit 40 The defeated Ethernet digital signal to come is converted to G.fast digital signal;The PHY unit 40 from digital front-end 203 for that will pass The Ethernet that the defeated Ethernet digital signal to come is converted to ethernet physical layer digital signal or transmits POE interface 50 Physical layer digital signal is converted to Ethernet digital signal, to realize that the data between G.fast SFP module and POE equipment are logical Letter.
In the present embodiment, the Ethernet digital signal be Ethernet bearing binary-coded signal, it is described with Too net physical layer signal be Ethernet bearing Ethernet encode signal.
In the present embodiment, the multiple twin line interface 10 is RJ11 interface or RJ12 interface, and the POE interface 50 is RJ45 Interface.
Referring to Fig. 2, accessing the application of SFP host for the G.fast SFP module that the utility model first embodiment provides Illustrate schematic diagram.
The multiple twin line interface 10 of the G.fast SFP module is connect by telephone wire with local side (DPU), terminal device (equipment such as PC, tablet computer, mobile phone) are connect by cable or WLAN with SFP host.As the G.fast SFP When the SFP interface 30 of module accesses SFP host, the communication between terminal device and local side, communication data flow direction can be realized are as follows: Terminal device<--->SFP host<--->G.fast SFP module<--->local side.
Referring to Fig. 3, accessing the application of POE equipment for the G.fast SFP module that the utility model first embodiment provides Illustrate schematic diagram.
The multiple twin line interface 10 of the G.fast SFP module is connect by telephone wire with local side (DPU), terminal device (equipment such as PC, tablet computer, mobile phone) are connect by cable or WLAN with POE equipment.As the G.fast SFP When the POE interface 50 of module accesses POE equipment, the communication between terminal device and local side, communication data flow direction can be realized are as follows: Terminal device<--->POE equipment<--->G.fast SFP module<--->local side.
Compared with prior art, G.fast SFP module provided by the embodiment of the utility model, by handling G.fast Unit 20 is integrated in small-sized SFP module, so that G.fast SFP module supports G.fast technical communication;By designing SFP Interface 30 and PHY unit 40 and POE interface 50, so that the G.fast SFP module not only can access SFP by SFP interface 30 Host realizes the data communication between SFP host, can also access POE equipment by POE interface 50, realize and POE equipment Between data communication so that G.fast SFP module can be linked into SFP host or POE equipment according to application scenarios by user Middle realization communication, overcomes the limitation that existing SFP module only has access SFP host, extends the function of SFP module, general Property is strong.
The structural schematic diagram of the G.fast SFP module provided referring to figure 4. for the utility model second embodiment.
The difference of the present embodiment and first embodiment is: G.fast SFP module further includes DC-DC described in the present embodiment Converter 60 and PHY electrical source switch 70.
The power input of the DC-DC converter 60 is connect with the power supply output foot of the POE interface 50, described The enabled control terminal of DC-DC converter 60 is connect with the SFP of the SFP interface 30 insertion detection pin, the DC-DC converter 60 power output end simultaneously with the power input of the G.fast processing unit 20 and the PHY electrical source switch 70 first Connecting pin connection.The power supply output foot of the SFP interface 30 simultaneously with the G.fast processing unit 20 and the PHY electrical source First connecting pin of switch 70 connects, with the AFE(analog front end) and digital front-end power to the G.fast processing unit 20.It is described The second connection end of PHY electrical source switch 70 is connect with the power input of the PHY unit 40, the PHY electrical source switch 70 Control terminal is connect with the SFP of the SFP interface 30 insertion detection pin.The DC-DC converter is according to its enabled control termination The level signal received controls the DC-DC converter disability or work;The PHY electrical source switch 70 is according to the electricity of its control terminal Ordinary mail number controls the on-off of first connecting pin and the second connection end.Make can control when the DC-DC converter 60 Terminating the signal received is low level, controls the DC-DC converter 60 and disables, so that the DC-DC converter does not work;When When the signal that the control terminal of the PHY electrical source switch 70 receives is low level, first connecting pin and described second is controlled Connecting pin disconnects, that is, the power supply of the PHY unit 40 is cut off, so that the PHY unit 40 does not work.
In the present embodiment, when the POE interface 50 of G.fast SFP module accesses POE equipment, the POE equipment is provided Power supply output foot and the DC-DC converter 60 of the voltage through the POE interface 50, be converted to the voltage output of 3.3V, To power to the PHY unit 40 and G.fast processing unit 20, the SFU function of G.fast SFP module is realized.Work as G.fast When the SFP interface 30 of SFP module accesses SFP host, the level of the SFP insertion detection pin is low level, and the DC-DC turns The enabled control terminal of parallel operation 60 receives the low level, controls the DC-DC converter 60 and disables, so that the DC-DC is converted Device does not work, meanwhile, the control terminal of the PHY electrical source switch 70 also receives the low level, control first connecting pin with The second connection end disconnects, and cuts off the power supply of the PHY unit so that the power output end of the DC-DC converter 60 and The power supply output foot of the SFP interface 30 cannot power to the PHY unit 40, can only be by SFP host to described Hybrid circuit, AFE(analog front end) and the digital front-end of G.fast processing unit provide the voltage of 3.3V, to realize G.fast SFP mould The SFP function of block.When the POE interface 50 of G.fast SFP module accesses POE equipment, while the access SFP host of SFP interface 30 When, the control terminal of the enabled control terminal of the DC-DC converter 60 and the PHY electrical source switch 70 will receive low level, from And the first connecting pin and the second connection end disconnection of the disability of DC-DC converter 60 and the PHY electrical source switch 70 are controlled, make The power supply output foot of the power output end and the SFP interface 30 that obtain the DC-DC converter 60 cannot be mono- to the PHY Member 40 is powered, and the DC-DC converter 60 can not also power to the G.fast processing unit 20, to realize G.fast The SFP function of SFP module, effectively prevent signal cross-talk.
As shown in figure 5, for the structural schematic diagram of PHY electrical source switch 70 described in the utility model second embodiment.The PHY Power switch 70 includes N-type triode 701, p-type metal-oxide-semiconductor 702, first resistor 703, second resistance 704 and 3rd resistor 705.
The base stage of the N-type triode 701 is the control terminal of the PHY electrical source switch 70, the N-type triode 701 Collector connect by the first resistor 703 with the grid of the p-type metal-oxide-semiconductor 702, the transmitting of the N-type triode 701 Pole ground connection.
The source electrode of the p-type metal-oxide-semiconductor 702 is the first connecting pin of the PHY electrical source switch 70, the p-type metal-oxide-semiconductor 702 Drain electrode be the PHY electrical source switch 70 second connection end, the first end of the second resistance 704 and the p-type metal-oxide-semiconductor 702 source electrode connection, the second end of the second resistance 704 are connect with the grid of the p-type metal-oxide-semiconductor 702, the 3rd resistor 705 first end is connect with the base stage of the N-type triode 701, the second end and the second resistance of the 3rd resistor 705 704 second end connection.
In the present embodiment, the SFP insertion detection pin is the 20th pin VeeT of the SFP interface 30, when described When SFP interface 30 accesses SFP host, the 20th pin VeeT of the SFP interface 30 exports low level.
When the SFP interface 30 of the G.fast SFP module accesses SFP host, 30 the 20th pins of the SFP interface VeeT will export low level, i.e., the base stage of the N-type triode 601 of the described PHY electrical source switch 70 is low level, at this point, three pole of N-type Pipe 601 disconnects, and the grid of p-type metal-oxide-semiconductor is high level, so that the source electrode of p-type metal-oxide-semiconductor and drain electrode disconnect, that is, has cut off described The power supply of PHY unit 40, so that the PHY unit 40 does not work.In addition, the enabled control terminal of the DC-DC converter also connects That is, the low level for receiving 30 the 20th pin VeeT output of the SFP interface can only so that the DC-DC converter does not work By SFP host to the hybrid circuit of the G.fast processing unit, AFE(analog front end) and digital front-end power.
That is, the SFP interface 30 when the G.fast SFP module accesses SFP host, and the POE interface 50 connects When entering POE equipment, the DC-DC converter disability, the PHY electrical source switch 70 is disconnected, to cut off the PHY unit 40 Power supply be ensure that in the G.fast SFP module while access SFP host and POE is set so that the PHY unit 40 does not work When standby, the G.fast SFP module is preferentially communicated with SFP host.
Compared with prior art, G.fast SFP module provided by the embodiment of the utility model, by handling G.fast Unit 20 is integrated in small-sized SFP module, so that G.fast SFP module supports G.fast technical communication;By designing SFP Interface 30 and PHY unit 40 and POE interface 50, so that the G.fast SFP module not only can access SFP by SFP interface 30 Host realizes the communication between SFP host, can also access POE equipment by POE interface 50, realize between POE equipment Communication so that user can according to application scenarios, G.fast SFP module be linked into SFP host or POE equipment realize it is logical Letter, overcomes the limitation that existing SFP module only has access SFP host, extends the function of SFP module, versatile;And work as When the G.fast SFP module accesses SFP host and POE equipment simultaneously, it can preferentially select to be communicated with the SFP host, The validity for realizing communication, prevents signal cross-talk.
The above is preferred embodiments of the present invention, it is noted that for the ordinary skill of the art For personnel, without departing from the principle of this utility model, several improvements and modifications can also be made, these are improved and profit Decorations are also considered as the protection scope of the utility model.

Claims (8)

1. a kind of G.fast SFP module, which is characterized in that the G.fast SFP module includes: multiple twin line interface, G.fast Processing unit, SFP interface, PHY unit and POE interface;
The G.fast processing unit includes AFE(analog front end) and digital front-end, and the AFE(analog front end) has analog signal input/defeated Outlet and digital signal input/output terminal, the digital front-end have SERDES digital signal input/output terminal and ether netting index Word signal input/output terminal, the PHY unit have Ethernet digital signal input/output terminal and ethernet physical layer signal Input/output terminal;
The analog signal input/output terminal of the AFE(analog front end) is connect with the multiple twin line interface, the number of the AFE(analog front end) Signal input/output terminal is connect with the SERDES digital signal input/output terminal of the digital front-end, the SFP interface and institute State the Ethernet digital signal input/output terminal of PHY unit simultaneously with the Ethernet digital signal of digital front-end input/defeated Outlet connection, the ethernet physical layer signal input/output terminal of the PHY unit are connect with the POE interface.
2. G.fast SFP module according to claim 1, it is characterised in that: the G.fast processing unit further includes mixing Circuit is closed, the analog signal input/output terminal of the AFE(analog front end) is connect by the hybrid circuit with the multiple twin line interface.
3. G.fast SFP module according to claim 1, it is characterised in that: the digital signal of the AFE(analog front end) is defeated Enter/output end connect by SERDES bus with the SERDES digital signal input/output terminal of the digital front-end;The SFP Interface passes through the Ethernet digital signal input/output terminal of SGMII bus, iic bus and GPIO interface and the digital front-end Connection;Before the Ethernet digital signal input/output terminal of the PHY unit is by SGMII bus and SMI interface and the number The Ethernet digital signal input/output terminal at end connects.
4. G.fast SFP module according to claim 1, it is characterised in that: the G.fast SFP module includes DC- DC converter and PHY electrical source switch, the power supply output foot of the power input of the DC-DC converter and the POE interface Connection, the enabled control terminal of the DC-DC converter are connect with the SFP of SFP interface insertion detection pin, the DC-DC The power output end of converter simultaneously with the power input of the G.fast processing unit and the PHY electrical source switch first Connecting pin connection;The power supply output foot of the SFP interface while the power input with the G.fast processing unit and institute State the first connecting pin connection of PHY electrical source switch;The second connection end of the PHY electrical source switch and the power supply of the PHY unit Input terminal connection, the control terminal of the PHY electrical source switch are connect with the SFP of SFP interface insertion detection pin;The DC- DC converter enables the level signal that control terminal receives according to it and controls the DC-DC converter disability or work, the PHY Power switch controls the on-off of first connecting pin and the second connection end according to the level signal of its control terminal;Wherein, When DC-DC converter disability, first connecting pin is in an off state with the second connection end.
5. G.fast SFP module according to claim 4, it is characterised in that: the SFP insertion detection pin is described 20th pin VeeT of SFP interface.
6. G.fast SFP module according to claim 4, it is characterised in that:
The PHY electrical source switch includes N-type triode, p-type metal-oxide-semiconductor, first resistor, second resistance and 3rd resistor;
The base stage of the N-type triode is the control terminal of the PHY electrical source switch, and the collector of the N-type triode passes through institute It states first resistor to connect with the grid of the p-type metal-oxide-semiconductor, the emitter ground connection of the N-type triode;
The source electrode of the p-type metal-oxide-semiconductor is the first connecting pin of the PHY electrical source switch, and the drain electrode of the p-type metal-oxide-semiconductor is described The second connection end of PHY electrical source switch, the first end of the second resistance are connect with the source electrode of the p-type metal-oxide-semiconductor, and described second The second end of resistance is connect with the grid of the p-type metal-oxide-semiconductor, the base of the first end of the 3rd resistor and the N-type triode Pole connection, the second end of the 3rd resistor are connect with the second end of the second resistance.
7. G.fast SFP module according to claim 1, it is characterised in that: the multiple twin line interface be RJ11 interface or RJ12 interface.
8. G.fast SFP module according to claim 1, it is characterised in that: the POE interface is RJ45 interface.
CN201820579230.1U 2018-04-20 2018-04-20 G.fast SFP module Expired - Fee Related CN208337596U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108337095A (en) * 2018-04-20 2018-07-27 普联技术有限公司 G.fast SFP modules

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108337095A (en) * 2018-04-20 2018-07-27 普联技术有限公司 G.fast SFP modules
CN108337095B (en) * 2018-04-20 2023-12-22 上海联虹技术有限公司 G.fast SFP module

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