CN208173556U - A kind of fixture reducing the positive surface damage of grinding wafer - Google Patents
A kind of fixture reducing the positive surface damage of grinding wafer Download PDFInfo
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- CN208173556U CN208173556U CN201820361197.5U CN201820361197U CN208173556U CN 208173556 U CN208173556 U CN 208173556U CN 201820361197 U CN201820361197 U CN 201820361197U CN 208173556 U CN208173556 U CN 208173556U
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- wafer
- groove
- fixture
- surface damage
- positive surface
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The utility model relates to a kind of fixtures for reducing the positive surface damage of grinding wafer, including fixture body, the system is particularly provided with the first groove that filling bonding agent places wafer, and the first groove of fixture body slot bottom is provided with the second groove for accommodating wafer effective coverage.The utility model is particularly provided with the first groove in system and the second groove is arranged in the first groove; the fixture body being adapted to it is designed using the wafer outer rim inactive area in wafer process engineering; wafer frontside is bonded and protected using binder, completes wafer attenuated polishing technique.
Description
Technical field
The utility model relates to field of semiconductor manufacture, more particularly to a kind of backside of wafer processing technology fixture.
Background technique
With the increasingly promotion of people's quality of life, traditional Si material has been unable to satisfy practical high frequency, high-power etc. and has answered
Use demand.Group Ⅲ-Ⅴ compound semiconductor is one of semiconductor material with fastest developing speed at present, is always the research weight of people
Point.Such as the electron mobility in GaAs is silicon（Si）6 times of middle electron mobility, electronics peak shift speed are the 2 of Si
Times, GaAs device has the characteristics that high frequency, high speed, low-power consumption, is often used as chip for cell phone, switching centre of data center chip
Deng inseparable with people's daily life；InP has the electron mobility of superelevation, has been widely used in photoelectricity, microwave etc.
Field；And typical material of the GaN as III-V race's semiconductor, the features such as excellent temperature characterisitic, environmental suitability, by
Step is applied in high temperature, high frequency, high-power applications field.
In practical applications, it is needed for radiating and reducing chip circuit size, III-V race's semiconductor generally requires thinned
To 50~200 um.Before carrying out reduction process, positive multiple tracks technique is generally completed in chip, different from traditional Si technique, is changed
Object semiconductor is closed due to device property, positive big rise and fall is most of in 2 um or more.So be thinned when, first chip front side with
Carrier is combined together under a certain pressure using binder, then as a whole and then carries out thinning back side of silicon wafer with it.
On the other hand, due to the influence of other technique correlation fixtures of wafer frontside, such as evaporation fixture, on wafer frontside side
1~3mm of edge is inactive area, is effective coverage at wafer frontside center.Overleaf in processing technology, traditional fixture is generally
Circular flat, size are greater than wafer size to be processed, such as 6 cun of wafers generally use the sapphire or ferrule of 156~175mm
As fixture.Wafer frontside easily causes to damage in conjunction with the fixture to wafer, sees below：
1. group Ⅲ-Ⅴ compound semiconductor generally uses Au, Cu as wiring metal, the material is soft is easy to be damaged；
2. the height of carrier surface rises and falls, wafer frontside is caused to damage：For cost consideration, weight after carrier generally cleans
It is multiple to utilize, however artificial operation inevitably damages carrier, the scratch of carrier surface often dozens of micron, Jin Erhui
Damage is brought to crystal column surface；
3. needing pressurized treatments, carrier easily causes to damage to wafer frontside：Wafer and carrier are incorporated in by binder
Together, due to needing surfacing after wafer pressurization, blocked up binder causes certain risk to subsequent technique, such as wafer and load
Tool falls off, therefore binder is unsuitable blocked up, and generally less than 10 μm, carrier causes to damage to crystal column surface after pressurization.
Utility model content
The purpose of this utility model is to provide a kind of fixtures for reducing the positive surface damage of grinding wafer, can well solve
The problem of planar structure of fixture easily causes damage to wafer.
To achieve the goals above, the utility model provides following technical scheme：
A kind of fixture of positive surface damage of reduction grinding wafer of the utility model, including fixture body, system are particularly provided with
The first groove that bonding agent places wafer is filled, fixture body the first groove slot bottom, which is provided with, accommodates the of wafer effective coverage
Two grooves.
Further, the second groove is set to the first groove slot bottom center.
Further, the width of the first groove is than diameter wafer >=0.5~2mm；The width of second groove is more straight than wafer
Diameter≤0.5~2mm.
Still further, the height of the second groove is 5~20um；The height of first groove is 20~50um.
Wherein, making specific material includes one of metal, sapphire, Si, SiC, GaAs or a variety of.
Compared with prior art, the utility model has the following advantages that：
A kind of fixture of positive surface damage of reduction grinding wafer of the utility model is particularly provided with the first groove simultaneously in system
Second groove is set in the first groove, the system being adapted to it is designed using the wafer outer rim inactive area in wafer process engineering
Specifically, wafer frontside is bonded and protected using binder, completes wafer attenuated polishing technique.
Detailed description of the invention
Fig. 1 is the schematic diagram of internal structure of the embodiments of the present invention；
Fig. 2 is the fixture body and wafer schematic diagram in conjunction with the embodiments of the utility model.
Specific embodiment
As shown in Figs. 1-2, the fixture of a kind of positive surface damage of reduction grinding wafer of the present embodiment, including fixture body 1, fixture
It is provided with the first groove 3 that filling bonding agent 4 places wafer 5 on 1 surface of body, is arranged in 1 first groove of fixture body, 3 slot bottom
There is the second groove 2 for accommodating 5 effective coverage of wafer.
Wherein, diameter >=0.5~2mm of the width a of the first groove 3 than wafer 5；The height d of first groove 3 be 20~
50um。
Second groove 2 is set to 3 slot bottom center of the first groove.The width b of second groove 2 than wafer 5 diameter≤
0.5~2mm；The height c of second groove 2 is 5~20um.
The material of fixture body 1 is including but not limited to metal, sapphire, Si, SiC, GaAs, using one or more of them group
It closes.
In use, the first recess region of whole wafer is filled up first in fixture body surface face coated with adhesive, wherein requiring bonding
Agent filling need to fill up entire fixture surface；Wafer is placed in the first groove of fixture body again, pressurization makes wafer in entire system
It is specific to become whole, back process operation is carried out, wherein requiring binder that must stay on the first groove of fixture body.
Due to being inactive area in 1~3mm of wafer frontside edge, and the first groove and the second groove make fixture body section
In step-like, and known to aforementioned, the size of the width e of step surface is 0.5~2mm between the first groove and the second recess sidewall,
So that the step face contact is in wafer inactive area and plays a supportive role, and the second groove correspond to it is effective at wafer frontside center
Region, even if pressurization is so that wafer inactive area and projection contacts, the second groove can make effective coverage at wafer frontside center
It is protected well, avoids wafer frontside effective coverage from directly contacting with fixture body impaired；Meanwhile wafer side wall and fixture body
There are bonding agents between first groove, the second recess sidewall, increase bond area, increase adhesive effect, guarantee that stabilization executes back
Face technique.
Claims (6)
1. a kind of fixture for reducing the positive surface damage of grinding wafer, which is characterized in that including fixture body, the system is particularly provided with
The first groove that bonding agent places wafer is filled, the first groove of fixture body slot bottom, which is provided with, accommodates wafer effective coverage use
The second groove.
2. a kind of fixture for reducing the positive surface damage of grinding wafer according to claim 1, which is characterized in that second groove
It is set to the first groove slot bottom center.
3. a kind of fixture for reducing the positive surface damage of grinding wafer according to claim 2, which is characterized in that first groove
Width than diameter wafer >=0.5~2mm.
4. a kind of fixture for reducing the positive surface damage of grinding wafer according to claim 3, which is characterized in that second groove
Width than diameter wafer≤0.5~2mm.
5. a kind of fixture for reducing the positive surface damage of grinding wafer according to claim 4, which is characterized in that second groove
Height be 5~20um.
6. a kind of fixture for reducing the positive surface damage of grinding wafer according to claim 5, which is characterized in that first groove
Height be 20~50um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820361197.5U CN208173556U (en) | 2018-03-16 | 2018-03-16 | A kind of fixture reducing the positive surface damage of grinding wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820361197.5U CN208173556U (en) | 2018-03-16 | 2018-03-16 | A kind of fixture reducing the positive surface damage of grinding wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208173556U true CN208173556U (en) | 2018-11-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820361197.5U Active CN208173556U (en) | 2018-03-16 | 2018-03-16 | A kind of fixture reducing the positive surface damage of grinding wafer |
Country Status (1)
| Country | Link |
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| CN (1) | CN208173556U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112959211A (en) * | 2021-02-22 | 2021-06-15 | 长江存储科技有限责任公司 | Wafer processing apparatus and processing method |
-
2018
- 2018-03-16 CN CN201820361197.5U patent/CN208173556U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112959211A (en) * | 2021-02-22 | 2021-06-15 | 长江存储科技有限责任公司 | Wafer processing apparatus and processing method |
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