CN208044023U - Latched test translating device - Google Patents
Latched test translating device Download PDFInfo
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- CN208044023U CN208044023U CN201820494420.3U CN201820494420U CN208044023U CN 208044023 U CN208044023 U CN 208044023U CN 201820494420 U CN201820494420 U CN 201820494420U CN 208044023 U CN208044023 U CN 208044023U
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- translating device
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Abstract
The utility model latched test translating device, applied to the latched test board equipped with chip, the latched test translating device include battery pack, switch element, the electric current monitor of power pin electric current for monitoring the chip and the power pin voltage for monitoring the chip voltage monitor, the latched test translating device constitutes a test loop with the chip.Pulse Width Control triggering is carried out by latched test board, even current source triggering is tested pin, latched test when to analog chip normal work；Electric current monitor can be passed through and voltage monitor judges whether latch phenomenon；Latch phenomenon occurs, and battery pack does not stop to power, it is possible to maintain latch phenomenon；Chip is removed from test platform and is moved, failure analysis is convenient for.
Description
Technical field
The utility model is related to ic test technique field, more particularly to anti-latch when integrated circuit works normally
Technical field of measurement and test, in particular to a kind of latched test translating device.
Background technology
When integrated circuit works normally, due to design and processes, it is possible to that circuit can be caused under external interference
Latch phenomenon, i.e. power pin pin performance Low ESR conducting over the ground, so as to cause integrated circuit cisco unity malfunction occurs.
But existing MK2 latched tests board, it is bulky due to design reasons, so be not easy to move, and not
Latch mode can be maintained, when being only capable of Analogous Integrated Electronic Circuits normal work, give power supply collocation and the triggering of current interference source is sentenced
It is fixed whether to have latch phenomenon.
As depicted in figs. 1 and 2, latched test board generally includes machine table main body 11, test platform 12 and test fixture 13,
Test platform 12 is arranged in machine table main body 11, and test fixture 13 is arranged on test platform 12, when test, test sample, that is, core
Piece 20 (integrated circuit) is clipped in test fixture 13, constitutes circuit as shown in Figure 2, wherein power supply 102 gives chip 20 electricity
Electric current when source capsule foot B is powered on and measured its normal work, current source 101 connects the tested pin C of chip 20, when current source 101
After triggering is tested pin C, the current measuring device 103 inside latched test board determines whether there is latch after measuring source current
Afterwards, power supply 102 will be automatically lower electric, therefore even if there is latch phenomenon, since equipment itself can automatically power off, so latch
Phenomenon cannot be held up, and can not translate this circuit.
To cause some integrated circuits after finding to have latch phenomenon, when doing failure analysis, because latch phenomenon cannot
It is maintained well, so bringing big inconvenience to failure analysis, generally requires by other means and do integrated circuit
It is analyzed after bad, thus brings many uncertain factors, the position of failure is not necessarily the position that latch occurs, from
And cause of high cost and easily mislead analysis directions, to cause uncertain influence to test result.
Therefore, it is necessary to provide a kind of latched test translating device, solve latch can not be showed using latched test board
As maintaining and immovable problem.
Utility model content
In order to solve the problems, such as not maintaining latch phenomenon using MK2 latched tests board and immovable, this reality
A kind of latched test translating device is provided with novel.
Latched test translating device provided by the utility model is applied to the latched test board equipped with chip, the door bolt
Lock test translating device include battery pack, switch element, power pin electric current for monitoring the chip electric current monitor
With the voltage monitor of the power pin voltage for monitoring the chip, the battery pack, the switch element, the electric current
Monitor, the voltage monitor are electrically connected with the chip is connected into a test loop.
It is closed by control switch element, so that battery pack is powered to chip (integrated circuit), pass through electric current monitor and electricity
Press the essential information of monitor observation chip；After connecting, Pulse Width Control triggering is carried out by latched test board, even electric
The triggering of stream source is tested pin, latched test when to analog chip normal work；Electric current monitor and voltage monitoring can be passed through
Device judges whether latch phenomenon；Latch phenomenon occurs, and battery pack does not stop to power, it is possible to keep latch phenomenon
Firmly；Chip is removed from test platform and is moved, failure analysis is convenient for.Using the utility model, can solve to use
Latch phenomenon can not be maintained when latched test board (such as MK2) and immovable problem, by shape when occurring convenient for latch
State is maintained and is translated to do next step failure analysis, and circuit is simple and quick, at low cost, and test result is accurately steady
It is fixed, quickly failure analysis point can be found out in conjunction with other analysis means, be suitable for large-scale promotion application.
Further, the cathode of the battery pack is connected to the ground pin of the chip, and the anode of the battery pack is logical
Cross the input terminal that the switch element is connected to the input terminal and the voltage monitor of the electric current monitor, the electric current prison
The output end of the output end and the voltage monitor of controlling device is connected to the power pin of the chip.
Further, the test fixture for the chip to be clamped is additionally provided on the latched test board.
Further, the test fixture is removably attachable to the latched test board.
Further, the model of the test fixture, the model of the model of the chip and the latched test board
It is adapted.
Further, the battery pack is dry cell batteries.
Further, the electric current monitor is digital electronic ammeter.
Further, the voltage monitor is digital voltmeter.
Description of the drawings
Fig. 1 is the structural schematic diagram of latched test board in the prior art.
Fig. 2 is the circuit diagram of latched test board in Fig. 1.
Fig. 3 is the circuit diagram of latched test board and the latched test translating device of the utility model embodiment.
Fig. 4 is the attachment structure schematic diagram of latched test board and the utility model embodiment in Fig. 3.
Specific implementation mode
In order to solve the problems, such as not maintaining latch phenomenon using latched test board and immovable, this practicality is new
Type provides a kind of latched test translating device.
In the following with reference to the drawings and specific embodiments to the preferred embodiment of the utility model latched test translating device make into
One step explanation.Those skilled in the art can be understood other advantages of the utility model easily by the content disclosed by this specification
With effect.
In conjunction with shown in Fig. 3 and Fig. 4, latched test translating device provided by the utility model is applied to equipped with chip 20
Latched test board.Latched test translating device includes battery pack 31, switch element 32, for the power pin of monitoring chip 20
The voltage monitor 33 of the electric current monitor 34 of B electric currents and power pin B voltages for monitoring chip 20, battery pack 31 are opened
Pass element 32, electric current monitor 34, voltage monitor 33 are electrically connected with chip 20 is connected into a test loop.
It when being tested using the utility model embodiment, is closed by control switch element 32, makes battery pack 31 to core
Piece 20 (integrated circuit) is powered, and the essential information of chip 20 is observed by electric current monitor 34 and voltage monitor 33；It connects
Later, Pulse Width Control triggering is carried out by latched test board, even the triggering of current source 101 is tested pin C, to analog chip
Latched test when 20 normal work；Electric current monitor 34 can be passed through and voltage monitor 33 judges whether latch phenomenon；
Latch phenomenon occurs, and battery pack 31 does not stop to power, it is possible to maintain latch phenomenon；By chip 20 from test platform
12 remove i.e. removable, are convenient for failure analysis.
Using the utility model, latch phenomenon can not be maintained when can solve using latched test board (such as MK2)
And immovable problem, state is maintained when occurring convenient for latch and is translated to do next step failure analysis, and
Circuit is simple and quick, at low cost, test result accurate stable, can quickly be looked for failure analysis point in conjunction with other analysis means
Go out, is suitable for large-scale promotion application.
Specifically, the cathode of battery pack 31 is connected to the ground pin GND of chip 20, and the anode of battery pack 31 passes through switch
Element 32 is connected to the input terminal of the input terminal and voltage monitor 33 of electric current monitor 34, the output end of electric current monitor 34 and
The output end of voltage monitor 33 is connected to the power pin B of chip 20.
Further, the test fixture 13 for chip 20 to be clamped is additionally provided on latched test board.Further, it surveys
Examination fixture 13 is removably attachable to latched test board.Specifically, the model of test fixture 13, the model of chip 20 and latch
The model of tester table is adapted, and the card slot for being clamped test fixture 13 is formed on latched test board, makes test fixture
13 can dismantle from latched test board.The pin of chip 20 accesses in test fixture correspondingly, latched test translation dress
It sets and can be electrically connected with the realization of chip 20 by test fixture 13 with latched test board, while the clamping of chip 20 and test clip
Tool 13 is dismantled together, is moved together, and effective protection chip 20 is injury-free, and dismounting is easily simple.Test fixture 13 is suitable core
The test fixture 13 that piece 20 uses, it is convenient to be attached and disassemble with latched test board.
Further, battery pack 31 can be any variable power supply being properly moved easily, while can be according to being actually subjected to
It asks and changes battery pack 31, in the present embodiment, battery pack 31 is dry cell batteries.Simultaneously so that latched test translating device and door bolt
Lock tester table shares a ground pin GND and makes reference, and is more convenient for moving.
Further, electric current monitor 34 can be any ammeter properly moved, in the present embodiment, current monitoring
Device 34 is digital electronic ammeter.Digital electronic ammeter is moved easily and connects.
Further, voltage monitor 33 can be any voltmeter properly moved, in the present embodiment, voltage monitoring
Device 33 is digital voltmeter.Digital voltmeter is moved easily and connects.
By installing the utility model additional outside existing latched test board, the utility model directly acts on test sample
(chip 20), and due to the power supply that battery pack 31 does not power off chip 20, therefore the latch phenomenon of chip 20 can be carried out
It keeps, test fixture 13 is dismantled from test platform 12, you can carry out latched test translating device together with test fixture 13
It is mobile.Because can directly test chip 20, test circuit is greatlied simplify, material object is simplified, greatly
It facilitates and latch phenomenon is kept and is moved easily.Simple and quick, at low cost, test result accurate stable is tested, it is ingenious in design,
It is simple for structure, it is simple to manufacture, is suitable for large-scale promotion application.
The above is only the preferred embodiment of the present utility model, not does limit in any form to the utility model
System, although the utility model has been disclosed with preferred embodiment as above, is not limited to the utility model, any to be familiar with sheet
Technical professional, in the range of not departing from technical solutions of the utility model, when the technology contents using the disclosure above
It makes a little change or is modified to the equivalent embodiment of equivalent variations, as long as being without departing from technical solutions of the utility model
Hold, any simple modification, equivalent change and modification made by the above technical examples according to the technical essence of the present invention, still
It is within the scope of the technical solutions of the present invention.
It should be noted that structure, ratio, size etc. depicted in this specification institute accompanying drawings, only coordinating
The bright revealed content of book, so that those skilled in the art understands and reads, being not limited to the utility model can implement
Qualifications, therefore do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size,
In the case where not influencing the effect of the utility model can be generated and the purpose that can reach, should all still fall disclosed in the utility model
Capable of the covering of technology contents in the range of.
Claims (8)
1. a kind of latched test translating device is applied to the latched test board equipped with chip, it is characterised in that：
The latched test translating device includes battery pack, switch element, the power pin electric current for monitoring the chip
The voltage monitor of electric current monitor and power pin voltage for monitoring the chip, the battery pack, switch member
Part, the electric current monitor, the voltage monitor are electrically connected with the chip is connected into a test loop.
2. latched test translating device as described in claim 1, it is characterised in that：The cathode of the battery pack is connected to described
The ground pin of chip, the battery pack anode by the switch element be connected to the electric current monitor input terminal and
The output end of the input terminal of the voltage monitor, the output end of the electric current monitor and the voltage monitor is connected to institute
State the power pin of chip.
3. latched test translating device as described in claim 1, it is characterised in that：It is additionally provided with use on the latched test board
In the test fixture that the chip is clamped.
4. latched test translating device as claimed in claim 3, it is characterised in that：The test fixture is removably attachable to
The latched test board.
5. latched test translating device as claimed in claim 3, it is characterised in that：The model of the test fixture, the core
The model of piece and the model of the latched test board are adapted.
6. latched test translating device as described in claim 1, it is characterised in that：The battery pack is dry cell batteries.
7. latched test translating device as described in claim 1, it is characterised in that：The electric current monitor is digital current
Table.
8. latched test translating device as described in claim 1, it is characterised in that：The voltage monitor is digital voltage
Table.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820494420.3U CN208044023U (en) | 2018-04-09 | 2018-04-09 | Latched test translating device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820494420.3U CN208044023U (en) | 2018-04-09 | 2018-04-09 | Latched test translating device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208044023U true CN208044023U (en) | 2018-11-02 |
Family
ID=63943268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820494420.3U Active CN208044023U (en) | 2018-04-09 | 2018-04-09 | Latched test translating device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208044023U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111722080A (en) * | 2020-05-26 | 2020-09-29 | 苏试宜特(上海)检测技术有限公司 | External power expansion device and method for latch tester |
-
2018
- 2018-04-09 CN CN201820494420.3U patent/CN208044023U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111722080A (en) * | 2020-05-26 | 2020-09-29 | 苏试宜特(上海)检测技术有限公司 | External power expansion device and method for latch tester |
| CN111722080B (en) * | 2020-05-26 | 2023-09-22 | 苏试宜特(上海)检测技术股份有限公司 | External expansion power supply device and method for latch testing machine |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Room C101, Building 8, 1618 Yishan Road, Minhang District, Shanghai, 201100 Patentee after: Suzhou Yite (Shanghai) Testing Technology Co., Ltd Address before: 201103 C101 room 8, building 1618, Yishan Road, Shanghai, Minhang District, China Patentee before: INTEGRA TED SERVICE TECHNOLOGY (SHANGHAI) Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Room C101, building 8, 1618 Yishan Road, Minhang District, Shanghai 201100 Patentee after: Su shiyite (Shanghai) Testing Technology Co.,Ltd. Address before: Room C101, building 8, 1618 Yishan Road, Minhang District, Shanghai 201100 Patentee before: Suzhou Yite (Shanghai) Testing Technology Co.,Ltd. |