CN207995300U - A kind of VDF intelligent crossovers device - Google Patents
A kind of VDF intelligent crossovers device Download PDFInfo
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- CN207995300U CN207995300U CN201820218974.0U CN201820218974U CN207995300U CN 207995300 U CN207995300 U CN 207995300U CN 201820218974 U CN201820218974 U CN 201820218974U CN 207995300 U CN207995300 U CN 207995300U
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Abstract
The utility model is related to intelligent layout techniques fields, disclose a kind of VDF intelligent crossovers device, specifically include user interface section, FPGA processing units, cross-over control unit, relay interface unit, main control unit；Using FPGA and PCM encoding and decoding techniques, analog signal data-signal is changed into using pcm encoder to be handled, the arbitrary intersection of speech line is realized by time-slot cross, without field operation, operation and resource data realize automatic management, solves the existing mainly manually wire jumper of current audio wiring, it is time-consuming and laborious, it is easy error, change every time needs hand-kept, increases error probability, service time is long, the problems such as difficult in maintenance, and have the characteristics that multichannel, across computer room, trans-regional, quick, real-time, accurate, there is extensive Practical significance.
Description
Technical field
The utility model belongs to intelligent layout techniques field more particularly to a kind of VDF intelligent crossovers device.
Background technology
VDF（Voice Distribution Frame）Voice distribution frame is for final exchange line or junction line, and energy
The equipment for carry out allotment connection to them.Distributing frame is most important component in management subsystem, is to realize vertically and horizontally cloth
The hinge of line two subsystems interconnection.Currently, voice frequency distributing mainly manually wire jumper, time-consuming and laborious, it is easy error, often
Secondary change needs hand-kept, increases error probability, service time is long, difficult in maintenance.Based on this, the utility model proposes one kind
VDF intelligent crossover devices, intelligent audio intersects changes into data-signal analog signal, passes through PCM（Pulse Code
Modulation）Time-slot cross realizes the interleaving function of physical circuit, is not necessarily to execute-in-place, automatically records, and cuts payroll to improve efficiency, and reduces
Repeated labor improves automatization level.
Invention content
In view of the deficiencies of the prior art, the utility model provides a kind of VDF intelligent crossovers device.
The utility model is to solve above-mentioned technical problem by the following technical solutions：
A kind of VDF intelligent crossovers device includes user interface section, the first FPGA processing units, cross-over control unit,
Two FPGA processing units, relay interface unit, main control unit；The phone is connect with user interface section, the user interface
Unit, the first FPGA processing units, cross-over control unit, the 2nd FPGA processing units, relay interface unit are sequentially connected, described
Relay interface unit is connect with programme-controlled exchange unit；The main control unit respectively with the first FPGA processing units, the 2nd FPGA
Processing unit, the connection of cross-over control unit；
The user interface section believes the analog voice of phone for completing the detection of phone related status information and forwarding
It number carries out pcm encoder and is converted into being sent to the first FPGA processing units after PCM vocoded datas to be handled, while first
The PCM vocoded datas that FPGA processing unit units send over change into analog voice signal and pass phone back；
The first FPGA processing units are for handling the PCM vocoded datas that user interface section is sent, place
Data transfer after reason gives cross-over control unit, while being sent to user interface after the data processing that cross-over control unit is sent
Unit；
The cross-over control unit is used for PCM time-slot cross, according to the control information of main control unit, relay interface unit
Time slot signal and corresponding channel associated signalling be crossed in corresponding user interface section time slot, user is realized by time-slot cross
The intersection of interface unit PCM voice data and phone status information；
During the 2nd FPGA processing units are used to be sent to after processing data information that cross-over control unit is sent
After interface unit, while being sent to cross-over control unit after the processing data information that relay interface unit sends over；
The relay interface unit is for completing the detection of programme-controlled exchange speech interface related status information and forwarding, journey
PCM vocoded datas, which are changed into, after the analog voice signal progress pcm encoder of controlled switching system output is sent to the 2nd FPGA processing
Cell processing, while passing journey back after the PCM vocoded datas that the 2nd FPGA processing units send over are changed into analog signal
Controlled switching system；
The main control unit is used for the operation of the first FPGA processing units, the 2nd FPGA processing units, cross-over control unit
Control.
Further, the user interface section includes dislodging machine testing module, ring module, power feeding module, audio transmission
Channel, PCM codec, line test module；The dislodging machine testing module is to be in off hook state also for detecting phone
It is hook state；The ring module is transmitted to phone for receiving ringing instruction and generating bell signal；The power feeding module
For providing feed voltage for phone；The audio transmission channel is used for the shaping filter of analog voice signal；The PCM compiles solution
Code device is for changing into PCM vocoded datas by the analog voice signal of phone and PCM vocoded datas being changed into phone
Analog voice signal；The line test module is used to test the combined-voltage, insulation resistance and loop circuit of telephone wire.
Further, the dislodging machine testing module is calculated by the voltage of A/D chip testing known resistances by Ohm's law
Go out loop current, judges to pluck hook state according to the size of loop current；
The ring module includes DC-DC circuit, for generating ringing voltage；
The power feeding module generates feed voltage by DC-DC circuit；
The audio transmission channel realizes the shaping filter of voice signal by operational amplifier and low-pass filter；
PCM codec PCM coding-decoding circuits as built in user interface chip SI32260 complete analog voice signal
PCM encoding and decoding；
The line test module completes correlation function test by A/D conversion circuits.
Further, the relay interface unit includes ring detection module, feed detection module, audio transmission channel, PCM
Codec；The ring detection module is for detecting the bell signal that programme-controlled exchange is sent out；
The feed detection module is used to detect the feed voltage of programme-controlled exchange output：The audio transmission channel is used for
The shaping filter of analog voice signal；
The PCM codec is used to the analog voice signal that programme-controlled exchange exports changing into PCM vocoded datas
Analog voice signal is changed by PCM vocoded datas.
Further, the ring detection module identifies ringing condition by A/D conversion circuits and signal processing circuit；
The audio transmission channel realizes the shaping filter of voice signal by operational amplifier and low-pass filter；
PCM codec PCM coding-decoding circuits as built in trunk interface chip SI3050 realize the volume of voice signal
Decoding.
Further, the first FPGA processing units and the 2nd FPGA processing units include mainly clock module, PCM multiplexings
And demultiplexing module, the clock module provide the synchronised clock of communication, the PCM multiplexing reconciliation of the first FPGA processing units
Multiplexing module completes the 30 road 64Kbit voices that multiple user interface sections transmit and status information is multiplexed into one completely
30/32 road frames of PCM and the 30/32 road frames of PCM that are transmitted to cross-over control unit, while cross-over control unit is sended over
Each user interface section is transmitted to after demultiplexing；The PCM multiplexings of the 2nd FPGA processing units and demultiplexing module are completed
The 30 road 64Kbit voices and status information that relay interface unit transmits are multiplexed into a complete 30/32 road frame of PCM simultaneously
It is transmitted to cross-over control unit, while in being transmitted to after the 30/32 road frame demultiplexings of PCM that cross-over control unit sends over
After interface unit.
Further, the PCM multiplexings and demultiplexing module are realized by FPGA internal logic circuits, 30 road 64K of multiplexing Shi Ba
Voice messaging is inserted respectively into 30 time slots, and corresponding synchronizing information and speech channel status information are inserted respectively into TS0 and TS16, solution
Multiplexing is 30/32 frame to be divided into the voice messaging of 30 road 64K and status information is transmitted to corresponding user interface section respectively.
Further, the communication interface of the user interface section and the first FPGA processing units is the first pcm interface and
One SPI interface, first pcm interface are used for transmission the voice messaging that bandwidth is 64Kbit, and first SPI interface is for passing
Defeated control and status information；The communication of first the FPGA processing units, the 2nd FPGA processing units and cross-over control unit connects
Mouth is the second pcm interface and the second SPI interface, and second pcm interface is used for transmission the voice messaging that bandwidth is 2048Mbit,
Second SPI interface is used for transmission control information；The communication interface of the relay interface unit and the 2nd FPGA processing units
It is third pcm interface and third SPI interface, the third pcm interface is used for transmission the voice messaging that bandwidth is 64Kbit, described
Third SPI interface is used for transmission control and status information；The main control unit and the first FPGA processing units platform and the 2nd FPGA
The communication interface of processing unit is the 4th SPI interface, and the 4th SPI interface is used for transmission control information；The main control unit
Communication interface with cross-over control unit is GPMC interfaces, and the GPMC interfaces are used for transmission control and status information.
Further, the main control unit includes CPU module, ethernet control module and memory module；The CPU module is used
It is connect in the control of the first FPGA processing units, the 2nd FPGA processing units and cross-over control unit operation, data processing and webmaster
Mouth data input and output；The ethernet control module is used for the transmitting-receiving of Ethernet data；The memory module is deposited for data
Storage and caching.
Compared with prior art, the utility model provides a kind of VDF intelligent crossovers device, is compiled using FPGA and PCM
Analog signal is changed into data-signal using pcm encoder and is handled by decoding technique, and speech line is realized by time-slot cross
It is arbitrary to intersect, it is not necessarily to field operation, operation and resource data realize automatic management, solve main existing for current audio wiring
It is time-consuming and laborious if manually wire jumper, it is easy error, change every time needs hand-kept, increases error probability, service time
It is long, it is difficult in maintenance the problems such as, and have the characteristics that multichannel, across computer room, trans-regional, quick, real-time, accurate, have widely
Practical significance.
Description of the drawings
It, below will be to needed in embodiment description in order to illustrate more clearly of the technical solution of the utility model
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only one embodiment of the utility model, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of principle schematic of the utility model；
Fig. 2 is the caller process flow diagram flow chart of the utility model；
Fig. 3 is the called process flow diagram flow chart of the utility model；
Fig. 4 is the principle schematic before the cross-over configuration of the utility model；
Fig. 5 is the principle schematic after the cross-over configuration of the utility model；
Fig. 6 is the principle schematic of the line test of the utility model.
Specific implementation mode
With reference to the attached drawing in the utility model embodiment, to this implement it is novel in technical solution carry out it is clear, complete
Site preparation describes, it is clear that the described embodiments are only a part of the embodiments of the utility model, instead of all the embodiments.
Based on the embodiments of the present invention, those of ordinary skill in the art are obtained under the premise of not making creative work
Every other embodiment, shall fall within the protection scope of the present invention.
As shown in Figure 1, a kind of VDF intelligent crossovers device provided by the utility model, a kind of VDF intelligent crossovers device packet
Include user interface section, the first FPGA processing units, cross-over control unit, the 2nd FPGA processing units, relay interface unit, master
Control unit；Phone is connect with user interface section, user interface section, the first FPGA processing units, cross-over control unit, second
FPGA processing units, relay interface unit are sequentially connected, and relay interface unit is connect with programme-controlled exchange unit；Main control unit point
It is not connect with the first FPGA processing units, the 2nd FPGA processing units, cross-over control unit.
User interface section for completing the detection of phone related status information and forwarding, the analog voice signal of phone into
Row pcm encoder, which is converted into being sent to the first FPGA processing units after PCM vocoded datas, to be handled, while the first FPGA
The PCM vocoded datas that processing unit unit sends over change into analog voice signal and pass phone back.
User interface section includes dislodging machine testing module, ring module, power feeding module, audio transmission channel, PCM volume solutions
Code device, line test module；Dislodging machine testing module is to be in off hook state or hook state for detecting phone；Ring mould
Block is transmitted to phone for receiving ringing instruction and generating bell signal；Power feeding module is used to provide feed voltage for phone；Sound
Frequency transmission channel is used for the shaping filter of analog voice signal；PCM codec is for changing into the analog voice signal of phone
PCM vocoded datas and the analog voice signal that PCM vocoded datas are changed into phone；Line test module is for testing
Combined-voltage, insulation resistance and the loop circuit of telephone wire.
Wherein, dislodging machine testing module calculates loop by the voltage of A/D chip testing known resistances by Ohm's law
Electric current judges to pluck hook state according to the size of loop current；Ring module includes DC-DC circuit, for generating ring electricity
Pressure；Power feeding module generates feed voltage by DC-DC circuit；Audio transmission channel is real by operational amplifier and low-pass filter
The shaping filter of existing voice signal；PCM codec PCM coding-decoding circuits as built in user interface chip SI32260 complete mould
The PCM encoding and decoding of quasi- voice signal；Line test module completes correlation function test by A/D conversion circuits.
First FPGA processing units are for handling the PCM vocoded datas that user interface section is sent, after processing
Data transfer give cross-over control unit, while being sent to user interface list after the data processing that cross-over control unit is sent
Member.
Cross-over control unit is used for PCM time-slot cross, according to the control information of main control unit, relay interface unit when
Gap signal and corresponding channel associated signalling are crossed in corresponding user interface section time slot, and user interface is realized by time-slot cross
The intersection of unit PCM voice data and phone status information.Cross-over control unit provides multimachine interconnecting interface, and every 30 road voice is multiple
Multiple devices cascade is supported to realize appointing for the roads 30000*30000 telephone line using 2.5G interconnecting interfaces at an E1 link
Meaning is intersected, and ensures the normal work of phone.
2nd FPGA processing units are used to that relaying will to be sent to after processing data information that cross-over control unit is sent and connect
Mouthful unit, while being sent to cross-over control unit after the processing data information that relay interface unit sends over.
First FPGA processing units and the 2nd FPGA processing units include mainly clock module, PCM multiplexings and demultiplexing mould
Block, clock module provide the synchronised clock of communication, and the PCM multiplexings of the first FPGA processing units and demultiplexing module complete multiple use
The 30 road 64Kbit voices and status information that family interface unit transmits are multiplexed into a complete 30/32 road frame of PCM and turn
Cross-over control unit is issued, while each being transmitted to after the 30/32 road frame demultiplexings of PCM that cross-over control unit sends over
User interface section；The PCM multiplexings of 2nd FPGA processing units and demultiplexing module complete what relay interface unit transmitted
30 road 64Kbit voices and status information are multiplexed into a complete 30/32 road frame of PCM and are transmitted to cross-over control unit, together
When being transmitted to relay interface unit after 30/32 road frame demultiplexing of PCM that cross-over control unit sends over.
Clock module includes local clock, recovered clock and PLL chips, and local clock is generated by local crystal oscillator, PLL chips
For clock synchronization and clock source selection.
PCM is multiplexed and demultiplexing module is realized by FPGA internal logic circuits, 30 road 64K voice messagings difference of multiplexing Shi Ba
30 time slots are inserted into, corresponding synchronizing information and speech channel status information are inserted respectively into TS0 and TS16, and demultiplexing is 30/
32 frames are divided into the voice messaging of 30 road 64K and status information is transmitted to corresponding user interface section respectively.
Relay interface unit is for completing the detection of programme-controlled exchange speech interface related status information and forwarding, program-controlled friendship
Change planes output analog voice signal carry out pcm encoder after change into PCM vocoded datas and be sent to the 2nd FPGA processing units
Processing, while the PCM vocoded datas that the 2nd FPGA processing units send over are changed into after analog signal and pass program-controlled friendship back
It changes planes.
Relay interface unit includes ring detection module, feed detection module, audio transmission channel, PCM codec；It shakes
Bell detection module is for detecting the bell signal that programme-controlled exchange is sent out；Feed detection module is for detecting programme-controlled exchange output
Feed voltage：Audio transmission channel is used for the shaping filter of analog voice signal；PCM codec is used for programme-controlled exchange
The analog voice signal of output changes into PCM vocoded datas and PCM vocoded datas is changed into analog voice signal.
Wherein, ring detection module identifies ringing condition by A/D conversion circuits and signal processing circuit；Audio transmission is logical
The shaping filter of voice signal is realized by operational amplifier and low-pass filter in road；PCM codec is by trunk interface chip
PCM coding-decoding circuits built in SI3050 realize the encoding and decoding of voice signal.
Operation and control of the main control unit for the first FPGA processing units, the 2nd FPGA processing units, cross-over control unit.
Main control unit includes CPU module, ethernet control module and memory module；CPU module is used for the first FPGA
Manage unit, the 2nd FPGA processing units and the control of cross-over control unit operation, data processing and network management interface data input and output；
Ethernet control module is used for the transmitting-receiving of Ethernet data；Memory module is stored and is cached for data.Wherein, CPU element is adopted
The integrated chip of integrated chip model AM335X series；The ethernet PHY collection for the 100M that Ethernet control unit uses
At chip；Storage unit uses the storage chip of DDR3.
The communication interface of user interface section and the first FPGA processing units is the first pcm interface and the first SPI interface,
One pcm interface is used for transmission the voice messaging that bandwidth is 64Kbit, and the first SPI interface is used for transmission control and status information；The
The communication interface of one FPGA processing units, the 2nd FPGA processing units and cross-over control unit is the second pcm interface and the 2nd SPI
Interface, the second pcm interface are used for transmission the voice messaging that bandwidth is 2048Mbit, and the second SPI interface is used for transmission control information；
Relay interface unit and the communication interface of the 2nd FPGA processing units are third pcm interface and third SPI interface, and the 3rd PCM connects
Mouth is used for transmission the voice messaging that bandwidth is 64Kbit, and third SPI interface is used for transmission control and status information；Main control unit with
The communication interface of first FPGA processing units platform and the 2nd FPGA processing units is the 4th SPI interface, and the 4th SPI interface is for passing
Defeated control information；The communication interface of main control unit and cross-over control unit is GPMC interfaces, GPMC interfaces be used for transmission control and
Status information.
The course of work of the utility model is as follows：
1, caller process：
As shown in Fig. 2, receiver off-book, the off-hook detection module of user interface section generates off-hook after detecting receiver off-book
Signaling, off-hook signaling change into the PCM time slot data of 64K by the PCM codec of user interface section.Pass through the first FPGA again
Processing unit is multiplexed into time slot TS16, and being crossed to corresponding time slot by cross-over control unit is transmitted to the 2nd FPGA processing units,
Data after 2nd FPGA processing units demultiplexing are transmitted to programme-controlled exchange by relay interface unit, and programme-controlled exchange recognizes
Dialing tone is issued after receiver off-book, dialing tone changes into the PCM time slot data of 64K by the PCM codec of relay interface unit
The 2nd FPGA processing unit processes are sent to, data-reusing is transmitted to intersection by the 2nd FPGA processing units after the frame of the roads PCM30/32
Control unit is crossed to corresponding time slot by cross-over control unit and is transmitted to the first FPGA processing units, and the first FPGA processing is single
Data after member demultiplexing are transmitted to phone by user interface section.Communication link is established between phone and programme-controlled exchange,
It can dial, complete hook off process.
2, it is called process：
As shown in figure 3, programme-controlled exchange sends ring, the ring detection module of relay interface unit produces after detecting ring
Raw ringing condition information, ringing condition information is multiplexed into time slot TS16 by the 2nd FPGA processing units, by cross-over control list
Member is crossed to corresponding time slot and is transmitted to the first FPGA processing units, and the data after the first FPGA processing units demultiplexing are transmitted to user
Interface unit, the ring module of user interface section receives and sends ring to phone after ringing information, between interchanger and phone
Communication link is established, off-hook can be conversed, and ring process is completed.
3, cross-over configuration process：
Webmaster modification cross-over configuration table is handed down to main control unit, and main control unit hands over demand according to the information of cross-over configuration table
The related time-slot of fork issues cross-over control unit, and cross-over control unit carries out cross-over configuration to corresponding time slot position.Specific steps
It is as follows：
（1）Phone caller, receiver off-book, the off-hook detection module of user interface section are detected to generate after receiver off-book and be plucked
No. 30 phone analog voice signals are changed into 30 road 64Kbit voices by the PCM codec of machine status information, user interface section
PCM time slot data；
（2）Off hook state information is multiplexed into time slot TS16 by the first FPGA processing units, and the first FPGA processing units will
30 road 64Kbit voice PCM time slot data are transmitted to cross-over control unit after being multiplexed with phone PCM30/32 frames；Phone PCM30/32
Frame includes 32 time slots, and wherein time slot TS0 is used for transmission synchronizing information, and time slot TS16 is used for transmission channel associated signalling；Remaining time slot
TSi is used to load 30 road 64Kbit voice PCM time slot data, wherein；
（3）2nd FPGA processing units by user interface section by cross-over control unit transmit come phone PCM30/32
Frame data and corresponding channel associated signalling be demultiplexing as 64Kbit voices PCM time slots data and speech channel status information, and is transmitted to
After interface unit；
（4）64Kbit voice PCM time slot data are converted to analog voice signal by relay interface unit, and analog voice
Signal and speech channel status information pass programme-controlled exchange back；
（5）Phone is called, and programme-controlled exchange sends ring, after the ring detection module of relay interface unit detects ring
Generate ringing condition information, the 30 road analog voice signals that the PCM codec of relay interface unit exports programme-controlled exchange
Change into 30 road 64Kbit voice PCM time slot data；
（6）Ringing condition information is multiplexed into time slot TS16 by the 2nd FPGA processing units, and the 2nd FPGA processing units will
30 road 64Kbit voice PCM time slot data are transmitted to cross-over control unit after being multiplexed with 30/32 frames of programme-controlled exchange PCM；Program-controlled friendship
30/32 frames of PCM of changing planes include 32 time slots, and wherein time slot TS0 is used for transmission synchronizing information, and time slot TS16 is used for transmission with road
Signaling；Remaining time slot TSj is used to load 30 road 64Kbit voice PCM time slot data, wherein；Not into
Before row time-slot cross, the PCM time slots data in time slot TSj are interacted with the PCM time slot data in time slot TSi, wherein i=j；
（7）Modification cross-over configuration table is handed down to main control unit, and main control unit hands over demand according to the information of cross-over configuration table
The related time-slot of fork issues cross-over control unit；
（8）Cross-over control cell pairs carry out cross-over configuration after interface unit and user interface section corresponding time slot position,
The PCM time slots data of relay interface unit and corresponding channel associated signalling are crossed in corresponding user interface section time slot, are led to
Cross the intersection that time-slot cross realizes user interface section；After carrying out time-slot cross, the PCM time slots data in time slot TSj and time slot
PCM time slot data in TSi interact, wherein；
（9）First FPGA processing units by relay interface unit by cross-over control unit transmit come programme-controlled exchange
PCM30/32 frame data and corresponding channel associated signalling are demultiplexing as 64Kbit voices PCM time slots data and speech channel status information, and
It is transmitted to user interface section；
（10）The PCM time slot data of 64Kbit voices are converted to analog voice signal by user interface section, and simulation
Voice signal and speech channel status information pass phone back.
As shown in figure 4 above and Fig. 5, Fig. 4 is the principle schematic before cross-over configuration, and wherein phone 1 is transferred to user interface
The data transmission of the time slot n of the PCM codec of unit to the PCM codec of relay interface unit time slot n, phone 2 pass
The data transmission of the time slot m of the defeated PCM codec to user interface section to relay interface unit PCM codec when
Gap m, Fig. 5 are the principle schematics after cross-over configuration, wherein phone 1 be transferred to the PCM codec of user interface section when
For the data transmission of gap n to the time slot m of the PCM codec of relay interface unit, phone 2 is transferred to the PCM of user interface section
The data transmission of the time slot m of codec so completes cross-over configuration to the time slot n of the PCM codec of relay interface unit
Process.
4, line test procedure：
It is instructed to the first FPGA processing units as shown in fig. 6, network management system issues dependence test by main control unit, first
FPGA processing units are given to Subscriber Interface Module SIM after receiving instruction, and Subscriber Interface Module SIM receives control circuit test module after instruction
Correlation function test is carried out, and test is returned to the first FPGA processing units to fruit, test result is handled by main control unit
After be sent to network management system, the function of line test module mainly has test alternating voltage, DC voltage, insulation resistance, ring resistance
Whether answer machine etc..
Above disclosed is only specific embodiment of the present utility model, but the scope of protection of the utility model not office
It is limited to this, any one skilled in the art within the technical scope disclosed by the utility model, can readily occur in change
Change or modification, should be covered within the scope of the utility model.
Claims (9)
1. a kind of VDF intelligent crossovers device, it is characterised in that：Including user interface section, the first FPGA processing units, intersect control
Unit processed, the 2nd FPGA processing units, relay interface unit, main control unit；Phone is connect with the user interface section, described
User interface section, the first FPGA processing units, cross-over control unit, the 2nd FPGA processing units, relay interface unit are successively
Connection, the relay interface unit are connect with programme-controlled exchange unit；The main control unit respectively with the first FPGA processing units,
2nd FPGA processing units, the connection of cross-over control unit；
The user interface section for completing the detection of phone related status information and forwarding, the analog voice signal of phone into
Row pcm encoder, which is converted into being sent to the first FPGA processing units after PCM vocoded datas, to be handled, while the first FPGA
The PCM vocoded datas that processing unit unit sends over change into analog voice signal and pass phone back；
The first FPGA processing units are for handling the PCM vocoded datas that user interface section is sent, after processing
Data transfer give cross-over control unit, while being sent to user interface list after the data processing that cross-over control unit is sent
Member；
The cross-over control unit is used for PCM time-slot cross, according to the control information of main control unit, relay interface unit when
Gap signal and corresponding channel associated signalling are crossed in corresponding user interface section time slot, and user interface is realized by time-slot cross
The intersection of unit PCM voice data and phone status information；
The 2nd FPGA processing units are used to that relaying will to be sent to after processing data information that cross-over control unit is sent and connect
Mouthful unit, while being sent to cross-over control unit after the processing data information that relay interface unit sends over；
The relay interface unit is for completing the detection of programme-controlled exchange speech interface related status information and forwarding, program-controlled friendship
Change planes output analog voice signal carry out pcm encoder after change into PCM vocoded datas and be sent to the 2nd FPGA processing units
Processing, while the PCM vocoded datas that the 2nd FPGA processing units send over are changed into after analog signal and pass program-controlled friendship back
It changes planes；
Operation and control of the main control unit for the first FPGA processing units, the 2nd FPGA processing units, cross-over control unit.
2. a kind of VDF intelligent crossovers device according to claim 1, it is characterised in that：The user interface section includes
Dislodging machine testing module, ring module, power feeding module, audio transmission channel, PCM codec, line test module；It is described to pluck
On-hook detection module is to be in off hook state or hook state for detecting phone；The ring module refers to for receiving ring
It enables and generates bell signal and be transmitted to phone；The power feeding module is used to provide feed voltage for phone；The audio transmission is logical
Road is used for the shaping filter of analog voice signal；The PCM codec is used to the analog voice signal of phone changing into PCM languages
Sound coded data and the analog voice signal that PCM vocoded datas are changed into phone；The line test module is for testing
Combined-voltage, insulation resistance and the loop circuit of telephone wire.
3. a kind of VDF intelligent crossovers device according to claim 2, it is characterised in that：The dislodging machine testing module is logical
The voltage for crossing A/D chip testing known resistances calculates loop current by Ohm's law, is judged according to the size of loop current
Pluck hook state；
The ring module includes DC-DC circuit, for generating ringing voltage；
The power feeding module generates feed voltage by DC-DC circuit；
The audio transmission channel realizes the shaping filter of voice signal by operational amplifier and low-pass filter；
PCM codec PCM coding-decoding circuits as built in user interface chip SI32260 complete analog voice signal
PCM encoding and decoding；
The line test module completes correlation function test by A/D conversion circuits.
4. a kind of VDF intelligent crossovers device according to claim 1, it is characterised in that：The relay interface unit includes
Ring detection module, feed detection module, audio transmission channel, PCM codec；The ring detection module is for detecting journey
The bell signal that controlled switching system is sent out；
The feed detection module is used to detect the feed voltage of programme-controlled exchange output：The audio transmission channel is for simulating
The shaping filter of voice signal；
The PCM codec is used to the analog voice signal that programme-controlled exchange exports changing into PCM vocoded datas and will
PCM vocoded datas change into analog voice signal.
5. a kind of VDF intelligent crossovers device according to claim 4, it is characterised in that：The ring detection module passes through
A/D conversion circuits and signal processing circuit identify ringing condition；
The audio transmission channel realizes the shaping filter of voice signal by operational amplifier and low-pass filter；
PCM codec PCM coding-decoding circuits as built in trunk interface chip SI3050 realize the encoding and decoding of voice signal.
6. a kind of VDF intelligent crossovers device according to claim 1, it is characterised in that：The first FPGA processing units
Include mainly that clock module, PCM multiplexings and demultiplexing module, the clock module provide communication with the 2nd FPGA processing units
Synchronised clock, the PCM multiplexings of the first FPGA processing units and demultiplexing module are completed multiple user interface sections and are transmitted across
30 road 64Kbit voices of Lai and status information are multiplexed into a complete 30/32 road frame of PCM and are transmitted to cross-over control list
Member, while being transmitted to each user interface section after the 30/32 road frames of PCM that cross-over control unit sends over are demultiplexed；Institute
The 30 road 64Kbit languages that relay interface unit transmits are completed in the PCM multiplexings and demultiplexing module for stating the 2nd FPGA processing units
Sound and status information are multiplexed into a complete 30/32 road frame of PCM and are transmitted to cross-over control unit, while cross-over control
It is transmitted to relay interface unit after the 30/32 road frame demultiplexings of PCM that unit sends over.
7. a kind of VDF intelligent crossovers device according to claim 6, it is characterised in that：The PCM multiplexings and demultiplexing mould
Block is realized that multiplexing 30 road 64K voice messagings of Shi Ba are inserted respectively into 30 time slots, corresponding synchronization by FPGA internal logic circuits
Information and speech channel status information are inserted respectively into TS0 and TS16, and demultiplexing is the voice messaging for 30/32 frame being divided into 30 road 64K
It is transmitted to corresponding user interface section respectively with status information.
8. a kind of VDF intelligent crossovers device according to claim 1, it is characterised in that：The user interface section and
The communication interface of one FPGA processing units is the first pcm interface and the first SPI interface, and first pcm interface is used for transmission band
Width is the voice messaging of 64Kbit, and first SPI interface is used for transmission control and status information；The first FPGA processing is single
Member, the communication interface of the 2nd FPGA processing units and cross-over control unit are the second pcm interface and the second SPI interface, described the
Two pcm interfaces are used for transmission the voice messaging that bandwidth is 2048Mbit, and second SPI interface is used for transmission control information；Institute
It is third pcm interface and third SPI interface, the third to state relay interface unit and the communication interface of the 2nd FPGA processing units
Pcm interface is used for transmission the voice messaging that bandwidth is 64Kbit, and the third SPI interface is used for transmission control and status information；
The main control unit and the communication interface of the first FPGA processing units platform and the 2nd FPGA processing units are the 4th SPI interfaces, institute
It states the 4th SPI interface and is used for transmission control information；The communication interface of the main control unit and cross-over control unit is GPMC interfaces,
The GPMC interfaces are used for transmission control and status information.
9. a kind of VDF intelligent crossovers device according to claim 1, it is characterised in that：The main control unit includes CPU moulds
Block, ethernet control module and memory module；The CPU module is used for single to the first FPGA processing units, the 2nd FPGA processing
Member and cross-over control unit operation control, data processing and network management interface data input and output；The ethernet control module is used
In the transmitting-receiving of Ethernet data；The memory module is stored and is cached for data.
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| CN201820218974.0U CN207995300U (en) | 2018-02-07 | 2018-02-07 | A kind of VDF intelligent crossovers device |
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