CN207926900U - Electronic equipment and wireless headset - Google Patents
Electronic equipment and wireless headset Download PDFInfo
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- CN207926900U CN207926900U CN201721783728.1U CN201721783728U CN207926900U CN 207926900 U CN207926900 U CN 207926900U CN 201721783728 U CN201721783728 U CN 201721783728U CN 207926900 U CN207926900 U CN 207926900U
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Abstract
The utility model provides electronic equipment and wireless headset, one of which electronic equipment, the electronic equipment include processor, the switching circuit being connect with an IC bus IIC interfaces of the processor and the multiple IIC electronic devices being connect with the switching circuit.Wherein, the multiple IIC electronic devices addresses IIC having the same.The switching circuit is connected with any IIC electronic devices.The processor establishes the communication connection with any electronic device, and is based on the communication connection and any IIC electric devices into row data communication.The IIC electronic devices that the utility model allows the processor in the equipment to connect multiple identical addresses IIC by extending the addresses IIC realize that processor is chaotic into data receiver will not occur when row data communication with the electronic device of multiple identical addresses IIC.
Description
Technical field
The utility model belongs to field of computer technology, specifically, being related to a kind of electronic equipment and a kind of wireless headset.
Background technology
Currently, many electronic equipments, such as wireless headset, generally use have IIC (Iner Integrated
Circuit, IC bus) interface electronic device carry out circuit design.
In the prior art, most processing component has IIC interfaces, wherein processor module can be processor, MCU (micro-
Processor), controller etc..Processing component is by bidirectional data line and with the electronic device such as IIC sensors of IIC interfaces
Or other processing component foundation with IIC interfaces are connected into row data communication.By taking IIC sensors as an example, set carrying out circuit
Timing, for each IIC sensor tool there are one the addresses IIC, processor is logical by IIC addressing and IIC sensors progress data
Letter, therefore the same IIC interfaces of processor can connect the IIC sensors of multiple and different addresses IIC, realize and passed with multiple IIC
The communication of sensor.Therefore circuit design is carried out using the electronic device with IIC interfaces, circuit design and structure can be simplified,
The resource of processor interface is saved simultaneously.
But since the addresses IIC of some specific IIC electronic devices are fixed and can not be by programming with changing its IIC
Location, if the IIC electronic devices of the identical addresses IIC are connected to same group of IIC interface of processor, processor passes through IIC
When addressing, it will result in data receiver and confusion occur.
Invention content
In view of this, the utility model provides a kind of electronic equipment, to be made in the equipment by extending the addresses IIC
Processor connects the IIC electronic devices of multiple identical addresses IIC, realizes the electronic device of processor and multiple identical addresses IIC
Data communication.
In order to solve the above-mentioned technical problem, the utility model provides a kind of electronic equipment, including processor and the place
The switching circuit of the IIC interfaces connection of reason device and the multiple IIC electronic devices being connect with the switching circuit；Wherein, institute
State multiple IIC electronic devices addresses IIC having the same；
The switching circuit is connected with any IIC electronic devices；The processor is established and any electronic device
Communication connection, and the communication connection and any IIC electric devices are based on into row data communication.
Preferably, the IIC interfaces include data-interface and clock interface；The clock interface of the processor is opened with described
Powered-down road connection；The switching circuit is connect with the clock interface of the multiple IIC electronic devices respectively；The number of the processor
It is connect respectively with the data-interface of the multiple IIC electronic devices according to interface；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；It is logical
The response signal that its data-interface receives any IIC electronic devices is crossed, the communication link with any IIC electronic devices is established
It connects；Wherein, when the response signal is that any IIC electric devices receive the addressing instruction and the clock signal
It is sent by its data-interface.
Preferably, the IIC interfaces include data-interface and clock interface；The data-interface of the processor is opened with described
Powered-down road connection；The switching circuit is connect with the data-interface of the multiple IIC electronic devices respectively；The processor when
Clock interface is connect with the clock interface of the multiple IIC electronic devices respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；It is logical
The response signal that its data-interface receives any IIC electronic devices is crossed, the communication link with any IIC electronic devices is established
It connects；Wherein, when the response signal is that any IIC electronic devices receive the addressing instruction and the clock signal
It sends.
Preferably, the switching circuit includes multiple analog interfaces, and the multiple analog interface includes a simulation input
Interface and multiple simulation output interfaces；
The simulation input interface is connect with the clock interface of the processor, the multiple simulation output interface respectively with
The clock interface of the multiple IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent out according to the processor
The switching command sent establishes the analog channel of any simulation output interface and the simulation input interface, makes the switch electricity
Road is connected with the IIC electronic devices for connecting any simulation output interface.
Preferably, the switching circuit includes multiple analog interfaces, and the multiple analog interface includes a simulation input
Interface and multiple simulation output interfaces；
The simulation input interface is connect with the data-interface of the processor, the multiple simulation output interface respectively with
The data-interface of the multiple IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent out according to the processor
The switching command sent establishes the analog channel of any simulation output interface and the simulation input interface, makes the switch electricity
Road is connected with the IIC electronic devices for connecting any simulation output interface.
Preferably, the IIC electronic devices include IIC sensors.
Preferably, the IIC electronic devices include the processing component for having IIC interfaces.
The utility model additionally provides a kind of wireless headset, including processor, the IIC interfaces company with the processor
The switching circuit connect and the multiple IIC sensors being connect with the switching circuit；Wherein, the multiple IIC sensors have
The identical addresses IIC；
The switching circuit and any IIC sensor conducts；The processor is established and any IIC sensors
Communication connection, and the communication connection and any IIC sensors are based on into row data communication.
Preferably, the IIC interfaces include data-interface and clock interface；The clock interface of the processor is opened with described
Powered-down road connection；The switching circuit is connect with the clock interface of the multiple IIC sensors respectively；The data of the processor
Interface is connect with the data-interface of the multiple IIC sensors respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；It is logical
The response signal that its data-interface receives any IIC sensors is crossed, the communication connection with any IIC sensors is established；Its
In, the response signal is that any IIC sensors pass through it when receiving the addressing instruction and the clock signal
What data-interface was sent.
Preferably, the IIC interfaces include data-interface and clock interface；The data-interface of the processor is opened with described
Powered-down road connection；The switching circuit is connect with the data-interface of the multiple IIC sensors respectively；The clock of the processor
Interface is connect with the clock interface of the multiple IIC sensors respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；It is logical
The response signal that its data-interface receives any IIC sensors is crossed, the communication connection with any IIC sensors is established；Its
In, the response signal is that any IIC sensors are sent when receiving the addressing instruction and the clock signal.
Compared with prior art, the utility model can be obtained including following technique effect：
Provide a kind of electronic equipment and a kind of wireless headset in the utility model, the electronic equipment include processor, with
The switching circuit of the IIC interfaces connection of the processor and the multiple IIC electronic devices being connect with the switching circuit.Its
In, the multiple IIC electronic devices addresses IIC having the same.By be arranged switching circuit realize the same time only with ground
Any IIC electronic devices conducting in the identical multiple IIC electronic devices in location.Thereby may be ensured that processor establish with it is described
The communication connection of any electronic device and based on it is described communication connection with any IIC electric devices into row data communication when,
Data receiver confusion will not occur, realize that processor is communicated with the data of the electronic device of multiple identical addresses IIC.
Description of the drawings
Attached drawing described herein is used to provide a further understanding of the present invention, and constitutes one of the utility model
Point, the exemplary embodiment of the utility model and the description thereof are used to explain the utility model, does not constitute to the utility model
Improper restriction.In the accompanying drawings：
Fig. 1 is the electrical block diagram of the one embodiment for a kind of electronic equipment that the utility model embodiment provides；
Fig. 2 is the circuit structure signal of another embodiment of a kind of electronic equipment that the utility model embodiment provides
Figure；
Fig. 3 is the circuit structure signal of another embodiment of a kind of electronic equipment that the utility model embodiment provides
Figure；
Fig. 4 is a kind of electrical block diagram of the one embodiment for wireless headset that the utility model embodiment provides.
Specific implementation mode
The embodiment of the utility model is described in detail below in conjunction with accompanying drawings and embodiments, thereby to the utility model
How applied technology method solves technical problem and reaches the realization process of technical effect to fully understand and implement.
The utility model is applicable in but is not limited to IIC (Iner Integrated Circuit, IC bus)
The case where addresses IIC of electronic device are fixed and are not available for addressing can be applied to the electronics of any required addresses extension IIC
In equipment, such as wireless headset, intelligent wearable device etc..
When IIC electronic devices in order to solve the identical addresses IIC are connected to same group of IIC interface of processor, cause to count
Chaotic technical problem occurs according to receiving, inventor gives the embodiment of the utility model by a series of researchs.In this programme
Give a kind of electronic equipment, including processor, the switching circuit that is connect with an IIC interfaces of the processor and with it is described
Multiple IIC electronic devices of switching circuit connection.Wherein, the multiple IIC electronic devices addresses IIC having the same.Pass through
Switching circuit is set and realizes that any IIC electronic devices in multiple IIC electronic devices only identical with address of same time are led
It is logical.Processor be thereby may be ensured that in the communication connection established with any electronic device and be based on the communication connection and institute
When stating any IIC electric devices into row data communication, data receiver confusion will not occur, realize processor and multiple identical IIC
The data of the electronic device of address communicate.
Technical solutions of the utility model are described in detail below in conjunction with attached drawing.
Fig. 1 is the circuit structure signal of one embodiment in a kind of electronic equipment that the utility model embodiment provides
Figure, the equipment may include：Processor 101, the switching circuit being connect with an IC bus IIC interfaces of processor 101
102 and multiple IIC electronic devices for being connect with switching circuit 102；Wherein, the multiple IIC electronic devices are having the same
The addresses IIC.
The specific number of IIC electronic devices is not limited in the present embodiment, the circuit structure of the electronic equipment in Fig. 1 shows
In intention, it is that the first IIC electronic devices 103 and the 2nd IIC electronic devices 104 carry out respectively only to provide two IIC electronic devices
Signal.
Switching circuit 102 is connected with any IIC electronic devices.
Processor 101 establishes the communication connection with any electronic device, and electrical with any IIC based on communicating to connect
Device is into row data communication.
As shown in Figure 1, switching circuit 102 is connected with the first IIC electronic devices 103 in advance, at this time processor 101 and first
IIC electronic devices 103 realize physical connection.
Processor 101 sends the communication protocols based on IIC after realizing the physical connection with the first IIC electronic devices 103
The communication request of view is to the first IIC electronic devices 103.First IIC electronic devices 103 receive the communication request of processor transmission
Response signal is sent afterwards to the first IIC electronic devices 103, is communicated to connect into row data communication to establish.
Optionally, switching circuit 102 is logic circuit, including a simulation input interface and multiple simulation output interfaces,
Wherein the simulation input interface is connect with the IIC interfaces of processor 101, multiple simulation output interfaces respectively with IIC electronic devices
IIC interfaces connect one by one.Processor 101 sends the switching that switching command controls switching circuit 102 according to default switching law
The connection of simulation input interface and any one simulation output interface so that the processor 101 is only capable of and an IIC in the same time
Electronic device establishes physical connection.
Optionally, which can be that the control switching circuit 102 is built successively in preset interval time
The analog channel of vertical any simulation output interface and the simulation input interface, make switching circuit 102 with connect it is any simulate it is defeated
The IIC electronic devices of outgoing interface are connected.I.e. after processor 101 and the conducting of the first IIC electronic devices 103, if there is no number
According to transmission, then controls the switching circuit 102 in preset time preprocessor 103 and is connected with the 2nd IIC electronic devices 104,
Until detecting any IIC electronic devices, there are data transmissions.
It is also possible that in processor 101 and the current any IIC electronic devices data sign off for establishing communication connection
Afterwards, control switching circuit 102 is connected with next IIC electronic devices and establishes communication connection successively, thus into row data communication.
I.e. processor 101 is currently connected with the first IIC electronic devices 103 and after establishing communication connection, until processor 101 detect with
After completing data transmission between first IIC electronic devices 103, then controls switching circuit 102 and led with the 2nd IIC electronic devices 104
Lead to and establishes communication connection.Until between the 2nd IIC electronic devices 104 data transmission it is complete after, continue control switching circuit
102 and the first IIC electronic devices 103 be connected.
Above-mentioned switching law can ensure processor 101 in multiple IIC electronics only identical with the addresses IIC of same time
An IIC electronic device in device is connect into row data communication to solve IIC electronic devices identical with multiple addresses
When occur causing data receiver that chaotic technical problem occurs.Certainly, the utility model does not limit logic switch specifically
Switching law, can also be any in addition to above-mentioned switching law can ensure that processor 101 is only identical as address in the same time
Multiple IIC electronic devices in a switching law into row data communication.
In the present embodiment, IIC electronic devices can be have IIC interfaces processing component for example, MCU (microcontroller),
Controller, processor etc. be any can to carry out data transmission or the processor module of data processing；It can also be any IIC sensings
Device is not limited in any way herein such as acceleration transducer, infrared sensor, pressure sensor.
In the present embodiment, realized in multiple IIC electronics devices only identical with address of same time by the way that switching circuit is arranged
Any IIC electronic devices conducting in part thereby may be ensured that processor is establishing the communication link with any electronic device
When connecing and being based on the communication connection and any IIC electric devices into row data communication, data receiver confusion will not occur,
Realize that processor is communicated with the data of the electronic device of multiple identical addresses IIC.
Fig. 2 is the circuit structure signal of another embodiment in a kind of electronic equipment that the utility model embodiment provides
Figure, it includes processor 101 in Fig. 1 embodiments which, which removes, is connect with an IC bus IIC interfaces of processor 101
Switching circuit 102 and multiple IIC electronic devices for being connect with switching circuit 102 outside.IIC interfaces include data-interface and
The clock interface of clock interface, processor 101 is connect with switching circuit 102；Switching circuit 102 respectively with multiple IIC electronics devices
The clock interface of part connects；The data-interface of processor 101 is connect with the data-interface of multiple IIC electronic devices respectively.
Processor 101 sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal.It is logical
The response signal that its data-interface receives any IIC electronic devices is crossed, the communication connection with any IIC electronic devices is established.Its
In, the response signal is that any IIC electric devices are sent out when receiving addressing instruction and clock signal by its data-interface
It send.
The process that processor 101 and IIC electronic devices establish communication connection is that IIC electronic devices must simultaneously receive
The addressing instruction and clock signal that processor 101 is sent, carry the addresses IIC and itself address IIC in confirming the addressing instruction
Response signal can be just generated after identical, communicated to connect to be established with processor 101.By switching circuit 102 to clock signal
Time-sharing multiplex is carried out, is only capable of receiving clock signal there are one IIC electronic devices in the same time, even if other addresses are identical
IIC electronic devices have received the addressing instruction of the transmission of processor 101, but not receiving clock signal still will not generate sound
Induction signal, therefore be only capable of communicating to connect into row data communication with an IIC electronic devices foundation in same time processor 101.
The present embodiment is connect by switching circuit 102 with the clock interface of multiple IIC electronic devices, and time-sharing multiplex original is utilized
Reason carries out time-sharing multiplex to clock signal, i.e., the clock signal of two IIC electronic devices is realized by the switching of switching circuit 102
Time-sharing multiplex.When switching circuit 101 is connected with the clock interface of the first IIC electronic devices 103, only the first IIC electronics
Device 103 receives clock signal, and the 2nd IIC electronic devices 104 can not receive clock signal, at this time the 2nd IIC electronics devices
Part 104 can not generate response signal and establish and locate receiving the addressing instruction of the transmission of processor 101 even if by data-interface
Manage the communication connection of device 101.
Optionally, as another embodiment, the switching circuit 102 includes multiple analog interfaces, the multiple simulation
Interface includes a simulation input interface and multiple simulation output interfaces；
Simulation input interface is connect with the clock interface of processor 101, multiple simulation output interfaces respectively with it is the multiple
The clock interface of IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent out according to the processor
The switching command sent establishes the analog channel of any simulation output interface and the simulation input interface, makes the switch electricity
Road is connected with the IIC electronic devices for connecting any simulation output interface.
In the present embodiment, the time-sharing multiplex of the clock signal of IIC electronic devices is controlled by switching circuit, realizes processing
Even if device realizing processor in the case where an IIC interface is connected to multiple IIC electronic devices, the same time be only capable of with
One IIC electronic device establishes communication connection, and to ensure when into row data communication, data receiver confusion will not occur, real
Existing processor is communicated with the data of the electronic device of multiple identical addresses IIC.
Fig. 3 is the circuit structure signal of another embodiment in a kind of electronic equipment that the utility model embodiment provides
Figure, it includes the processor 101 described in Fig. 1 embodiments, the IC bus IIC interfaces with processor 101 which, which removes,
Outside the switching circuit 102 of connection and the multiple IIC electronic devices being connect with switching circuit 102.The IIC interfaces include data
Interface and clock interface；The data-interface of the processor 101 is connect with switching circuit 102.Switching circuit 102 respectively with institute
State the data-interface connection of multiple IIC electronic devices；The clock interface of processor 101 respectively with multiple IIC electronic devices when
Clock interface connects.
Processor 101 sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal.It is logical
The response signal that its data-interface receives any IIC electronic devices is crossed, the communication connection with any IIC electronic devices is established.Its
In, response signal is that any IIC electronic devices are sent when receiving addressing instruction and clock signal.
The present embodiment is connect by switching circuit 102 with the data-interface of multiple IIC electronic devices, is realized to multiple
The data-interface of IIC electronic devices carries out time-sharing multiplex.It is connect by the data to the IIC electronic devices with the identical addresses IIC
Mouthful time-sharing multiplex is carried out, ensure that the identical multiple IIC electronic devices in same time address are only capable of there are one IIC electronic devices
The addressing instruction of the transmission of processor 101 is received, i.e. switching circuit 101 is connected with the data-interface of the first IIC electronic devices 103
When, only the first IIC electronic devices 103 receive addressing instruction, and the 2nd IIC electronic devices 104 can not receive addressing instruction,
It can not be generated the 2nd IIC electronic devices 104 receive the clock signal of the transmission of processor 101 even if by clock interface at this time
Response signal establishes the communication connection with processor 101.
Optionally, as another embodiment, the switching circuit includes multiple analog interfaces, the multiple analog interface
Including a simulation input interface and multiple simulation output interfaces；
The simulation input interface is connect with the data-interface of the processor, the multiple simulation output interface respectively with
The data-interface of the multiple IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent out according to the processor
The switching command sent establishes the analog channel of any simulation output interface and the simulation input interface, makes the switch electricity
Road is connected with the IIC electronic devices for connecting any simulation output interface.
In the present embodiment, point location that IIC electronic devices are controlled by switching circuit is multiplexed, even if realizing processor one
In the case that a IIC interfaces are connected to multiple IIC electronic devices, it is only capable of establishing with an IIC electronic device in the same time logical
Letter connection will not occur data receiver confusion, realize processor and multiple identical IIC to ensure when into row data communication
The data of the electronic device of address communicate.
Fig. 4 is the circuit structure signal of one embodiment in a kind of wireless headset that the utility model embodiment provides
Figure, the equipment may include：Processor 201, the switching circuit being connect with an IC bus IIC interfaces of processor 201
202 and multiple IIC sensors for being connect with switching circuit 202；Wherein, the multiple IIC senser elements IIC having the same
Address.
The switching circuit 202 and any IIC sensor conducts.Processor 201 is established logical with any IIC sensors
Letter connection, and communication connection and any IIC sensors are based on into row data communication.
For the sensor such as acceleration transducer, infrared sensor of multiple same models may be needed in wireless headset
Deng for gathered data information.The sensor of some same models is that fixed can not be carried out by program due to its address IIC
When addressing, therefore using the circuit design of IIC interfaces, the IIC interfaces of processor need to connect the identical IIC biographies in multiple addresses
Sensor.Pass through switching circuit 202 and arbitrary IIC sensor conducts so that processor 202 is only capable of and an IIC in the same time
Sensor foundation is communicated to connect into row data communication.
Optionally, switching circuit 202 is logic circuit, including a simulation input interface and multiple simulation output interfaces,
Wherein the simulation input interface is connect with the IIC interfaces of processor 201, multiple simulation output interfaces respectively with IIC sensors
IIC interfaces connect one by one.Processor 101 sends the switching mould that switching command controls switching circuit 202 according to default switching law
The connection of quasi- input interface and any one simulation output interface so that the processor 201 is only capable of passing with an IIC in the same time
Sensor establishes physical connection.
Optionally, which can be that the control switching circuit 202 is built successively in preset interval time
The analog channel of vertical any simulation output interface and the simulation input interface, make switching circuit 202 with connect it is any simulate it is defeated
The IIC sensor conducts of outgoing interface.I.e. after processor 201 and the conducting of the first IIC sensors 203, passed if there is no data
It is defeated, then it controls the switching circuit 202 in preset time preprocessor 203 and is connected with the 2nd IIC sensors 204, Zhi Daojian
Measuring any IIC sensors, there are data transmissions.
It is also possible that after any IIC sensing datas sign off that processor 201 is communicated to connect with current foundation,
Control switching circuit 202 successively with next IIC sensor conducts, into row data communication.I.e. processor 201 is currently with
After one IIC sensors 203 are connected and establish communication connection, until processor 201 detects between the first IIC sensors 203
After completing data transmission, then controls switching circuit 202 and the conducting of the 2nd IIC sensors 204 and establish communication connection.Until with this
After data transmission is complete between 2nd IIC sensors 204, continues to control switching circuit 202 and the first IIC sensors 203 are connected.
Above-mentioned switching law can ensure that processor 201 is passed in multiple IIC only identical with the addresses IIC of same time
One in sensor occurs causing to count into row data communication to solve when IIC sensors identical with multiple addresses are connect
Chaotic technical problem occurs according to receiving.Certainly, the utility model does not limit logic switch switching law specifically, except upper
It states and can also be any outside switching law processor 201 can be ensured in multiple IIC electronics only identical with address of same time
A switching law into row data communication in device.
Processor 202 in right wireless headset not only can connect IIC sensors by IIC interfaces, can also connect IIC
Noise reduction chip, the MCU etc. with IIC interfaces.
In the present embodiment, by be arranged switching circuit realize wireless headset in processor the same time only with address phase
Any IIC sensor conducts in same multiple IIC sensors；It thereby may be ensured that processor is being established and any IIC
The communication connection of sensor and based on it is described communication connection with any IIC sensors into row data communication when, will not occur
Data receiver is chaotic, realizes that processor is communicated with the data of the sensor of multiple identical addresses IIC.
In a typical configuration, computing device include one or more processors (CPU), input/output interface,
Network interface and memory.
Memory may include computer-readable medium in volatile memory, random access memory (RAM) and/or
The forms such as Nonvolatile memory, such as read-only memory (ROM) or flash memory (flash RAM).Memory is computer-readable medium
Example.
Computer-readable medium includes permanent and non-permanent, removable and non-removable media can be by any method
Or technology realizes information storage.Information can be computer-readable instruction, data structure, the module of program or other data.
The example of the storage medium of computer include, but are not limited to phase transition internal memory (PRAM), static RAM (SRAM),
Dynamic random access memory (DRAM), other kinds of random access memory (RAM), read-only memory (ROM), electrically erasable
Except programmable read only memory (EEPROM), fast flash memory bank or other memory techniques, read-only disc read only memory (CD-ROM) (CD-
ROM), digital versatile disc (DVD) or other optical storages, magnetic tape cassette, tape magnetic disk storage or other magnetism are deposited
Equipment or any other non-transmission medium are stored up, can be used for storage and can be accessed by a computing device information.According to boundary herein
Fixed, computer-readable medium does not include non-temporary computer readable media (transitory media), such as data-signal of modulation
And carrier wave.
Some vocabulary has such as been used to censure specific components in specification and claim.Those skilled in the art answer
It is understood that hardware manufacturer may call the same component with different nouns.This specification and claims are not with name
The difference of title is used as the mode for distinguishing component, but is used as the criterion of differentiation with the difference of component functionally.Such as logical
The "comprising" of piece specification and claim mentioned in is an open language, therefore should be construed to " include but do not limit
In "." substantially " refer in receivable error range, those skilled in the art can be described within a certain error range solution
Technical problem basically reaches the technique effect.In addition, " coupling " word includes any direct and indirect electric property coupling herein
Means.Therefore, if it is described herein that a first device is coupled to a second device, then representing the first device can directly electrical coupling
It is connected to the second device, or the second device indirectly electrically coupled through other devices or coupling means.Specification
Subsequent descriptions are preferred embodiment of the present invention, and so the description is to illustrate the rule of the utility model
For the purpose of, it is not intended to limit the scope of the utility model.The scope of protection of the utility model is when regarding appended claims institute circle
Subject to the person of determining.
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability
Including so that commodity or system including a series of elements include not only those elements, but also include not clear
The other element listed, or further include for this commodity or the intrinsic element of system.In the feelings not limited more
Under condition, the element that is limited by sentence "including a ...", it is not excluded that including the element commodity or system in also
There are other identical elements
Several preferred embodiments of the present invention have shown and described in above description, but as previously described, it should be understood that this
Utility model is not limited to form disclosed herein, is not to be taken as excluding other embodiments, and can be used for various
Other combinations, modification and environment, and above-mentioned introduction or the skill of related field can be passed through in application contemplated scope described herein
Art or knowledge are modified.And changes and modifications made by those skilled in the art do not depart from the spirit and scope of the utility model,
It then all should be in the protection domain of the appended claims for the utility model.
Claims (10)
1. a kind of electronic equipment, which is characterized in that the IC bus IIC interfaces including processor, with the processor
The switching circuit of connection and the multiple IIC electronic devices being connect with the switching circuit；Wherein, the multiple IIC electronics device
The part addresses IIC having the same；
The switching circuit is connected with any IIC electronic devices；The processor establishes the communication with any electronic device
Connection, and the communication connection and any IIC electric devices are based on into row data communication.
2. equipment according to claim 1, which is characterized in that the IIC interfaces include data-interface and clock interface；Institute
The clock interface for stating processor is connect with the switching circuit；The switching circuit respectively with the multiple IIC electronic devices
Clock interface connects；The data-interface of the processor is connect with the data-interface of the multiple IIC electronic devices respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；Pass through it
Data-interface receives the response signal of any IIC electronic devices, establishes the communication connection with any IIC electronic devices；Its
In, the response signal is that any IIC electric devices pass through when receiving the addressing instruction and the clock signal
What its data-interface was sent.
3. equipment according to claim 1, which is characterized in that the IIC interfaces include data-interface and clock interface；Institute
The data-interface for stating processor is connect with the switching circuit；The switching circuit respectively with the multiple IIC electronic devices
Data-interface connects；The clock interface of the processor is connect with the clock interface of the multiple IIC electronic devices respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；Pass through it
Data-interface receives the response signal of any IIC electronic devices, establishes the communication connection with any IIC electronic devices；Its
In, the response signal is that any IIC electronic devices are sent when receiving the addressing instruction and the clock signal.
4. equipment according to claim 2, which is characterized in that the switching circuit includes multiple analog interfaces, described more
A analog interface includes a simulation input interface and multiple simulation output interfaces；
The simulation input interface is connect with the clock interface of the processor, the multiple simulation output interface respectively with it is described
The clock interface of multiple IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent according to the processor
Switching command establishes the analog channel of any simulation output interface and the simulation input interface, make the switching circuit with
Connect the IIC electronic devices conducting of any simulation output interface.
5. equipment according to claim 3, which is characterized in that the switching circuit includes multiple analog interfaces, described more
A analog interface includes a simulation input interface and multiple simulation output interfaces；
The simulation input interface is connect with the data-interface of the processor, the multiple simulation output interface respectively with it is described
The data-interface of multiple IIC electronic devices connects；
The switching circuit is connected with any IIC electronic devices：The switching circuit is sent according to the processor
Switching command establishes the analog channel of any simulation output interface and the simulation input interface, make the switching circuit with
Connect the IIC electronic devices conducting of any simulation output interface.
6. equipment according to claim 1, which is characterized in that the IIC electronic devices include IIC sensors.
7. equipment according to claim 1, which is characterized in that the IIC electronic devices include the processing for having IIC interfaces
Component.
8. a kind of wireless headset, which is characterized in that the switch electricity being connect including processor, with an IIC interfaces of the processor
Road and the multiple IIC sensors being connect with the switching circuit；Wherein, the multiple IIC sensors IIC having the same
Location；
The switching circuit and any IIC sensor conducts；The processor establishes the communication link with any IIC sensors
It connects, and is based on the communication connection and any IIC sensors into row data communication.
9. wireless headset according to claim 8, which is characterized in that the IIC interfaces include that data-interface and clock connect
Mouthful；The clock interface of the processor is connect with the switching circuit；The switching circuit respectively with the multiple IIC sensors
Clock interface connection；The data-interface of the processor is connect with the data-interface of the multiple IIC sensors respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；Pass through it
Data-interface receives the response signal of any IIC sensors, establishes the communication connection with any IIC sensors；Wherein, institute
It is that any IIC sensors are connect when receiving the addressing instruction and the clock signal by its data to state response signal
What mouth was sent.
10. wireless headset according to claim 8, which is characterized in that the IIC interfaces include that data-interface and clock connect
Mouthful；The data-interface of the processor is connect with the switching circuit；The switching circuit respectively with the multiple IIC sensors
Data-interface connection；The clock interface of the processor is connect with the clock interface of the multiple IIC sensors respectively；
The processor sends addressing instruction by its data-interface and passes through its clock interface tranmitting data register signal；Pass through it
Data-interface receives the response signal of any IIC sensors, establishes the communication connection with any IIC sensors；Wherein, institute
It is that any IIC sensors are sent when receiving the addressing instruction and the clock signal to state response signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721783728.1U CN207926900U (en) | 2017-12-19 | 2017-12-19 | Electronic equipment and wireless headset |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721783728.1U CN207926900U (en) | 2017-12-19 | 2017-12-19 | Electronic equipment and wireless headset |
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| Publication Number | Publication Date |
|---|---|
| CN207926900U true CN207926900U (en) | 2018-09-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721783728.1U Active CN207926900U (en) | 2017-12-19 | 2017-12-19 | Electronic equipment and wireless headset |
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| Country | Link |
|---|---|
| CN (1) | CN207926900U (en) |
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