CN207909133U - A kind of embedded chip applied to navigation system - Google Patents
A kind of embedded chip applied to navigation system Download PDFInfo
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- CN207909133U CN207909133U CN201820159162.3U CN201820159162U CN207909133U CN 207909133 U CN207909133 U CN 207909133U CN 201820159162 U CN201820159162 U CN 201820159162U CN 207909133 U CN207909133 U CN 207909133U
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Abstract
The utility model discloses a kind of embedded chips applied to navigation system, including：Processor core,Static RAM SRAM,Reservoir FLASH,Dma circuit,Timer Timer,Watchdog circuit WDT,EMIF interfaces,Jtag interface and 64 GPIO interfaces,Processor core passes through ahb bus and static RAM SRAM,EMIF interfaces,Dma circuit,Jtag interface connects,Reservoir FLASH,64 GPIO interfaces,Watchdog circuit WDT,Timer Timer is connect by APB buses with ahb bus,AHB/APB bridge modules are provided between APB buses and ahb bus,RS 485/RS422 interfaces are provided on 64 GPIO interfaces,SPI interface,I2C interface,232 interfaces of RS,PWM programmable interfaces,GPIO interface,ADC input interfaces.The utility model integrates a variety of data-interfaces, it may not be necessary to which outside extension just disclosure satisfy that the demand being connect with various plate grade elements, realize One Chip Solutions by connecting multiple interfaces and double-core processing in ahb bus and APB buses on chip.
Description
Technical field
The utility model is related to navigation system, especially a kind of embedded chip applied to navigation system.
Background technology
Navigation system refers to the navigation for navigation, aviation, astronomy, the hydrology, land transportation etc., guidance device and phase
Pass field, electronic navigation system include radionavigation, radar navigation, satellite navigation etc., and the principle of satellite navigation is to utilize GPS
Satellite positioning, then determine by equipment such as gyroscopes the variation in direction.
The kinds of electronic components used in navigation system at present is various, and interface type is complicated, common processor chips
Integrated number of ports amount and type are insufficient, it is difficult to meet the needs of being connect with various plate grade elements, or external can only extend each
Kind interface, increases cost and the space occupied.
Utility model content
To solve the above-mentioned problems, the purpose of this utility model is to provide a kind of being applied to for integrated a plurality of types of interfaces
The embedded chip of navigation system.
The technical solution adopted in the utility model is：
A kind of embedded chip applied to navigation system, including：Processor core, static RAM
SRAM, reservoir FLASH, dma circuit, timer Timer, watchdog circuit WDT, EMIF interface, jtag interface and 64
GPIO interface, the processor core by AHB buses and static RAM SRAM, EMIF interface, dma circuit,
Jtag interface connects, and the reservoir FLASH, 64 GPIO interfaces, watchdog circuit WDT, timer Timer are total by APB
Line is connect with ahb bus, and AHB/APB bridge modules, 64 GPIO interfaces are provided between the APB buses and ahb bus
On be provided with RS-485/RS422 interfaces, SPI interface, I2C interface, RS-232 interface, PWM programmable interfaces, GPIO interface,
ADC input interfaces.
Further, external interrupt control register ExtInt there are two being also set up on 64 GPIO interfaces.
Further, the RS-485/RS422 interface quantities are two, and the SPI interface quantity is four, the I2C
Interface quantity is four, and the RS-232 interface quantity is two, and the PWM programmable interfaces quantity is eight, the GPIO
Interface quantity is 16, and the ADC input interfaces quantity is ten.
Further, the processor core is connected by ahb bus with Ethernet network interface modules.
Further, the processor core uses 64 symmetrical dual processor cores.
The beneficial effects of the utility model：
The utility model is by connecting multiple interfaces and double-core processing in ahb bus and APB buses, on chip
Integrate a variety of data-interfaces, it may not be necessary to which outside extension just disclosure satisfy that the demand being connect with various plate grade elements, realize single
Piece solution reduces cost and navigation system internal component the space occupied.
Description of the drawings
Specific embodiment of the present utility model is described further below in conjunction with the accompanying drawings；
Fig. 1 is the interface diagram for the embedded chip that the utility model is applied to navigation system；
Fig. 2 is the annexation figure that the utility model is applied to inside the embedded chip of navigation system；
Fig. 3 is the external connection diagram for the embedded chip that the utility model is applied to navigation system.
Specific implementation mode
If Fig. 1-Fig. 3 is a kind of embedded chip applied to navigation system of the utility model, by A- in Fig. 1-Fig. 3
CHIP is indicated, including processor core, static RAM SRAM, reservoir FLASH, dma circuit, timer
Timer, watchdog circuit WDT, EMIF interface, Ethernet network interface modules, 64 GPIO interfaces；Preferably, processor core
Using 64 symmetrical dual processor cores for supporting RSIC-V instruction set, including two cores of CORE0 and CORE1；Processor core
The heart by ahb bus and static RAM SRAM, EMIF interface, dma circuit, Ethernet network interface modules and
Jtag interface connects.
Wherein, ahb bus is connected by AHB/APB bridge modules with APB buses.Reservoir FLASH, 64 GPIO interfaces,
Watchdog circuit WDT, timer Timer, encryption/decryption element Encrypt and temperature sensor be both connected in APB buses with
In transmission data；Ahb bus is mainly used for the connection between high-performance module, and APB buses are mainly used for outside the periphery of low bandwidth
Connection between if.
In order to adapt to the demand of various device connections, 64 GPIO interfaces can be configured to two external interrupt ExtInt, four
A RS-485/RS422 interfaces, four SPI interfaces, four I2C interfaces, four RS-232 interfaces, eight PWM programmable interfaces,
16 GPIO interfaces, ten road ADC inputs, greatly enrich the accommodation of this system.
The utility model is by connecting multiple interfaces and double-core processing in ahb bus and APB buses, on chip
Integrate a variety of data-interfaces, it may not be necessary to which outside extension just disclosure satisfy that the demand being connect with various plate grade elements, realize single
Piece solution reduces cost and navigation system internal component the space occupied.
The foregoing is merely the preferred embodiments of the utility model, the utility model is not limited to above-mentioned embodiment party
Formula, if with essentially identical means realize the technical solution of the utility model aim belong to the scope of protection of the utility model it
It is interior.
Claims (5)
1. a kind of embedded chip applied to navigation system, which is characterized in that including：Processor core, static random-access
Memory SRAM, reservoir FLASH, dma circuit, timer Timer, watchdog circuit WDT, EMIF interface, jtag interface and
64 GPIO interfaces, the processor core pass through ahb bus and static RAM SRAM, EMIF interface, DMA electricity
Road, jtag interface connection, the reservoir FLASH, 64 GPIO interfaces, watchdog circuit WDT, timer Timer pass through APB
Bus is connect with ahb bus, and AHB/APB bridge modules are provided between the APB buses and ahb bus, and 64 GPIO connect
Mouthful on be provided with RS-485/RS422 interfaces, SPI interface, I2C interface, RS-232 interface, PWM programmable interfaces, GPIO interface,
ADC input interfaces.
2. the embedded chip according to claim 1 applied to navigation system, it is characterised in that：64 GPIO connect
External interrupt control register ExtInt there are two being also set up on mouthful.
3. the embedded chip according to claim 1 applied to navigation system, it is characterised in that：The RS-485/
RS422 interface quantities are two, and the SPI interface quantity is four, and the I2C interface quantity is four, and the RS-232 connects
Mouth quantity is two, and the PWM programmable interfaces quantity is eight, and the GPIO interface quantity is 16, the ADC inputs
Interface quantity is ten.
4. the embedded chip according to claim 1 applied to navigation system, it is characterised in that：The processor core
It is connected with Ethernet network interface modules by ahb bus.
5. the embedded chip according to claim 1 applied to navigation system, it is characterised in that：The processor core
Using 64 symmetrical dual processor cores.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820159162.3U CN207909133U (en) | 2018-01-30 | 2018-01-30 | A kind of embedded chip applied to navigation system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820159162.3U CN207909133U (en) | 2018-01-30 | 2018-01-30 | A kind of embedded chip applied to navigation system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207909133U true CN207909133U (en) | 2018-09-25 |
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ID=63561723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820159162.3U Active CN207909133U (en) | 2018-01-30 | 2018-01-30 | A kind of embedded chip applied to navigation system |
Country Status (1)
| Country | Link |
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| CN (1) | CN207909133U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109445980A (en) * | 2018-12-04 | 2019-03-08 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of civil onboard module house dog design method based on X86-based |
-
2018
- 2018-01-30 CN CN201820159162.3U patent/CN207909133U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109445980A (en) * | 2018-12-04 | 2019-03-08 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of civil onboard module house dog design method based on X86-based |
| CN109445980B (en) * | 2018-12-04 | 2023-09-05 | 中国航空工业集团公司西安航空计算技术研究所 | X86 architecture-based design method for watchdog of civil airborne module |
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