CN207676910U - Superjunction field-effect tube - Google Patents
Superjunction field-effect tube Download PDFInfo
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- CN207676910U CN207676910U CN201721831506.2U CN201721831506U CN207676910U CN 207676910 U CN207676910 U CN 207676910U CN 201721831506 U CN201721831506 U CN 201721831506U CN 207676910 U CN207676910 U CN 207676910U
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Abstract
The utility model embodiment provides a kind of superjunction field-effect tube.Superjunction field-effect tube includes：Gate-source layer, drain electrode layer, PN junction type semiconductor layer and p-type compensate semiconductor layer.There is PN junction type semiconductor layer the first end and second end being oppositely arranged, first end to be connect with gate-source layer.P-type compensation semiconductor layer is embedded in the junction of second end and drain electrode layer, when for during superjunction field-effect tube being in Reverse recovery, it is PN junction conducting state that p-type, which compensates between semiconductor layer and PN junction type semiconductor layer, so as to include injected holes in PN junction type semiconductor layer, to maintain the carrier balance in PN junction type semiconductor layer.Therefore avoid that voltage waveform concussion occurs, and enhance the stability of circuit.
Description
Technical field
The utility model is related to semi-conductor discrete device technical fields, in particular to a kind of superjunction field-effect tube.
Background technology
Superjunction field-effect tube can effectively improve extension concentration to reduce the electric conduction of itself due to the ultra-deep PN junction having
Resistance, currently, it has the tendency that gradually substituting traditional plane field-effect tube in application on the market.
But also due to the had ultra-deep PN junction structure of superjunction field-effect tube so that the junction area of ultra-deep PN junction is very big.
When parasitic diode inside superjunction field-effect tube is in during Reverse recovery, the junction area of ultra-deep PN junction crosses conference
Cause in Recovery Process N knot to be flowed through more holes by pumping in a short time, according to electroneutral principle, the electron amount of N knots with
Number of cavities can disappear suddenly, and then cause the end current generated when Reverse recovery that can drop suddenly so that superjunction field-effect
The voltage waveform concussion of device where pipe, or even damage device and the stability for influencing entire circuit.
Utility model content
In view of this, the purpose of this utility model is to provide a kind of superjunction field-effect tube, can effectively improve on
State defect.
The embodiments of the present invention are accomplished by the following way：
In a first aspect, the embodiments of the present invention provide a kind of superjunction field-effect tube, including：Gate-source layer, leakage
Pole layer, PN junction type semiconductor layer and p-type compensate semiconductor layer.The PN junction type semiconductor layer have the first end that is oppositely arranged and
Second end, the first end are connect with the gate-source layer.The p-type compensation semiconductor layer is embedded in the second end and institute
The junction of drain electrode layer is stated, when for during the superjunction field-effect tube being in Reverse recovery, the p-type compensation is partly led
It is PN junction conducting state between body layer and the PN junction type semiconductor layer, so as to include the sky of injection in the PN junction type semiconductor layer
Cave, to maintain the carrier balance in the PN junction type semiconductor layer.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the P types compensation half
Conductor layer is embedded at the center of the second end, p-type compensation semiconductor layer and the second end with the drain electrode layer
Connection.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the PN junction is partly led
Body layer includes：First p type semiconductor layer, the second p type semiconductor layer and n type semiconductor layer.The n type semiconductor layer has opposite
The third end and the 4th end of setting, the third end are located in the first end, and the 4th end is located in the second end, institute
It states p-type compensation semiconductor layer to be embedded at the center at the 4th end to be arranged in the n type semiconductor layer, the N-type half
The direction of the axis of conductor layer is the direction that the 4th end is directed toward at the third end.First p type semiconductor layer and described
Second p type semiconductor layer is set to the circumferential surface of the n type semiconductor layer along the axisymmetrical.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the N types semiconductor
Layer of the first N-type semiconductor material by being made.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the drain electrode layer includes：
Substrate layer and drain electrode layer.The substrate layer has the 5th end and the 6th end that are oppositely arranged, the 5th end respectively with institute
It states second end to connect with p-type compensation semiconductor layer, the 6th end is connect with the drain electrode layer.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the gate-source layer
Including：Source layer, dielectric layer and grid layer, the source layer connect and are arranged with the first end dielectric layer, given an account of
Matter layer connect with the first end and is arranged the grid layer, and the grid layer is connect with the first end.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the source layer includes：
Source electrode layer, the first source electrode active layer and the second source electrode active layer.The source electrode layer be arranged the dielectric layer and with institute
First p type semiconductor layer and second p type semiconductor layer stated in first end are all connected with.The first source electrode active layer
Embedded first p type semiconductor layer is simultaneously all connected with the source electrode layer, the dielectric layer and the grid layer.Described
Two source electrode active layers be embedded in second p type semiconductor layer and with the source electrode layer, the dielectric layer and the grid layer
It is all connected with.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, first source electrode has
Active layer and the second source electrode active layer are made of the second N-type semiconductor material.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, second N-type is partly led
The concentration of body material is more than the concentration for the first N-type semiconductor material that the n type semiconductor layer is made.
In conjunction with the technical solution that above-mentioned first aspect provides, in some possible realization methods, the grid layer includes：
Grid electrode layer and polysilicon layer.The grid electrode layer is connect with the first end, the grid electrode layer and the polycrystalline
Silicon layer is bonded and is arranged by the dielectric layer.
The advantageous effect of the utility model embodiment is：
By the way that p-type compensation semiconductor layer to be embedded in the junction of second end and drain electrode layer, then p-type compensates semiconductor energy
It is enough that a PN junction is constituted between PN junction type semiconductor layer.It is being in Reverse recovery when the parasitic diode in superjunction field-effect tube
When making to flow carrier by a large amount of pumping in the PN junction type semiconductor layer short time in the process, pressure can be formed by the carrier for taking out stream
It drops to induce the PN junction constituted between p-type compensation semiconductor layer and PN junction type semiconductor layer in the conduction state, so that PN junction
In semiconductor layer comprising by p-type compensate semiconductor layer injected holes, and then PN junction type semiconductor layer by take out flow carrier when,
The hole supplemented remains able to enclose the carrier balance maintained in PN junction type semiconductor layer.Therefore it avoids that voltage waveform shake occurs
It swings, and enhances the stability of circuit.
Other feature and advantage of the utility model will illustrate in subsequent specification, also, partly from specification
It becomes apparent, or is understood by implementing the utility model embodiment.The purpose of this utility model and other advantages can
It realizes and obtains by specifically noted structure in the specification, claims and attached drawing write.
Description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only the utility model
Some embodiments for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other attached drawings.Shown in attached drawing, the above and other purpose, feature and advantage of the utility model will more
Clearly.Identical reference numeral indicates identical part in whole attached drawings.Do not painted by actual size equal proportion scaling deliberately
Attached drawing processed, it is preferred that emphasis is show the purport of the utility model.
Fig. 1 shows a kind of sectional view for superjunction field-effect tube that the utility model first embodiment provides；
Fig. 2 shows a kind of flows of the manufacturing method of superjunction field-effect tube of the utility model second embodiment offer
Figure；
Fig. 3 show the utility model second embodiment provide a kind of superjunction field-effect tube manufacturing method in superjunction field
First manufacture schematic diagram of effect pipe；
Fig. 4 show the utility model second embodiment provide a kind of superjunction field-effect tube manufacturing method in superjunction field
Second manufacture schematic diagram of effect pipe；
Fig. 5 show the utility model second embodiment provide a kind of superjunction field-effect tube manufacturing method in superjunction field
The third of effect pipe manufactures schematic diagram.
Icon：100- superjunction field-effect tube；110-PN junction semiconductor layers；111- first ends；112- second ends；113-N
Type semiconductor layer；1131- thirds end；The 4th ends 1132-；The first p type semiconductor layers of 114-；The second p type semiconductor layers of 115-；
120-P types compensate semiconductor layer；130- drain electrode layers；131- substrate layers；The 5th ends 1311-；The 6th ends 1312-；132- drain electrode electricity
Pole layer；140- gate-source layers；141- source layers；1411- source electrode layers；1412- the first source electrode active layers；1413- second
Source electrode active layer；142- dielectric layers；143- grid layers；1431- grid electrode layers；1432- polysilicon layers.
Specific implementation mode
It is new below in conjunction with this practicality to keep the purpose, technical scheme and advantage of the utility model embodiment clearer
Attached drawing in type embodiment, the technical scheme in the utility model embodiment is clearly and completely described, it is clear that is retouched
The embodiment stated is the utility model a part of the embodiment, instead of all the embodiments.Usually here described in attached drawing and
The component of the utility model embodiment shown can be arranged and be designed with a variety of different configurations.
Therefore, the detailed description of the embodiments of the present invention to providing in the accompanying drawings is not intended to limit requirement below
The scope of the utility model of protection, but it is merely representative of the selected embodiment of the utility model.Based in the utility model
Embodiment, the every other embodiment that those of ordinary skill in the art are obtained without creative efforts, all
Belong to the range of the utility model protection.
It should be noted that：Similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined, then it further need not be defined and explained in subsequent attached drawing in a attached drawing.In addition, term " the
One ", " second " etc. is only used for distinguishing description, is not understood to indicate or imply relative importance.
In the description of the present invention, it should be noted that the orientation of the instructions such as term "horizontal", "vertical", "inner"
Or position relationship be based on the orientation or positional relationship shown in the drawings or the utility model product using when usually put
Orientation or positional relationship is merely for convenience of describing the present invention and simplifying the description, and does not indicate or imply the indicated dress
It sets or element must have a particular orientation, with specific azimuth configuration and operation, therefore should not be understood as to the utility model
Limitation.
In addition, term " setting ", " installation ", " connection " shall be understood in a broad sense, for example, it may be fixedly connected, it can also
It is to be detachably connected, or be integrally connected；It can be mechanical connection, can also be electrical connection；It can be directly connected, it can also
Indirectly connected through an intermediary, it can be inside two elements connection.For the ordinary skill in the art, may be used
Understand the concrete meaning of above-mentioned term in the present invention with concrete condition.
First embodiment
Referring to Fig. 1, the utility model first embodiment provides a kind of superjunction field-effect tube 100, the superjunction field-effect
Pipe 100 includes：PN junction type semiconductor layer 110, p-type compensation semiconductor layer 120, drain electrode layer 130 and gate-source layer 140.
Wherein, PN junction type semiconductor layer 110 has the first end 111 being oppositely arranged and second end 112.First end 111 with
Gate-source layer 140 connects.P-type compensation semiconductor layer 120 is embedded in the junction of second end 112 and drain electrode layer 130, and p-type is mended
Semiconductor layer 120 is repaid when being in during Reverse recovery used in superjunction field-effect tube 100, p-type compensates semiconductor layer 120
It is PN junction conducting state between PN junction type semiconductor layer 110, so as to include injected holes in PN junction type semiconductor layer 110, with
Maintain the carrier balance in PN junction type semiconductor layer 110.
Specifically, PN junction type semiconductor layer 110 be p-shaped semi-conducting material and N-type semiconductor material it is common made of one
Block structure, wherein p-shaped semi-conducting material can be to mix the silicon crystal of a small amount of impurity boron element (or phosphide element) (or germanium is brilliant
Body), N-type semiconductor material can be the silicon crystal (or germanium crystal) for mixing a small amount of impurity P elements (or antimony element)., PN junction half
The block structure of conductor layer 110 can be for example,：Round block shape, triangle bulk, rectangular block shape or polygon bulk etc..This implementation
In example, PN junction type semiconductor layer 110 may be selected to be a rectangular block shape structure, but be not intended as the restriction to the present embodiment.In addition,
PN junction type semiconductor layer 110 is the specific size of rectangular block shape structure, and the present embodiment is also not specifically limited, can be according to reality
Performance is selected.The rectangular block shape structure of PN junction type semiconductor layer 110 makes PN junction type semiconductor layer 110 have relatively
The first end 111 and second end 112 of setting.For example, when PN junction type semiconductor layer 110 is positioned on horizontal plane, PN junction types
Top of the semiconductor layer 110 far from horizontal plane is first end 111, and the bottom end that PN junction type semiconductor layer 110 is contacted with horizontal plane
For second end 112.
In the present embodiment, PN junction type semiconductor layer 110 includes：N type semiconductor layer 113,114 and of the first P type semiconductor layers
Second p type semiconductor layer 115.
N type semiconductor layer 113 of the first N-type semiconductor material by being made, i.e., for by mixing a small amount of impurity P elements (or antimony
Element) silicon crystal (or germanium crystal) made of convex block structure, and the convex block structure of n type semiconductor layer 113 is only this reality
A kind of selection mode for applying example, is not intended as the restriction to the present embodiment.The convex block structure of n type semiconductor layer 113 is but also N
Type semiconductor layer 113 has the third end 1131 and the 4th end 1132 being oppositely arranged.Also for example, when n type semiconductor layer 113 is put
When being placed on horizontal plane, top of the n type semiconductor layer 113 far from horizontal plane be third end 1131, and n type semiconductor layer 113 with
The bottom end of horizontal plane contact is the 4th end 1132.It is further understood that arriving, the convex block structure of n type semiconductor layer 113 makes
The sectional dimension at four ends 1132 is more than the sectional dimension at third end 1131, and the third end 1131 of n type semiconductor layer 113 is ascended the throne
In in the first end 111 of PN junction type semiconductor layer 110, and the 4th end 1132 of n type semiconductor layer 113 is then located at PN junction types half
In the second end 112 of conductor layer 110 and it is equal to second end 112.In addition, the convex block structure of n type semiconductor layer 113 also makes
N type semiconductor layer 113 can have a central axis, and the direction of the axis of n type semiconductor layer 113 is that third end 1131 is directed toward
The direction at the 4th end 1132.
First p type semiconductor layer 114 and the second p type semiconductor layer 115 are by mix a small amount of impurity boron element (or indium
Element) silicon crystal (or germanium crystal) made of rectangular block shape structure, and the first p type semiconductor layer 114 and the second P-type semiconductor
The rectangular block shape structure of layer 115 is only a kind of selection mode of the present embodiment, is not intended as the restriction to the present embodiment.This implementation
In example, n type semiconductor layer 113, the first p type semiconductor layer 114 and the second p type semiconductor layer 115 together constitute PN junction types half
Conductor layer 110, thus the first p type semiconductor layer 114 and the second p type semiconductor layer 115 should with 113 type shape of n type semiconductor layer
At certain connection relation.Specifically, the first p type semiconductor layer 114 and the second p type semiconductor layer 115 are and n type semiconductor layer
113 types connect, and it is that the first p type semiconductor layer 114 and the second p type semiconductor layer 115 are equal that connection, which is formed by relative position relation,
The circumferential surface of n type semiconductor layer 113 is set to along axisymmetrical.
P-type compensates semiconductor layer 120 also and is by (or germanium is brilliant for the silicon crystal that mixes a small amount of impurity boron element (or phosphide element)
Body) made of rectangular block shape structure.It should be understood that ensure that the normal working performance of superjunction field-effect tube 100, p-type are mended
The first p type semiconductor layer 114 or the second p type semiconductor layer should be less than by repaying the size of the rectangular block shape structure of semiconductor layer 120
The size of 115 rectangular block shape structure.Further, 110 above structure relationship of PN junction type semiconductor layer, p-type compensation half are based on
The junction that conductor layer 120 is embedded in second end 112 and drain electrode layer 130 can be embedded in the to compensate semiconductor layer 120 for p-type
At the center at two ends 112, as p-type compensation semiconductor layer 120 is embedded at the center at the 4th end 1132 to be arranged in the N-type
In semiconductor layer 113.It should be understood that the above-mentioned set-up mode of p-type compensation semiconductor layer 120 is only the one of the present embodiment
Kind selection mode, is not intended as the restriction to the present embodiment.In addition, partly being led for ease of p-type compensation semiconductor layer 120 and PN junction
The second end 112 of body layer 110 can easily be connect with drain electrode layer 130, and PN junction half is embedded in p-type compensation semiconductor layer 120
After the second end 112 of conductor layer 110, p-type compensation semiconductor layer 120 should keep smooth with second end 112.
Drain electrode layer 130 is used to play the role of drain electrode in superjunction field-effect tube 100, specifically, drain electrode layer 130 includes：Lining
Bottom 131 and drain electrode layer 132.
A block structure made of 131 conventional semiconductor material of substrate layer, wherein the block structure of substrate layer 131 can be with
To be, for example,：Round block shape, triangle bulk, rectangular block shape or polygon bulk etc..In the present embodiment, the shape structure of substrate layer 131
At should be matched with PN junction type semiconductor layer 110, i.e., substrate layer 131 may be selected to be a size and PN junction type semiconductor layer 110
The rectangular block shape structure matched, but it is not intended as the restriction to the present embodiment.The rectangular block shape structure of substrate layer 131 makes substrate layer
131 can have the 5th end 1311 and the 6th end 1312 of relative device.Also for example, when substrate layer 131 is positioned on horizontal plane
When, top of the substrate layer 131 far from horizontal plane is the 5th end 1311, and the bottom end that substrate layer 131 is contacted with horizontal plane is the 6th
End 1312.The connection of drain electrode layer 130 and second end 112 be substrate layer 131 the 5th end 1311 respectively with second end 112 and P
Type compensates semiconductor layer 120 and connects, and the 6th end 1312 of substrate layer 131 is then connect with drain electrode layer 132.
It should be understood that the size of substrate layer 131 is matched with the size of PN junction type semiconductor layer 110, as substrate layer
The cross sectional shape size at 131 the 5th end 1311 and the cross sectional shape size phase of the second end 112 of PN junction type semiconductor layer 110
Together.
Drain electrode layer 132 can be the block structure made of conductive metallic material, the bulk of drain electrode layer 132
Structure can be with 131 matched rectangular block shape structure of substrate layer, but be not intended as the restriction to the present embodiment.Drain electrode layer
The geomery of 132 junctions being connect with the 6th end 1312 of the substrate layer 131 also geomery with the 6th end 1312, to protect
Globality after card connection.
Gate-source layer 140 is used to play the role of grid and drain electrode in superjunction field-effect tube 100, specifically, gate source
Pole layer 140 includes：Source layer 141, dielectric layer 142 and grid layer 143.
In the present embodiment, source layer 141 specifically includes：Source electrode layer 1411, the first source electrode active layer 1412 and
Two source electrode active layers 1413.
Source electrode layer 1411 can be the recessed block structure made of conductive metallic material, and source electrode layer 1411
The geomery of recessed block structure can be to be matched with the geomery of first end 111, but be not intended as the limit to the present embodiment
It is fixed.The recessed block structure of source electrode layer 1411, which makes it possible to, has one first rectangular-shaped groove.And then in source layer 141
When being connect with first end 111 and being arranged dielectric layer 142, as source electrode layer 1411 is partly led with the first p-type in first end 111
Body layer 114 and the second p type semiconductor layer 115 are all connected with, and the first rectangular-shaped groove of source electrode layer 1411 is arranged medium
Layer 142.In addition, the geomery for the junction that source electrode layer 1411 is connect with the first end 111 also shape with first end 111
Size, to ensure the globality after connecting.
First source electrode active layer 1412 and the second source electrode active layer 1413 all can be made of the second N-type semiconductor material
Rectangular block shape structure, i.e. the first source electrode active layer 1412 and the second source electrode active layer 1413 all can be mix a small amount of impurity
Rectangular block shape structure made of the silicon crystal (or germanium crystal) of boron element (or phosphide element), but it is not intended as the limit to the present embodiment
It is fixed.And to ensure the normal use performance of superjunction field-effect tube 100, the concentration of the second N-type semiconductor material, which should be more than, is made N
The concentration of first N-type semiconductor material of type semiconductor layer 113.
In the present embodiment, after the first source electrode active layer 1412 is embedded into the first p type semiconductor layer 114, and the first source electrode
Active layer 1412 is also all connected with source electrode layer 1411, dielectric layer 142 and grid layer 143.So that the first source electrode active layer
1412 form a channel region in the first p type semiconductor layer 114, ensure the normal work of superjunction field-effect tube 100.Second source electrode
After active layer 1413 is embedded into the second p type semiconductor layer 115, and the second source electrode active layer 1413 is gone back and source electrode layer
1411, dielectric layer 142 and grid layer 143 are all connected with.So that the second source electrode active layer 1413 is in the second p type semiconductor layer 115
It is interior to form another channel region, ensure the normal work of superjunction field-effect tube 100.
Dielectric layer 142 can be the recessed block structure made of insulating materials, and the shape of the recessed block structure of dielectric layer 142
Shape size can be to be matched with the geomery of the first rectangular-shaped groove of source electrode layer 1411, but be not intended as to this reality
Apply the restriction of example.The recessed block structure of dielectric layer 142, which makes it possible to, has one second rectangular-shaped groove.And then in dielectric layer
142 connect with first end 111, and when the second rectangular-shaped groove of dielectric layer 142 can be arranged grid layer 143, dielectric layer
142 grid layer 143 can be isolated with source layer 141, to ensure the normal work of superjunction field-effect tube 100.
In the present embodiment, grid layer 143 specifically includes：Grid electrode layer 1431 and polysilicon layer 1432.
Grid electrode layer 1431 can be the rectangular structure made of conductive metallic material, but be not intended as to this implementation
The restriction of example.And polysilicon layer 1432 is then the size made of conventional semiconductor material and 1431 matched square of grid electrode layer
Shape and structure, but it is not intended as the restriction to the present embodiment.In the present embodiment, the second rectangular-shaped groove set of dielectric layer 142
If grid layer 143, and grid layer 143 is also connect with first end 111, as 1431 edge of polysilicon layer 1432 and grid electrode layer
Axis direction is set up in parallel, so that polysilicon layer 1432 and grid electrode layer 1431 are arranged by the second rectangular-shaped groove, and
Grid electrode layer 1431 is also formed with first end 111 and is connected.
It should be noted that ensure the connection of gate-source layer 140 and first end 111, therefore it is arranged Jie in source layer 141
Matter layer 142, and after dielectric layer 142 is arranged grid layer 143, gate-source layer 140 and the junction of first end 111 should be one
Smooth face.
In a kind of superjunction field-effect tube 100 provided in this embodiment, the operation principle of the superjunction field-effect tube 100 is：
When during the parasitic diode in superjunction field-effect tube 100 is in Reverse recovery, N type semiconductor layers
113 carrier (electronics) largely flows to drain electrode layer 130 in a short time.At this point, on the path of carrier flowed through, current-carrying
Son can bypass p-type and compensate semiconductor layer 120.Further, carrier is then formed around the path of p-type compensation semiconductor layer 120
Direction of an electric field is to be directed toward the potential drop that p-type compensates semiconductor layer 120 by drain electrode layer 130.Reach in the voltage of the potential drop
When more than or equal to 0.6V, the PN junction that p-type compensation semiconductor is constituted with n type semiconductor layer 113 is just in the effect of the potential drop
Lower induced synthesis conducting state.Further, the conducting of PN junction enables p-type compensation semiconductor to inject holes into N-type half
In conductor layer 113, so that in n type semiconductor layer 113 after electronics is largely taken out and flowed, institute's injected holes is able to maintain that N-type half
Carrier balance in conductor layer 113.
Second embodiment
It please refers to Fig.1 to Fig. 5, the utility model embodiment provides a kind of manufacturing method of superjunction field-effect tube, this is super
The manufacturing method of junction field effect pipe is used for superjunction field-effect tube 100, and the manufacturing method of superjunction field-effect tube includes：Step S100,
Step S200, step S300 and step S400.
Step S100：P-type is formed on drain electrode layer compensates semiconductor layer.
First drain electrode layer 130 Grown a layer thickness be 2~4umN type semiconductor layers 113, the thickness be 2~
The n type semiconductor layer 113 of 4um is a part for n type semiconductor layer 113.And then based on the N-type semiconductor that the thickness is 2~4um
Layer 113, by photoetching process to the thickness be 2~4um N-type semiconductor in implantation dosage about 1e12CM-2 to 5e13CM-2
Between impurity on drain electrode layer 130 formed p-type compensate semiconductor layer 120.
Step S200：N type semiconductor layer is formed on the drain electrode layer, so that n type semiconductor layer is arranged the p-type
Compensate semiconductor layer.
Growth on semiconductor layer 120, which is compensated, in the n type semiconductor layer 113 and p-type that thickness is 2~4um forms another part N
Type semiconductor layer 113 has been formed so that thickness is the n type semiconductor layer 113 of 2~4um and another part n type semiconductor layer 113
Whole n type semiconductor layer 113.Wherein, n type semiconductor layer 113 has the third end 1131 and the 4th end 1132 being oppositely arranged, the
Thickness between three ends 1131 and the 4th end 1132 can be configured according to the pressure-resistant demand of device, for example, it is desired to which 600V is resistance to
Pressure, then the thickness between third end 1131 and the 4th end 1132 can be 40um.
Step S300：The first p type semiconductor layer and the p-type half are symmetrically formed on the circumferential surface of the n type semiconductor layer
Conductor layer, wherein first p type semiconductor layer, second p type semiconductor layer and the n type semiconductor layer constitute PN junction
There is the first end and second end being oppositely arranged, the first end to be arranged the P for type semiconductor layer, the PN junction type semiconductor layer
Type compensates semiconductor layer.
Using photoetching process, on the circumferential surface of n type semiconductor layer 113 epitaxial growth go out the first p type semiconductor layer 114 and
Two p type semiconductor layers 115, and the first p type semiconductor layer 114 and the second p type semiconductor layer 115 are made using dry etching industry
Size matched with the size of n type semiconductor layer 113.Then, it then carries out surface using CMP process to bury, so that N-type semiconductor
The surface of layer 113 can be exposed independent from from the first p type semiconductor layer 114 and the second p type semiconductor layer 115 to be come, from making the first P
Type semiconductor layer 114, the second p type semiconductor layer 115 and n type semiconductor layer 113 constitute PN junction type semiconductor layer 110.PN at this time
There is junction semiconductor layer 110 first end 111 being oppositely arranged and second end 112, first end 111 to be arranged p-type compensation semiconductor
Layer 120.
Step S400：Gate-source layer is formed in the second end.
Based on PN junction type semiconductor layer 110 is generated, the channel region of lithographic definition field-effect tube is crossed, i.e., in the first p-type half
The threshold voltage that implantation dosage reaches depending on needed in conductor layer 114 is come the impurity that determines, and in the second p type semiconductor layer
The threshold voltage that implantation dosage reaches depending on needed in 115 carries out high annealing knot the impurity that determines, forms first
Channel region and the second channel region.Later, growth forms thickness span and is in the first end 111 of PN junction type semiconductor layer 110
The grid electrode layer 1431 of 800A to 1000A, and in 1431 deposit polycrystalline silicon of grid electrode layer.Then photoetching process is utilized
The polysilicon regions of deposition are defined, and polysilicon is etched using dry corrosion process, final residual polysilicon forms polysilicon layer
1432.So that polysilicon layer 1432 and grid electrode layer 1431 collectively form grid layer 143.Later, using photoetching process
To be about 5e15CM-2 form the first source electrode active layer 1412 to impurity between 1e16CM-2 to dopant dose in one channel region, with
And using photoetching process dopant dose in the second channel region it is about 5e15CM-2 and forms second to impurity between 1e16CM-2
Source electrode active layer 1413.Later, contact control is defined using photoetching process, contact control, residual is then etched by etching process
Oxide layer then as the dielectric layer 142 being isolated between source layer 141 and grid layer 143.Finally, it is deposited on dielectric layer 142
Metal forms source layer 141, and drain electrode layer 130 is ground to required thickness, and deposited metal forms drain electrode layer 132.
In conclusion the utility model embodiment provides a kind of superjunction field-effect tube.Superjunction field-effect tube includes：Grid
Source layer, drain electrode layer, PN junction type semiconductor layer and p-type compensate semiconductor layer.PN junction semiconductor layers have the be oppositely arranged
One end and second end, first end are connect with gate-source layer.P-type compensation semiconductor layer is embedded in the company of second end and drain electrode layer
Place is met, when for during superjunction field-effect tube being in Reverse recovery, p-type compensates semiconductor layer and PN junction type semiconductor layer
Between be PN junction conducting state so that in PN junction type semiconductor layer include injected holes, to maintain in PN junction type semiconductor layer
Carrier balance.
By the way that p-type compensation semiconductor layer to be embedded in the junction of second end and drain electrode layer, then p-type compensates semiconductor energy
It is enough that a PN junction is constituted between PN junction type semiconductor layer.It is being in Reverse recovery when the parasitic diode in superjunction field-effect tube
When making to flow carrier by a large amount of pumping in the PN junction type semiconductor layer short time in the process, pressure can be formed by the carrier for taking out stream
It drops to induce the PN junction constituted between p-type compensation semiconductor layer and PN junction type semiconductor layer in the conduction state, so that PN junction
In semiconductor layer comprising by p-type compensate semiconductor layer injected holes, and then PN junction type semiconductor layer by take out flow carrier when,
The hole supplemented remains able to enclose the carrier balance maintained in PN junction type semiconductor layer.Therefore it avoids that voltage waveform shake occurs
It swings, and enhances the stability of circuit.
The preferred embodiment that these are only the utility model, is not intended to limit the utility model, for this field
Technical staff for, various modifications and changes may be made to the present invention.Within the spirit and principle of the utility model,
Any modification, equivalent replacement, improvement and so on should be included within the scope of protection of this utility model.
Claims (10)
1. a kind of superjunction field-effect tube, which is characterized in that including：Gate-source layer, drain electrode layer, PN junction type semiconductor layer and p-type
Compensate semiconductor layer；
The PN junction type semiconductor layer has the first end and second end being oppositely arranged, the first end and the gate-source layer
Connection；
The p-type compensation semiconductor layer is embedded in the junction of the second end and the drain electrode layer, in the superjunction field
It is PN junction between the p-type compensation semiconductor layer and the PN junction type semiconductor layer when effect pipe is in during Reverse recovery
Conducting state, so as to include injected holes in the PN junction type semiconductor layer, to maintain in the PN junction type semiconductor layer
Carrier balance.
2. superjunction field-effect tube according to claim 1, which is characterized in that the p-type compensation semiconductor layer is embedded in institute
It states at the center of second end, the p-type compensation semiconductor layer and the second end are connect with the drain electrode layer.
3. superjunction field-effect tube according to claim 2, which is characterized in that the PN junction type semiconductor layer includes：First P
Type semiconductor layer, the second p type semiconductor layer and n type semiconductor layer；
There is the n type semiconductor layer third end and the 4th end being oppositely arranged, the third end to be located in the first end, institute
It states the 4th end to be located in the second end, the p-type compensation semiconductor layer is embedded at the center at the 4th end to be arranged
In the n type semiconductor layer, the direction of the axis of the n type semiconductor layer is the side that the 4th end is directed toward at the third end
To；
First p type semiconductor layer and second p type semiconductor layer are set to the N-type along the axisymmetrical and partly lead
The circumferential surface of body layer.
4. superjunction field-effect tube according to claim 3, which is characterized in that the n type semiconductor layer is by the first N-type half
Conductor material is made.
5. superjunction field-effect tube according to claim 3, which is characterized in that the drain electrode layer includes：Substrate layer and drain electrode
Electrode layer；
The substrate layer has the 5th end and the 6th end that are oppositely arranged, the 5th end respectively with the second end and the P
Type compensates semiconductor layer connection, and the 6th end is connect with the drain electrode layer.
6. superjunction field-effect tube according to claim 5, which is characterized in that the gate-source layer includes：Source layer, Jie
Matter layer and grid layer, the source layer connect with the first end and are arranged the dielectric layer, the dielectric layer and described first
End connects and is arranged the grid layer, and the grid layer is connect with the first end.
7. superjunction field-effect tube according to claim 6, which is characterized in that the source layer includes：Source electrode layer,
One source electrode active layer and the second source electrode active layer；
The source electrode layer be arranged the dielectric layer and with first p type semiconductor layer and described in the first end
Two p type semiconductor layers are all connected with；
The first source electrode active layer be embedded in first p type semiconductor layer and with the source electrode layer, the dielectric layer and
The grid layer is all connected with；
The second source electrode active layer be embedded in second p type semiconductor layer and with the source electrode layer, the dielectric layer and
The grid layer is all connected with.
8. superjunction field-effect tube according to claim 7, which is characterized in that the first source electrode active layer and described second
Source electrode active layer is made of the second N-type semiconductor material.
9. superjunction field-effect tube according to claim 8, which is characterized in that the concentration of second N-type semiconductor material
More than the concentration for the first N-type semiconductor material that the n type semiconductor layer is made.
10. superjunction field-effect tube according to claim 9, which is characterized in that the grid layer includes：Grid electrode layer and
Polysilicon layer；
The grid electrode layer is connect with the first end, the grid electrode layer and the polysilicon layer fitting and it is described
Dielectric layer is arranged.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108054212A (en) * | 2017-12-22 | 2018-05-18 | 南京方旭智芯微电子科技有限公司 | The manufacturing method of superjunction field-effect tube and superjunction field-effect tube |
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2017
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108054212A (en) * | 2017-12-22 | 2018-05-18 | 南京方旭智芯微电子科技有限公司 | The manufacturing method of superjunction field-effect tube and superjunction field-effect tube |
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