CN207675861U - A kind of GPIO mouthfuls of break-make test circuit - Google Patents
A kind of GPIO mouthfuls of break-make test circuit Download PDFInfo
- Publication number
- CN207675861U CN207675861U CN201721524804.7U CN201721524804U CN207675861U CN 207675861 U CN207675861 U CN 207675861U CN 201721524804 U CN201721524804 U CN 201721524804U CN 207675861 U CN207675861 U CN 207675861U
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- China
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- connecting pin
- gpio mouthfuls
- detection circuit
- mouthfuls
- power supply
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- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The utility model is related to a kind of GPIO mouthfuls of break-make test circuits, including the control unit of GPIO mouthfuls of switching outputs of control or reception state, further include at least one first detection circuit and/or at least one second detection circuit；First detection circuit includes the first connecting pin being connect with GPIO mouthfuls and second connection end；First connecting pin is all connected with power supply with second connection end, and is connected with one-way conduction circuit between the first connecting pin and second connection end；Second detection circuit includes the third connecting pin, the 4th connecting pin and the 5th connecting pin being connect with GPIO mouthfuls；Third connecting pin, the 4th connecting pin and the 5th connecting pin are all connected with power supply, and are once connected with one-way conduction circuit in the same direction between third connecting pin and the 4th connecting pin, the 4th connecting pin and the 5th connecting pin.The combination that the utility model passes through the first detection circuit and the second detection circuit, you can to realize that the break-make of GPIO mouthfuls of different number detects, enormously simplify circuit and improve detection compatibility.
Description
Technical field
The utility model is related to GPIO test circuits field, more particularly to a kind of GPIO mouthfuls of break-make test circuit.
Background technology
Need to draw many GPIO mouthfuls on module board at present for client extensions use.In order to verify patch reliability, need
Whether these outer GPIO lines drawn of test verification are normal.In the prior art, for these GPIO mouthfuls line conduction detection all
It needs to give function to each GPIO polls tax on children, to judge whether port is connected by running specific program, this test method,
For test board with regard to comparatively laborious, software work amount is also bigger than normal.And compatibility is not also strong, is unfavorable for improving testing efficiency.
Invention content
In order to solve the above-mentioned technical problem, the utility model provides a kind of GPIO mouthfuls of break-make test electricity to the utility model
Road.
A kind of GPIO mouthfuls of break-make test circuit, including the control list of GPIO mouthfuls of switching outputs of control or reception state
Member further includes at least one first detection circuit and/or at least one second detection circuit；First detection circuit include with
First connecting pin of the GPIO mouthfuls of connection and second connection end；First connecting pin is all connected with the second connection end
Power supply, and it is connected with one-way conduction circuit between first connecting pin and the second connection end；Second detection circuit
Include the third connecting pin, the 4th connecting pin and the 5th connecting pin being connect with described GPIO mouthfuls；The third connecting pin, the 4th
Connecting pin and the 5th connecting pin are all connected with power supply, and the third connecting pin and the 4th connecting pin, the 4th connecting pin with
It is once connected with one-way conduction circuit in the same direction between 5th connecting pin.
Further, the one-way conduction circuit includes diode.
Further, first resistor is equipped between first connecting pin and power supply；It is set between second connection end and power supply
There is second resistance.
Further, 3rd resistor is equipped between the third connecting pin and power supply；It is set between 4th connecting pin and power supply
There is the 4th resistance, the 5th resistance is equipped between the 5th connecting pin and power supply.
Further, the power supply is VDD power supplys.
The advantageous effect played of the utility model includes：
1, pass through the combination of the first detection circuit and the second detection circuit, you can to realize the break-make of GPIO mouthfuls of different number
Property detection, enormously simplify circuit and improve detection compatibility.
Description of the drawings
Fig. 1 is the circuit diagram in the utility model.
Fig. 2 is the first detection circuit figure in the utility model.
Fig. 3 is the second detection circuit figure in the utility model.
Specific implementation mode
The preferred embodiment of the utility model is described in detail below in conjunction with the accompanying drawings, so that the advantages of the utility model
It is more easy to be readily appreciated by one skilled in the art with feature, to make apparent define to the scope of protection of the utility model.
Embodiment 1：
A kind of GPIO mouthfuls of break-make test circuit provides novel detection electricity in the test method for retaining the prior art
Road, you can complete multiple GPIO mouthfuls of break-make detections.I.e. GPIO mouthfuls of the detection of break-make detection wherein described in the utility model
Whether the connection between connecting pin is connected.
For the convenience of description, being illustrated first to control unit 1, in the prior art, control unit 1 would generally assign often
A GPIO mouthfuls of different function, to make its output either receive signal specific verify during the test its receive or it is defeated
Go out the response action after signal specific, to determine GPIO mouthfuls of break-make.The control unit 1 of the present embodiment is special using one of which
Condition of pledging love only controls GPIO causes for gossip and shows two states, one is output shape that is, to GPIO mouthfuls connected to it transmission control instruction
State, the other is reception state.When for output state, GPIO mouthfuls of output is high level or low level, and reception state
Shi Ze only detects the height of outputs level signals state.Preferably, when being connected with GPIO mouthfuls multiple, it is often referred to control wherein one
A GPIO mouthfuls is output state, other are then reception state.The control unit 1 can be the ability for having certain Message Processing
Processing chip or microcontroller etc..Power supply in the present embodiment is VDD power supplys, and voltage domain meets the electricity that GPIO mouthfuls of tests need
Pressure, you can regard as to GPIO mouthfuls of output high level signals.
Specifically, the utility model further includes at least one first detection circuit 2 and/or at least one second detection circuit
3.First detection circuit 2 and the second detection circuit 3 are connect with GPIO mouthfuls, and effect is for carrying out the GPIO connected mouths
Association.
At the aspect of the first detection circuit 2, the first detection circuit 2 includes the first connecting pin A being connect with GPIO mouthfuls and the
Two connecting pin B；First connecting pin A and second connection end B is all connected with power supply, and connects between the first connecting pin A and second connection end B
It is connected to one-way conduction circuit.In the present embodiment, one-way conduction circuit includes diode D1, the cathode and anode point of diode D1
The first connecting pin A and second connection end B is not connected, makes electric current that can only flow to first company's rank end from second connection end B.In addition, being
It realizes partial pressure protection and filtering, first resistor R1 is equipped between the first connecting pin A and power supply；Second connection end B and power supply
Between be equipped with second resistance R2.
When detecting, corresponding PGIO mouthfuls of control second connection end B first is output state, and exports low level, control
Corresponding PGIO mouthfuls of first connecting pin A is reception state, then removes the level state for reading the first connecting pin A, under normal circumstances
It should be high level.
Then the corresponding PGIO mouthfuls of output high level of control second connection end B, then removes the level for reading the first connecting pin A
State also should be high level under normal circumstances.
Again, corresponding PGIO mouthfuls of the first connecting pin A of control is output state, and exports low level, the second connection of control
It is reception state to hold corresponding PGIO mouthfuls of B, then removes the level state for reading second connection end B, should be low under normal circumstances
Level.
The corresponding PGIO mouthfuls of output high level of the first connecting pin A is finally controlled, the level for reading second connection end B is then removed
State should be high level under normal circumstances.
Detection is every time as a result, if all results are consistent with expected results, then it represents that two of the first detection circuit 2 connection
GPIO mouthfuls of conductings.And so analogize, control unit 1 is primary by all GPIO mouthfuls detections, you can GPIO mouthfuls of conductions of completion
Test.
At 3 aspect of the second detection circuit, the second detection circuit 3 includes the third connecting pin C being connect with GPIO mouthfuls, the 4th company
Meet end D and the 5th connecting pin E；Third connecting pin C, the 4th connecting pin D and the 5th connecting pin E are all connected with power supply, and third
One-way conduction electricity in the same direction is once connected between connecting pin C and the 4th connecting pin D, the 4th connecting pin D and the 5th connecting pin E
Road, i.e. diode D2, D3.Wherein, 3rd resistor R3 is equipped between third connecting pin C and power supply；4th connecting pin D and power supply it
Between be equipped with the 4th resistance R4, between the 5th connecting pin E and power supply be equipped with the 5th resistance R5.On individual event turning circuit, with
The one-way conduction circuit that one detection circuit 2 uses is identical, and conducting direction is four connecting pin D → the of the 5th connecting pin E → the
Three connecting pin C.
When detecting, corresponding PGIO mouthfuls of control third connecting pin C first is output state, and exports low level, control
Corresponding PGIO mouthfuls of 4th connecting pin D is reception state and corresponding PGIO mouthfuls of the 5th connecting pin E is reception state, is then gone
The level state of the 4th connecting pin D and the 5th connecting pin E are read, should be low level under normal circumstances.Third is controlled again
The corresponding PGIO mouthfuls of output high level of connecting pin C, then removes the level state for reading the 4th connecting pin D and the 5th connecting pin E,
Should be high level under normal circumstances.
It is output state to control corresponding PGIO mouthfuls of the 4th connecting pin D, and exports low level, C pairs of control third connecting pin
The PGIO mouths answered are reception state and corresponding PGIO mouthfuls of the 5th connecting pin E is reception state, then go to read third connection
The level state of C and the 5th connecting pin E is held, corresponding GPIO mouthfuls of the 5th connecting pin E should be low level under normal circumstances, and
Corresponding GPIO mouthfuls of third connecting pin C should be high level.The corresponding PGIO mouthfuls of output high level of the 4th connecting pin D is controlled again,
Then the level state for removing reading the 4th connecting pin D and the 5th connecting pin E, should be high level under normal circumstances.
It is output state to control corresponding PGIO mouthfuls of the 5th connecting pin E, and exports low level, C pairs of control third connecting pin
The PGIO mouths answered are reception state and corresponding PGIO mouthfuls of the 4th connecting pin D is reception state, then go to read third connection
The level state for holding C and the 4th connecting pin D, should be low level under normal circumstances.It is corresponding that the 5th connecting pin E is controlled again
PGIO mouthfuls of output high level, then remove the level state for reading third connecting pin C and the 4th connecting pin D, answer under normal circumstances
This is high level.
Detection is every time as a result, if all results are consistent with expected results, then it represents that three of the second detection circuit 3 connection
GPIO mouthfuls of conductings.And so analogize, control unit 1 is primary by all GPIO mouthfuls detections, you can GPIO mouthfuls of conductions of completion
Test.
Wherein, quantity used by the first detection circuit 2 and the second detection circuit 3 depends on the GPIO mouths for needing to detect
Quantity can be combined and be formed by multiple first detection circuits 2, such as when to be detected when GPIO mouthfuls of quantity are even number
When GPIO mouthfuls of quantity are the even numbers such as 2,4,8,10, can survey be attached by 1,2,4,5 the first detection circuit 2 merely
Examination, is to be separated into identical with 2 quantity of the first detection circuit group by GPIO mouthfuls respectively.
When GPIO mouth quantity to be detected is radix, then combined by the first detection circuit 2 and the second detection circuit 3
Or realize and detect separately through the second detection circuit 3, such as when there are 5 GPIO mouthfuls, then pass through first detection circuit 2
And the second detection circuit 3 combination, when there are 3 or 9 GPIO mouthfuls, then separately through second detection circuit
3 or 3 the second detection circuits 3 are realized.
In addition, when existing GPIO mouthfuls of quantity is 2 and 3 common multiple, such as 8 GPIO mouthfuls, then can come as needed
Carry out various combination, you can using first detection circuit 2 and two the second detection circuit 3 combinations, 4 can also be passed through
A first detection circuit 2 combines.
The embodiment of the utility model is explained in detail above in conjunction with attached drawing, but the utility model is not limited to
The above embodiment can also not depart from the utility model within the knowledge of a person skilled in the art
Various changes can be made under the premise of objective.
Claims (5)
1. a kind of GPIO mouthfuls of break-make test circuit, including the control unit of GPIO mouthfuls of switching outputs of control or reception state,
It is characterized in that：Further include at least one first detection circuit and/or at least one second detection circuit；The first detection electricity
Road includes the first connecting pin being connect with described GPIO mouthfuls and second connection end；First connecting pin is connect with described second
End is all connected with power supply, and is connected with one-way conduction circuit between first connecting pin and the second connection end；Described second
Detection circuit includes the third connecting pin, the 4th connecting pin and the 5th connecting pin being connect with described GPIO mouthfuls；The third connects
It connects end, the 4th connecting pin and the 5th connecting pin and is all connected with power supply, and the third connecting pin and the 4th connecting pin, the described 4th
It is once connected with one-way conduction circuit in the same direction between connecting pin and the 5th connecting pin.
2. GPIO mouthfuls of break-make test circuit according to claim 1, which is characterized in that the one-way conduction circuit includes
Diode.
3. GPIO mouthfuls of break-make test circuit according to claim 1, which is characterized in that first connecting pin and power supply
Between be equipped with first resistor；Second resistance is equipped between second connection end and power supply.
4. GPIO mouthfuls of break-make test circuit according to claim 1, which is characterized in that the third connecting pin and power supply
Between be equipped with 3rd resistor；It is equipped with the 4th resistance between 4th connecting pin and power supply, the is equipped between the 5th connecting pin and power supply
Five resistance.
5. GPIO mouthfuls of break-make test circuit according to claim 1 or 2, which is characterized in that the power supply is VDD electricity
Source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721524804.7U CN207675861U (en) | 2017-11-15 | 2017-11-15 | A kind of GPIO mouthfuls of break-make test circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721524804.7U CN207675861U (en) | 2017-11-15 | 2017-11-15 | A kind of GPIO mouthfuls of break-make test circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207675861U true CN207675861U (en) | 2018-07-31 |
Family
ID=62964893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721524804.7U Expired - Fee Related CN207675861U (en) | 2017-11-15 | 2017-11-15 | A kind of GPIO mouthfuls of break-make test circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207675861U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111983437A (en) * | 2020-08-25 | 2020-11-24 | 深圳市旗开电子有限公司 | 5G module product GPIO port test circuit and test method |
-
2017
- 2017-11-15 CN CN201721524804.7U patent/CN207675861U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111983437A (en) * | 2020-08-25 | 2020-11-24 | 深圳市旗开电子有限公司 | 5G module product GPIO port test circuit and test method |
| CN111983437B (en) * | 2020-08-25 | 2023-09-08 | 深圳市旗开电子有限公司 | 5G module product GPIO port test circuit and test method |
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| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180731 Termination date: 20211115 |