CN207663247U - A kind of general comprehensive excitation system - Google Patents

A kind of general comprehensive excitation system Download PDF

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Publication number
CN207663247U
CN207663247U CN201721741843.2U CN201721741843U CN207663247U CN 207663247 U CN207663247 U CN 207663247U CN 201721741843 U CN201721741843 U CN 201721741843U CN 207663247 U CN207663247 U CN 207663247U
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Prior art keywords
signal output
board
analog
boards
output board
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CN201721741843.2U
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Inventor
郝健男
冯月
冯月一
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AVIC Shenyang Xinghua Aero Electrical Appliance Co Ltd
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AVIC Shenyang Xinghua Aero Electrical Appliance Co Ltd
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Abstract

The utility model discloses a kind of general comprehensive excitation systems, including cabinet, the cabinet inside is equipped with Zero greeve controller, discrete magnitude signal output board, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards;One side external surface of the cabinet is equipped with display;The Zero greeve controller connects the discrete magnitude signal output board, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards, the Zero greeve controller by PXI buses and is also connected with the display.The utility model host integrated design, has basic output interface, can export the polymorphic types signals such as analog quantity, discrete magnitude, frequency quantity, synchronizer signal simultaneously.

Description

A kind of general comprehensive excitation system
Technical field
The utility model is related to exciting test technical field, specifically a kind of general comprehensive excitation system.
Background technology
The considerations of due to factors such as safety, economy and efficiency, using avionics system emulation technology for avionics system It is indispensable auxiliary and measuring means for the research and development of system.The design of general comprehensive excitation system is to test avionics system The properties of system provide a good emulation to crosslinking assays and the interface function verification of avionics system and its subsystem and swash Running environment is encouraged, to achieve the purpose that verify avionics system validity and reliability.
Utility model content
Place aiming at the above shortcomings existing in the prior art, the technical problem to be solved by the present invention is to provide one kind General comprehensive excitation system.
The utility model technical solution used for the above purpose is:A kind of general comprehensive excitation system, including Cabinet, the cabinet inside are equipped with Zero greeve controller, discrete magnitude signal output board, analog signals output board, frequency quantity letter Number output board, synchronizer board, ARINC429 boards and RS422 boards;One side external surface of the cabinet is equipped with display;Institute It is defeated by the PXI buses connection discrete magnitude signal output board, analog signals output board, frequency quantity signal to state Zero greeve controller Ejecting plate, synchronizer board, ARINC429 boards and RS422 boards, the Zero greeve controller are also connected with the display.
The Zero greeve controller is the embedded controller based on PXI buses.
The discrete magnitude signal output board includes light-coupled isolation module and for receiving the analog information sent by PXI buses FPGA control modules;The light-coupled isolation module controls mould for connecting connector, the light-coupled isolation module connection FPGA Block.
The analog signals output board includes light-coupled isolation module, FPGA control modules and analog signal output interface; The analog signal output interface connects the light-coupled isolation module for connecting connector, the analog signal output interface, The light-coupled isolation module connects the FPGA control modules.
The frequency quantity signal output board includes that light-coupled isolation module, FPGA control modules and the output of analog frequency signal connect Mouthful;The analog frequency signal output interface connects the light for connecting connector, the analog frequency signal output interface Coupling isolation module, the light-coupled isolation module connect the FPGA control modules.
The synchronizer board includes DDS module and FPGA control modules;The DDS module is for connecting connector, institute It states DDS module and connects the FPGA control modules.
The RS422 boards include the first RS422 output interfaces, for by the of RS422 level conversions to LVTTL level One RS422 level shifting circuits, the 2nd RS422 output interfaces, are used for LVTTL level conversions to RS422 the isolation of the first magnetic coupling The 2nd RS422 level shifting circuits, the isolation of the second magnetic coupling and the FPGA control modules of level;The first RS422 output interfaces With the 2nd RS422 output interfaces the first RS422 is connected for connecting connector, the first RS422 output interfaces Level shifting circuit, the first RS422 level shifting circuits connect the first magnetic coupling isolation;The 2nd RS422 outputs Interface connects the 2nd RS422 level shifting circuits, the 2nd RS422 level shifting circuits connect the second magnetic coupling every From the first magnetic coupling isolation and the second magnetic coupling isolation connect the FPGA control modules.
The utility model has the following advantages and advantageous effect:
1, the utility model host integrated design has basic output interface, can export simultaneously analog quantity, discrete magnitude, The polymorphic types signals such as frequency quantity, synchronizer signal.
2, each board all uses modularized design in the utility model, is designed as 3U standard PXI modules, can be flexible group It closes, extension measuring range, enhancing power of test can be facilitated.
3, WinXP, Win7 (32), Win7 (64) are supported in the hardware board upper layer of the utility model using standard PXI drivings Etc. several operation systems, have stronger compatible universal.
Description of the drawings
Fig. 1 is the structural schematic diagram of the utility model;
Fig. 2 is the structure diagram of the discrete magnitude signal output board of the utility model;
Fig. 3 is the structure diagram of the analog signals output board of the utility model;
Fig. 4 is the structure diagram of the frequency quantity signal output board of the utility model;
Fig. 5 is the structure diagram of the synchronizer board of the utility model;
Fig. 6 is the structure diagram of the RS422 boards of the utility model;
Fig. 7 is the circuit diagram of the output interface of the RS422 boards of the utility model;
Fig. 8 is the circuit diagram of the input interface of the RS422 boards of the utility model;
Fig. 9 is the schematic block circuit diagram of the light-coupled isolation module of the utility model.
Specific implementation mode
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.
As shown in Figure 1, the utility model includes cabinet, the cabinet inside is equipped with Zero greeve controller, discrete magnitude signal Output board, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards; One side external surface of the cabinet is equipped with display;The Zero greeve controller is defeated by the PXI buses connection discrete magnitude signal Ejecting plate, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards, institute It states Zero greeve controller and is also connected with the display.
Zero greeve controller is the embedded controller based on PXI buses.PXI embedded controllers are that PXI measuring systems carry For the embedded computer solution compact with high-performance, (such as equipped with standard device:Integrated CPU, hard disk, RAM, with Too net, video, keyboard/mouse, serial ports, USB and other peripheral hardwares).
The structure diagram of discrete magnitude signal output board is as shown in Fig. 2, include mainly that light-coupled isolation module and FPGA control mould Block.Wherein FPGA control modules are the control cores of entire plate, the analog information that reception is sent by PXI buses, after dissection process, FPGA is sent by light-coupled isolation module to connector.It is quasi- to realize that discrete magnitude exports using 2 pieces of boards in view of signal is more Function.Discrete magnitude signal output board 28V exports 144 tunnels, and 5V exports 10 tunnels, it is desirable that being capable of ternary output.Since discrete signal is defeated The voltage value gone out is higher, and common magnetic coupling chip cannot be satisfied demand, and design exports the height of LVCMOS33 standards using FPGA Low level is exported by high voltage optocoupler.
The structure diagram of analog signals output board is as shown in figure 3, include mainly light-coupled isolation module, FPGA control modules And analog signal output interface.Wherein FPGA control modules are the control cores of entire plate, receive the simulation sent by PXI buses Information after dissection process, gives different D/A converter modules respectively, completes number biography and touches conversion, realization is to each digital-to-analogue conversion The control of module.D/A converter module completes digital-to-analogue conversion, and the digital information that FPGA control modules are sent is converted to simulation Information is measured, is finally output on interface.
As shown in figure 4, frequency quantity signal output board requires 0~3.3KHz, 0~10V analog frequency amounts to export 6 tunnels, frequency Signal output board functional block diagram is measured as shown in figure 4, including mainly light-coupled isolation module and FPGA control modules.Wherein FPGA is controlled Module is the control core of entire plate, receives the analog information sent by PXI buses, after dissection process, FPGA by optocoupler every It is sent to connector from device.
Synchronizer board structure block diagram is as shown in figure 5, include mainly DDS module and FPGA control modules.Wherein FPGA is controlled Molding block is the control core of entire plate, the analog information that reception is sent by PXI buses, and after dissection process, FPGA is sent by DDS To connector.54V exports 3 tunnels, and 11.8V exports 2 tunnels, and 36V exports 1 tunnel.By the adjustable analog quantity of DDS input phases, hand over Superposition high-voltage feedback power output after stream coupling.
ARINC429/HB6096 is standard aviation agreement, and the embodiments of the present invention are considered as market ripe, The general boards of the ARINC429 of certain company are selected, it is quasi- that 2 pieces of boards is selected to have following characteristic:
1) a variety of transceiver channel configurations:16 receive 16 hairs;
2) baud rate software can be arranged;
3) it interrupts and inquiry mode is optional;
4) each channel that sends and receives is equipped with high-capacity FIFO;
5) FIFO triggers depth software and can set;
6) optional be arranged sends frame period and word interval.
The structure diagram of RS422 boards includes mainly that RS422 level shifting circuits are (electric comprising RS422 as shown in figs 6-8 Put down LVTTL level switch modules and LVTTL to RS422 level switch modules) magnetic coupling isolation module, FPGA control modules, PXI Bridge module and physical transfer circuit composition.Wherein FPGA is responsible for receiving the analogue data sent by PXI buses, is pressed after completing parsing Different RS422 level conversions channels is given according to corresponding single machine, is completed LVTTL level to the conversion of RS422 level, is then led to It crosses interface and gives corresponding single machine;FPGA also receives the data sent by each single machine simultaneously, completes to parse and fix according to one Formula is packaged, and is then reported to control host by PXI buses, is further analyzed data by control host, and test is completed. Magnetic coupling isolation module shields to circuit board.RS422 level shifting circuits include send and receive part, respectively by DS26C31 and DS26C32 is completed, and realizes conversion and LVTTL to RS422 level conversion of the LVTTL level to RS422 level.
In one embodiment of the utility model, the RS422 boards include the first RS422 output interfaces, for inciting somebody to action The first RS422 level shifting circuits, the first magnetic coupling of RS422 level conversions to LVTTL level are isolated, the 2nd RS422 outputs connect Mouthful, for by the 2nd RS422 level shifting circuits of LVTTL level conversions to RS422 level, the second magnetic coupling isolation and FPGA control Molding block;The first RS422 output interfaces and the 2nd RS422 output interfaces are for connecting connector, and described first RS422 output interfaces connect the first RS422 level shifting circuits, described in the first RS422 level shifting circuits connection First magnetic coupling is isolated;The 2nd RS422 output interfaces connect the 2nd RS422 level shifting circuits, the 2nd RS422 Level shifting circuit connects the second magnetic coupling isolation, and the first magnetic coupling isolation and the second magnetic coupling are isolated described in connection FPGA control modules.
Light-coupled isolation/magnetic coupling isolation module shields to circuit board.Its circuit is as shown in Figure 9.
PXI interface offers+12V ,+5V ,+3V3 carry out two times transfer by these types of power supply, conversion chip by DC-DC, The compositions such as LDO.In the embodiments of the present invention, veneer needs 0~10V of output analog outputs, 50 tunnel, 0~100mV simulations 8 tunnels of amount output, 0~± 20V analog outputs, 2 tunnel are defeated as analog signal using multi-disc DAC since way is relatively more Outgoing interface, every chip are all made of the analog signal output chip of multichannel, need constant, the company that ensure different channel different values Continuous output.DA pio chips use AD5361,14,540Ksps, 16 channel voltages output, output level -10V-10V.DAC The output of completion ± 20V is amplified in output by amplifier OP484.
The utility model uses PXI bus architectures, and PXI (PCI eXtensions for Instrumentation) is one Kind measuring towards test based on PC technologies and the robust platform of automation application.PCI standards (are had PCI electrical by PXI standards Bus characteristics, while there is the encapsulation of firm, modular Europe card) be combined together with special synchronous bus and software feature. One PXI system is made of three essential parts --- cabinet, controller and periphery I/O modules.This mould based on PXI Block framework, may be implemented the independent upgrading of components of system as directed component, and test system can be enable quickly to utilize these upgradings Component caused by new technology.
Api function is provided using dynamic link library on the driving upper layers PXI, for software transfer, application software passes through api function Interface operates hardware board.Logic in hardware board is controlled by FPGA to be executed, and FPGA has with api function interface One-to-one relationship is got off by the register mappings of PXI buses, and final host computer may be implemented various multiple by api function The test assignment of each different function is realized in miscellaneous operation.
The preferable specific implementation mode of the above, only the utility model, but the scope of protection of the utility model is not Be confined to this, any one skilled in the art within the technical scope disclosed by the utility model, according to this practicality Novel technical solution and its utility model design are subject to equivalent substitution or change, should all cover the protection model in the utility model Within enclosing.

Claims (7)

1. a kind of general comprehensive excitation system, which is characterized in that including cabinet, the cabinet inside be equipped with Zero greeve controller, Discrete magnitude signal output board, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards;One side external surface of the cabinet is equipped with display;The Zero greeve controller by the connection of PXI buses it is described from Dissipate amount signal output board, analog signals output board, frequency quantity signal output board, synchronizer board, ARINC429 boards and RS422 boards, the Zero greeve controller are also connected with the display.
2. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the Zero greeve controller be based on The embedded controller of PXI buses.
3. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the discrete magnitude signal output board FPGA control modules including light-coupled isolation module and for receiving the analog information sent by PXI buses;The light-coupled isolation Module connects FPGA control modules for connecting connector, the light-coupled isolation module.
4. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the analog signals output board Including light-coupled isolation module, FPGA control modules and analog signal output interface;The analog signal output interface is for connecting Connector, the analog signal output interface connect the light-coupled isolation module, and the light-coupled isolation module connects the FPGA Control module.
5. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the frequency quantity signal output board Including light-coupled isolation module, FPGA control modules and analog frequency signal output interface;The analog frequency signal output interface For connecting connector, the analog frequency signal output interface connects the light-coupled isolation module, the light-coupled isolation module Connect the FPGA control modules.
6. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the synchronizer board includes DDS module and FPGA control modules;The DDS module connects the FPGA and controls mould for connecting connector, the DDS module Block.
7. a kind of general comprehensive excitation system according to claim 1, which is characterized in that the RS422 boards include the One RS422 output interfaces, for by the first RS422 level shifting circuits, the first magnetic of RS422 level conversions to LVTTL level Coupling isolation, the 2nd RS422 output interfaces, for by the 2nd RS422 level conversions electricity of LVTTL level conversions to RS422 level Road, the isolation of the second magnetic coupling and FPGA control modules;The first RS422 output interfaces and the 2nd RS422 output interfaces are used In connection connector, the first RS422 output interfaces connect the first RS422 level shifting circuits, the first RS422 Level shifting circuit connects the first magnetic coupling isolation;The 2nd RS422 output interfaces connect the 2nd RS422 level and turn Change circuit, the 2nd RS422 level shifting circuits connect the second magnetic coupling isolation, the first magnetic coupling isolation and described the The isolation of two magnetic couplings connects the FPGA control modules.
CN201721741843.2U 2017-12-14 2017-12-14 A kind of general comprehensive excitation system Active CN207663247U (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110865956A (en) * 2019-10-18 2020-03-06 北京曙光航空电气有限责任公司 RS-422 communication isolation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110865956A (en) * 2019-10-18 2020-03-06 北京曙光航空电气有限责任公司 RS-422 communication isolation circuit

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