CN207650637U - Control panel portable detector in a kind of airplane digital communication component - Google Patents

Control panel portable detector in a kind of airplane digital communication component Download PDF

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Publication number
CN207650637U
CN207650637U CN201721142947.1U CN201721142947U CN207650637U CN 207650637 U CN207650637 U CN 207650637U CN 201721142947 U CN201721142947 U CN 201721142947U CN 207650637 U CN207650637 U CN 207650637U
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chip
module
bus
input
cpld
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CN201721142947.1U
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张子明
周勇军
郑永龙
彭虎
姚旭成
张俊
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State Run Wuhu Machinery Factory
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State Run Wuhu Machinery Factory
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Abstract

The utility model is related to control panel portable detectors in a kind of airplane digital communication component, include using high speed FPGA main control module, generate 429 bus timings 3282 tfi modules, carry out 429 bus data acquisitions and transmission 429 bus transceiver modules, using high speed CPLD devices digital quantity input/output module and control the serial port module of graphic control panel, by comparing 429 bus messages and digital quantity data information, the detection to air equipment circuit board is completed, human-computer interaction is carried out by touch screen.The utility model substantially reduces volume and weight, convenience is good, cost is saved, the flexibility designed and developed is greatly improved using programmable logic device such as FPGA, CPLD, touch screen is used to improve friendly interface as display control tool, simplify input-output equipment, it is easy to operation, it improves work efficiency.

Description

Control panel portable detector in a kind of airplane digital communication component
Technical field
The utility model is related to airborne equipment circuit board detecting field, in specifically a kind of airplane digital communication component Control panel portable detector.
Background technology
Currently, the detection of aviation airborne equipment and its circuit board generally uses its corresponding test equipment, these tests Equipment is often made of large number of equipment such as industrial personal computer, functional cards, display, mouse, keyboards, as in April, 2009 publishes《Meter Calculation machine measures and control》The 4th phase 706-707 of volume 17, page 714 discloses a kind of automatic machine examination of airborne radar jamming system The design method of measurement equipment, the detection device are made of 5 motorization carrying cases and spare part case, and volume and weight is very huge, It is not easy to very much mobile and carries, have to use environment and compare strict requirements;For another example publish within 2012《Observation and control technology》The The 60-62 pages of the phase of volume 31 the 4th discloses a kind of design and implementation methods of hand-held radar ATE, this method using liquid crystal display and Peripheral key is controlled as display control module, using ARM7 chips as MCU, although largely reducing volume and again Amount, but peripheral key still occupies certain region as input control, in addition the mechanical structure of peripheral key, which exists, uses the longevity The possibility of the problems such as short is ordered, the use of last liquid crystal display is only capable of providing the interactive underaction of the effect and user of output merely.
Invention content
The technical problem to be solved by the utility model is to provide control panel in a kind of airplane digital communication component is portable Formula detection device builds the detection device of processing module using touch screen as display control, with FPGA, using the device to certain Control panel is detected in type digital communication component, is suitable under various environment especially outfield complex environment to digital communication The detection troubleshooting work of control panel in component.
Technical problem to be solved in the utility model is realized using following technical scheme:
Control panel portable detector in a kind of airplane digital communication component, including main control module, 3282 tfi modules, 429 bus transceiver modules, digital quantity input/output module, serial port module, the main control module are connected with 3282 tfi modules 429 bus messages are received, 3282 tfi module is connected with the 429 bus transceiver module, and the main control module digital quantity is defeated Enter output module be connected detection digital information, the main control module be connected with the serial port module control displaying information on screen and Receive touch screen touch information.
The main control module, including the first chip, clock circuit, power module, jtag circuit, configuration circuit, it is described Clock circuit is connected with first chip provides clock signal, and the power module is connected with first chip provides electricity Source, the configuration circuit is connected with first chip provides power on configuration chip, the jtag circuit and first chip It is connected and download interface is provided, first chip uses the FPGA device of model EP3C5E144C8.
3282 tfi modules and 429 bus transceiver modules, including the second chip, level switch module, 429 are always Line inputs chip, 429 bus pio chips, 429 input/output interfaces, and second chip is connected offer with level switch module Clock signal, the level switch module and 429 buses input chip are connected the clock signal after offer level conversion, described 429 buses input chip is connected with the 429 bus pio chip, and 429 input/output interface is inputted with 429 bus Chip and 429 bus pio chips are connected.
Second chip uses the FPGA device of model EP3C5E144C8, and the level switch module includes NLSX4373DR2G two-way level convertings chip and the unidirectional electrical level transferring chips of SN74LVC4245,429 bus input core Piece model HS-3282, the 429 bus pio chip model HS-3182.
The digital quantity input/output module, including input selection CPLD, output selection CPLD, digital quantity are inputted and are connect Mouth, digital-quantity output interface, the input selection CPLD and output selection CPLD are connected with first chip transmits control Signal processed and data, the input selection CPLD are connected with the digital-quantity input interface, output selection CPLD with it is described Digital-quantity output interface is connected.
The input selection CPLD and output selection CPLD uses the CPLD devices of model MPC7128.
The serial port module connection display screen and first chip transmit control information, send display interface and reception Touch data;
The serial port module uses 232 serial port chips of model SP3232EEN.
The display screen is graphic control panel.
The utility model has the beneficial effects that:Compared with previous test equipment, the utility model is only by one piece of circuit board It is formed with one piece of touch screen, in addition cabinet weight is no more than 5 kilograms, eliminates industrial personal computer, bus board, display, keyboard, mouse The a large amount of external equipments such as mark, greatly reduce weight and volume, easy to carry, are suitble to aeronautical repair personnel in outfield complexity ring Control panel in digital communication component is detected under border and troubleshooting;In addition, the tens thousand of members of cost easily such as industrial personal computer, board, this Cost has also largely been saved in the reduction of a little equipment, alleviates the financial burden of enterprise;Third, FPGA, CPLD etc. can be compiled Journey logical device with greatly improving the flexibility designed and developed;Finally, touch screen is used to be improved as display control tool Friendly interface simplifies input-output equipment, easy to operation, improves work efficiency.
Description of the drawings
The utility model is further illustrated with reference to the accompanying drawings and examples.
Fig. 1 is the hardware overall structure figure of the utility model;
Fig. 2 is the main control module structure chart of the utility model;
Fig. 3 is the 429 bus transceiver module circuit diagrams of the utility model;
Fig. 4 is the 232 serial port circuit figures of the utility model;
Fig. 5 is the software overall flow figure of the utility model;
Fig. 6 is the transmitter sequential flow chart of the utility model;
Fig. 7 is the receiver sequential flow chart of the utility model;
Fig. 8 is that the RS-232 serial ports of the utility model sends and receivees software flow pattern.
Specific implementation mode
In order to make the technical means, creative features, achievement of purpose, and effectiveness of the utility model be easy to understand, under It is expanded on further in face of the utility model.
Hardware overall structure figure as shown in Figure 1:
Control panel portable detector in a kind of airplane digital communication component, it is characterised in that:Including main control module 1, 3282 tfi modules 2,429 bus transceiver modules 3, digital quantity input/output module 4, serial port module 5, the main control module 1 with 3282 tfi modules 2, which are connected, receives 429 bus messages, 3282 tfi module 2 and 429 bus transceiver module, 3 phase Even, the main control module 1 is connected with digital quantity input/output module 4 detects digital information, the main control module 1 and the string Mouth mold block 5, which is connected, controls displaying information on screen and reception touch screen touch information.
Main control module structure chart as shown in Figure 2:
The main control module 1 includes the first chip 11, clock circuit 12, power module 13, jtag circuit 14, configuration circuit 15;
The clock circuit 12 is connected with first chip 11 provides clock signal;
The power module 13 is connected with first chip 11 provides power supply;
The jtag circuit 14 is connected with first chip 11 provides download interface;
The configuration circuit 15 is connected with first chip 11 provides power on configuration information;
Using the FPGA device of model EP3C5E144C8, the main control module 1 contains to be surrounded first chip 11 First chip 11 is the minimum system that master chip is built.
3282 tfi modules 2 and 429 bus transceiver modules 3, including the second chip 21, level switch module 22, 429 buses input chip 31,429 bus pio chips 32,429 input/output interfaces 33;
Second chip 21 is connected with level switch module 22 provides clock signal;
The level switch module 22 and 429 buses input chip 31 are connected the clock signal after offer level conversion;
The 429 bus input chip 31 is connected with the 429 bus pio chip 32 for bus input and output;
429 input/output interface 33 inputs chip 31 with 429 bus and 429 bus pio chips 32 are connected;
Second chip 21 uses the FPGA device of model EP3C5E144C8;
The level switch module 22 includes NLSX4373DR2G two-way level convertings chip and SN74LVC4245 unidirectional Electrical level transferring chip;
The 429 bus input chip, 31 model HS-3282;
429 bus pio chip, the 32 model HS-3182.
In order to complete the detection to control panel 429 bus and digital quantity transfer function in digital communication component, the present apparatus carries The corresponding interface resource is supplied, most 12 tunnels that 429 bus signals may be implemented receive and 6 road sending functions, while also providing 24 Railway digital amount is read and 24 railway digital amounts write out function, and user is realized by touch screen to the test instruction issuing of device and test As a result reading.Wherein the transmission rate of 429 signals can flexibly be continuously provided as 10KHz, 48KHz, 50KHz, 100KHz Equal target frequencies;For touch screen with device by RS-232 serial communications, frequency can also be arranged 9600,19200,115200 etc..
It is master controller that Setup Controller, which uses double FPGA framework, one of FPGA, is responsible for the choosing to 429 transceiver modules Reset that is logical, generating the chips such as CPLD and HS3282 and clock signal, with the serial communication of touch screen, to 429 bus datas and Data analysis and combination of digital quantity etc.;Another piece of FPGA is the sequence controller of HS3282 chips, is responsible for each piece of HS3282 core The generation and detection of the roads Pian Ge control signal, realize the sending and receiving of 429 bus datas, complete 429 bus datas and Master control FPGA is communicated.429 bus signals are sended and received using 6 HS3282 protocol chips as its bus signals Transceiver, every HS3282 chip has two-way input and all the way output channel, and coordinates again when sending and made with HS3182 chips For bus signal level converter.Because the channel of digital quantity is more, two panels CPLD is devised as its extension switching control System, wherein a piece of switch for digital quantity input, another switches for digital output.It is wanted with reliability to reach portable It asks, device devises graphic control panel as human-computer interaction tool, is communicated by RS-232 serial ports.Because FPGA with it is more Number on-board circuitry plate level mutually mismatches, and unidirectional and multidirectional level switch module has also been devised in the present apparatus.
429 buses are the reference formats of digital data transmission between aircraft electronic system, and the transmitting-receiving of 429 signals is by 3282 Tfi module 2 and 429 bus transceiver modules 3 are completed, when 3282 tfi modules 2 are generated by the EP3C5E144 for controlling HS-3282 Sequence realizes its transmitters and receivers function respectively.
429 bus transceiver module circuit diagrams as shown in Figure 3:
Including HS-3282 chip U29 and HS-3182 chip U35, because HS-3282 chip U29 signals are 5V level, and The the second chip 21FPGA chip signals for manipulating HS-3282 chips U29 are 3.3V level, therefore the second chip and HS-3282 chips U29 connects the bi-directional conversion for realizing 3.3V-5V level, the HS- by the NLSX4373DR2G two-way level convertings chip To 27 feet, totally 16 pins are 429 data/address bus to 11 feet of 3282 chip U29, transmit 16 bit data words, the HS-3282 chips 31 feet of U29, that is, 429DO pins are connected to 4 feet of HS-3182 chips U35,32 feet, that is, # of the HS-3282 chips U29 13 feet that 429DO pins are connected to HS-3182 chips U35 export 429 differential signals, 33 feet of the HS-3282 chips U29 Pin ENTX is enabled to send, word enables pin #CWSTR to 34 feet in order to control, and 28 feet and 29 feet are data word clock pins # PL1, #PL2 complete the connection for sending 429 signals.
Two-way 429 signal input may be selected in the HS-3282 chips U29, and 429DI (A), 429DI (B) pin receive one 429 signals of group, #D/R pins are to receive interrupt pin, and SEL is data selection pin, and #EN is that receiver data enables pin.
The present apparatus is using technical grade touch screen as human-computer interaction tool, and user is by clicking on-screen button keyboard to hardware It sends instruction and keys in data, in addition also show back production data and as a result, touch screen receives and dispatches number by RS-232 serial ports to device According to so also devising corresponding serial ports transceiver module in master control FPGA.
As shown in Fig. 4 232 serial interface switching circuit:
Including 232 serial port chip U41 and touch screen interface J15, wherein 232 serial port chip U41 model SP3232EEN, The serial ports that 11 feet of the 232 serial port chip U41 connect first chip 11 sends foot, 12 feet of the 232 serial port chip U41 The serial ports for connecting first chip 11 receives foot, and 13 feet of the 232 serial port chip U41 connect the 2 of touch screen interface J15 Foot, 14 feet connect 3 feet of touch screen interface J15, complete 232 serial ports conversion functions to control touch screen.
The software pilot flow and operation principle of this circuit is described below:
The present apparatus writes all codes in FPGA and CPLD with Verilog hardware description languages, for realizing that it is corresponding Function.The software of test module is contained mainly in two panels FPGA, when being respectively completed module overall control and generating HS-3282 The function of sequence.Testing process include comparison output digital quantity and receive 429 signal process and comparison send 429 signals and The digital quantity signal process of input.
The software overall flow figure of entire detection device is as shown in Figure 5:
Touch screen input instruction after, send 429 signals, from touch screen receive the channel information sum number to be sent it is believed that Breath, 429 signals for opening Target Board, that is, Board Under Test are converted to digital quantity signal function, and 429 signals are sent with 3282 sequential operations, Detection plate CPLD reads the data of digital quantity port, and the digital quantity port data of 429 information and reading that compare transmission obtains knot Fruit, if result unanimously if measured target plate to change function normal, if the inconsistent Target Board capability error of result, finally to touch Screen sends conclusion presentation of information and completes detection operation;
Touch screen does not input instruction, then test board exports digital quantity signal, receives 429 signal instructions, is received from touch screen The digital information to be exported opens Board Under Test digital quantity and is converted to 429 semiotic functions, and test board is by CPLD to digital quantity Output port exports digital information, receives 429 bus signals by 3282 chips, parses 429 bus signals received, right Digital quantity than output and the 429 bus signals data that receive, if result unanimously if measured target plate to change function normal, if result Inconsistent then Target Board capability error finally sends conclusion presentation of information to touch screen and completes detection operation.
The transmitting-receiving of 429 bus signals is completed by 3282 tfi modules 2 and 429 bus transceiver modules 3, hair as shown in FIG. 6 Send device sequential flow chart:
It is high level to initialize #CWSTR, #PL1, #PL2, and ENTX signals are low level.The determination data to be sent first Then frame amount is inputted to HS-3282 by data/address bus and sends control word, determines transmission rate, verification mode and data word Control word enable signal #CWSTR is set low and keeps at least 130ns by length, then it is high level that #CWSTR, which is drawn,.Then it will send out The data sent are split as data word 1 and data word 2 according to format, first from data/address bus output data word 1, by #PL1 set low to It is drawn high after keeping 200ns less, from data/address bus output data word 2, #PL2 is set low and is drawn high after at least keeping 200ns, at this time For first data manipulation of the data frame, the transmission of every group of data word 1, data word 2 can be repeated (per most 8 of frame Data), TXR signals are detected later, if low, illustrate that data come into HS-3282, will be sent at this time and are enabled ENTX and be set to High level exports 429 differential signals from 429DO, #429DO pin of HS-3282, then illustrates until TXR signals return to high level It is empty to send BUFFEG, ENTX is put back into low level, then judges whether data frame distributes, again to HS- if not distributing 3282 write-in data, operate if having distributed and terminate.
Receiver sequential flow chart as shown in Figure 7:
It is high level to initialize #CWSTR, #EN, SEL, receives control word by data/address bus write-in, it has been determined that recipient Whether gate filtration, specifically filter content, receiver frequency, receiver rate etc., then by control word enable signal # CWSTR, which is set low, keeps at least 130ns, then draws high #CWSTR signals.If terminated from 429DI (A), the 429DI (B) of HS-3282 One group of complete 429 signal is received, then #D/R signals become low level, and detection #D/R once becomes low level, then will receive data Selection signal SEL is set to 0, then receiver data enable signal #EN is set to 0, at this time the data on readout data bus, is exactly Data 1 are received, #EN is finally retracted into high level;SEL is set to height, then #EN is set to 0 by the same time sequential routine, is read at this time It is exactly to receive data 2, then #EN is retracted high level to take the data on data/address bus.Data 1 and data 2 are parsed according to format, One group of data is then received to complete.
RS-232 serial ports as shown in Figure 8 sends and receivees software flow pattern:
Baud rate generator is constructed with the FPGA PLL carried, RXD letters are acquired with 6 times of baud rate frequencies when receiving Number, once detecting it has failing edge, then 3 clocks are waited for, in order to acquire signal in the middle part of each baud rate, then every 6 RXD signal of a clock acquisition, group becomes the byte data received after acquiring 8 times;Wave is then directly used when transmission TXD is set to high level by special rate frequency first as clock, TXD is set to low level when receiving transmission instruction, then often A data is sent to a clock, high level is retracted after all sending out the 8 of a byte data, then by TXD.
In addition, touch screen interface image and touch-control setting are formed by its design of Configuration Software, need to distribute for touch control component Corresponding address, and frame head, baud rate, initialization of variable etc. are set on configuration software.
Basic principles, main features, and advantages of the present invention has been shown and described above.One's own profession The technical staff of industry is it should be appreciated that the present utility model is not limited to the above embodiments, described in above embodiments and description Only the principles of the present invention, on the premise of not departing from the spirit and scope of the utility model, the utility model also has Various changes and modifications, these various changes and improvements fall within the scope of the claimed invention.The requires of the utility model Protection domain is defined by the appending claims and its equivalent thereof.

Claims (5)

1. control panel portable detector in a kind of airplane digital communication component, it is characterised in that:Including main control module (1), 3282 tfi modules (2), 429 bus transceiver modules (3), digital quantity input/output module (4), serial port module (5), the master control Module (1) is connected with 3282 tfi modules (2), and 3282 tfi module (2) is connected with the 429 bus transceiver module (3), The main control module (1) is connected with digital quantity input/output module (4), the main control module (1) and the serial port module (5) phase Even;The main control module, including the first chip, clock circuit, power module, jtag circuit, configuration circuit, the clock electricity Road is connected with first chip provides clock signal, and the power module is connected with first chip provides power supply, described Configuration circuit is connected with first chip provides power on configuration chip, and the jtag circuit is connected offer with first chip Download interface.
2. control panel portable detector in a kind of airplane digital communication component according to claim 1, feature exist In:3282 tfi modules (2) and 429 bus transceiver modules (3), including the second chip (21), level switch module (22), 429 buses input chip (31), 429 bus pio chips (32), 429 input/output interfaces (33), second chip (21) it is connected with level switch module (22) and clock signal is provided, the level switch module (22) inputs chip with 429 buses (31) be connected the clock signal after providing level conversion, the 429 bus input chip (31) and the 429 bus pio chip (32) it is connected, 429 input/output interface (33) and 429 bus input chip (31) and 429 bus pio chips (32) it is connected;
Second chip (21) uses the FPGA device of model EP3C5E144C8;
The level switch module (22) includes NLSX4373DR2G two-way level convertings chip and the unidirectional level of SN74LVC4245 Conversion chip;
429 bus inputs chip (31) model HS-3282;
429 bus pio chip (32) the model HS-3182.
3. control panel portable detector in a kind of airplane digital communication component according to claim 1, feature exist In:The digital quantity input/output module (4), including input selection CPLD (41), output selection CPLD (42), digital quantity are defeated Incoming interface (43), digital-quantity output interface (44), the input selection CPLD (41) and output selection CPLD (42) and institute It states connected exchange of the first chip (11) and transmits signal, the input selection CPLD (41) and the digital-quantity input interface (43) phase Even, the output selection CPLD (42) is connected with the digital-quantity output interface (44);
The input selection CPLD (41) and the output selection CPLD (42) use the CPLD devices of model MPC7128.
4. control panel portable detector in a kind of airplane digital communication component according to claim 1, feature exist In:Serial port module (5) the connection display screen and first chip (11) transmit control information, send display interface and connect Receive touch data;
The serial port module (5) uses 232 serial port chips of model SP3232EEN.
5. control panel portable detector in a kind of airplane digital communication component according to claim 4, feature exist In:The display screen is graphic control panel.
CN201721142947.1U 2017-09-07 2017-09-07 Control panel portable detector in a kind of airplane digital communication component Active CN207650637U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109828238A (en) * 2019-02-18 2019-05-31 航天南湖电子信息技术股份有限公司 A kind of timing/AGC device
CN113109691A (en) * 2021-03-04 2021-07-13 国营芜湖机械厂 Portable circuit board test equipment based on VI curve

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109828238A (en) * 2019-02-18 2019-05-31 航天南湖电子信息技术股份有限公司 A kind of timing/AGC device
CN113109691A (en) * 2021-03-04 2021-07-13 国营芜湖机械厂 Portable circuit board test equipment based on VI curve

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