CN207636963U

CN207636963U - Variable voltage clock output circuit

Info

Publication number: CN207636963U
Application number: CN201721585345.3U
Authority: CN
Inventors: 侯继
Original assignee: Shenzhen Zhongke Blue News Technology Co Ltd
Current assignee: Shenzhen Zhongke Lanxun Technology Co., Ltd
Priority date: 2017-11-23
Filing date: 2017-11-23
Publication date: 2018-07-20
Anticipated expiration: 2027-11-23

Abstract

The utility model provides a kind of variable voltage clock output circuit, including：Active crystal oscillating circuit, adjustable voltage programme control circut, operational amplification circuit, regulator circuit and level shifting circuit；Adjustable voltage programme control circut, operational amplification circuit, regulator circuit and level shifting circuit are electrically connected successively；Active crystal oscillating circuit is electrically connected with level shifting circuit；Adjustable voltage programme control circut realizes different voltage outputs for receiving control instruction；Operational amplification circuit carries out voltage amplification processing；Regulator circuit carries out steady pressure treatment；Active crystal oscillating circuit is used to generate the clock signal of high voltage 3.3V, low-voltage 0V；The clock signal of voltage and the output of active crystal oscillating circuit that level shifting circuit is used to be exported according to regulator circuit carries out the clock signal of level conversion output 1.25V 5.5V.The circuit can realize that the clock signal that program span of control limit of control is 1.25V 5.5V exports, and signal amplitude adjusting is fine, circuit is simple, integrated level is high.

Description

Variable voltage clock output circuit

Technical field

The utility model is related to clock circuit technical fields, more particularly, to variable voltage clock output circuit.

Background technology

The output voltage of current clock output circuit is substantially high voltage 3.3V, low-voltage 0V, and the voltage of output is It is fixed, it cannot adjust, its application scenarios is caused to be very restricted.

Utility model content

The purpose of this utility model is that in view of the deficiencies of the prior art, providing a kind of variable voltage clock output circuit For solving the deficiencies in the prior art.

The utility model provides a kind of variable voltage clock output circuit, including：Active crystal oscillating circuit, adjustable voltage journey Control circuit, operational amplification circuit, regulator circuit and level shifting circuit.

The adjustable voltage programme control circut, the operational amplification circuit, the regulator circuit and the level shifting circuit It is electrically connected successively；The active crystal oscillating circuit is electrically connected with the level shifting circuit.

The adjustable voltage programme control circut realizes different voltage outputs for receiving control instruction.

The operational amplification circuit carries out voltage amplification processing to the voltage that the adjustable voltage programme control circut exports.

The regulator circuit is used to carry out steady pressure treatment to the voltage that the operational amplification circuit exports.

The active crystal oscillating circuit is used to generate the clock signal of high voltage 3.3V, low-voltage 0V.

The voltage and the active crystal oscillating circuit that the level shifting circuit is used to be exported according to the regulator circuit export Clock signal carry out level conversion output 1.25V-5.5V clock signal.

As a further improvement of the above technical scheme, the adjustable voltage programme control circut selects DS1803 chips.

As a further improvement of the above technical scheme, the level shifting circuit selects 74LVC1T45.

As a further improvement of the above technical scheme, the operational amplification circuit selects LM358.

As a further improvement of the above technical scheme, the regulator circuit selects LM317.

As a further improvement of the above technical scheme, the active crystal oscillating circuit selects SG-210STF.

As a further improvement of the above technical scheme, the power supply of the regulator circuit is terminated with current insurance silk.

As a further improvement of the above technical scheme, the clock frequency of the active crystal oscillating circuit output is 26Mhz.

As a further improvement of the above technical scheme, the variable voltage clock output circuit further includes：Analog switch Circuit；The analog switching circuit is electrically connected with the level shifting circuit, when the analog switch is defeated for controlling clock Go out whether circuit normally exports.

As a further improvement of the above technical scheme, the analog switching circuit selects SN74LVC1G66.

Using technical solution provided by the utility model, compared with existing known technology, at least have following beneficial to effect Fruit：The variable voltage clock output circuit can realize program span of control limit of control be 1.25V-5.5V clock signal output, it can be achieved that The a certain range of adjusting of output voltage, signal amplitude adjusting is fine, circuit is simple, integrated level is high.

Description of the drawings

It, below will be to required use in embodiment in order to illustrate more clearly of the technical solution of the utility model embodiment Attached drawing be briefly described, it should be understood that the following drawings illustrates only some embodiments of the utility model, therefore should not be by Regard the restriction to range as, for those of ordinary skill in the art, without creative efforts, may be used also To obtain other relevant attached drawings according to these attached drawings.

Fig. 1 is the structural schematic diagram for the variable voltage clock output circuit that one embodiment of the utility model proposes.

Fig. 2 is the circuit diagram for the variable voltage clock output circuit that one embodiment of the utility model proposes.

Fig. 3 is the structural schematic diagram for the variable voltage clock output circuit that another embodiment of the utility model proposes.

Fig. 4 is the circuit diagram for the variable voltage clock output circuit that another embodiment of the utility model proposes.

Main element symbol description：

10- adjustable voltages programme control circut, 20- operational amplification circuits, 30- regulator circuits, 40- level shifting circuits, 50- have Source crystal oscillator circuit, 60- analog switching circuits.

Specific implementation mode

Hereinafter, the various embodiments of the disclosure will be described more fully.The disclosure can have various embodiments, and It can adjust and change wherein.It should be understood, however, that：There is no disclosure protection domain is limited to specific reality disclosed herein The intention of example is applied, but the disclosure should be interpreted as to all in the spirit and scope for covering the various embodiments for falling into the disclosure Adjustment, equivalent and/or alternative.

Hereinafter, disclosed in the term " comprising " that can be used in the various embodiments of the disclosure or " may include " instruction Function, operation or the presence of element, and do not limit the increase of one or more functions, operation or element.In addition, such as existing Used in the various embodiments of the disclosure, term " comprising ", " having " and its cognate are meant only to indicate special characteristic, number Word, step, operation, the combination of element, component or aforementioned item, and be understood not to exclude first one or more other Feature, number, step, operation, the combination of element, component or aforementioned item presence or increase one or more features, number, Step, the possibility of operation, the combination of element, component or aforementioned item.

In the various embodiments of the disclosure, statement " at least one of A or/and B " includes the word listed file names with Any combinations or all combinations.For example, statement " A or B " or " at least one of A or/and B " may include A, may include B or can Including A and B both.

The statement (" first ", " second " etc.) used in the various embodiments of the disclosure can be modified in various implementations Various constituent element in example, but respective sets can not be limited into element.For example, presented above be not intended to limit the suitable of the element Sequence and/or importance.The purpose presented above for being only used for differentiating an element and other elements.For example, the first user fills It sets and indicates different user device with second user device, although the two is all user apparatus.For example, not departing from each of the disclosure In the case of the range of kind embodiment, first element is referred to alternatively as second element, and similarly, second element is also referred to as first Element.

It should be noted that：It, can be by the first composition member if a constituent element ' attach ' to another constituent element by description Part is directly connected to the second constituent element, and " connection " third can be formed between the first constituent element and the second constituent element Element.On the contrary, when a constituent element " being directly connected to " is arrived another constituent element, it will be appreciated that in the first constituent element And second third constituent element is not present between constituent element.

The term " user " used in the various embodiments of the disclosure, which may indicate that, to be used the people of electronic device or uses electricity The device (for example, artificial intelligence electronic device) of sub-device.

The term used in the various embodiments of the disclosure is used only for the purpose of describing specific embodiments and not anticipates In the various embodiments of the limitation disclosure.Unless otherwise defined, otherwise all terms used herein (including technical term and Scientific terminology) there is contain identical with the various normally understood meanings of embodiment one skilled in the art of the disclosure Justice.The term (term such as limited in the dictionary generally used) be to be interpreted as have in the related technical field The identical meaning of situational meaning and the meaning of Utopian meaning or too formal will be interpreted as having, unless at this It is clearly defined in disclosed various embodiments.

Embodiment 1

As shown in Figure 1, a kind of variable voltage clock output circuit, including：Active crystal oscillating circuit 50, adjustable voltage program-controlled electric Road 10, operational amplification circuit 20, regulator circuit 30 and level shifting circuit 40.

Adjustable voltage programme control circut 10, operational amplification circuit 20, regulator circuit 30 and level shifting circuit 40 are electrical successively Connection；Active crystal oscillating circuit 50 is electrically connected with level shifting circuit 40.

Adjustable voltage programme control circut 10 realizes different voltage outputs for receiving control instruction.

Operational amplification circuit 20 carries out voltage amplification processing to the voltage that adjustable voltage programme control circut 10 exports.

Regulator circuit 30 is used to carry out steady pressure treatment to the voltage that operational amplification circuit 20 exports.

Active crystal oscillating circuit 50 is used to generate the clock signal of high voltage 3.3V, low-voltage 0V.

The clock that the voltage and active crystal oscillating circuit 50 that level shifting circuit 40 is used to be exported according to regulator circuit 30 export Signal carries out the clock signal of level conversion output 1.25V-5.5V.

High voltage is 1.25V-5.5V, the clock signal of low-voltage 0V is wanted suitable for the design of most circuit commons It asks, application scenarios are more extensive.

As shown in Fig. 2, in the present embodiment, adjustable voltage programme control circut 10 selects DS1803 chips.DS1803 chips are High-precision voltage value output may be implemented in a programmable addressable digital potentiometer.Addressable digital regulation resistance DS1803 packets Containing 256 grades of digital potentiometer of single channel.The chip is controlled by 2 line serial line interfaces.Allowed at one 2 by the input of 3 bit address 8 chips are at most addressed in line bus.It can read or be written accurate tap position.DS1803 using 16 pin SO encapsulation and 14 pin TSSOP encapsulation, provide 3 kinds of standard electric resistance values：10k Ω, 50k Ω and 100k Ω.DS1803 meets technical grade temperature model It encloses, is widely used in CCFL inverters, instrument and Industry Control, media product, PDA and cellular phone and portable electronic.

Specifically, the pin 9 (SCL) of DS1803 chips and pin 10 (SDA) connection programming Control end, pin 4 (W1) is even Operational amplification circuit 20 is connect, pin 16 (VCC) connects 3.3V, while pin 16 is grounded by capacitance C1；Pin 1 connects 3V references Voltage.

Operational amplification circuit 20 selects LM358.

LM358 is dual operational amplifier, inside include there are two independent, high-gain, internal frequency compensate operation Amplifier is suitable for the very wide single supply of supply voltage range and uses, dual power supply operating mode is also applied for, in the work of recommendation Under the conditions of, source current is unrelated with supply voltage.The use scope of LM358 include sensor amplifier, DC current gain module and its The occasion using operational amplifier of his all available single supply power supplies.1 tunnel in 2 road operational amplifiers is used in this circuit Carry out voltage amplification processing.

Specifically, pin 3 (normal phase input end) the connection adjustable voltage programme control circut 10 of LM358 chips, LM358 chips Pin 1 (output end) connects regulator circuit 30, and resistance R2 connect the (output of pin 1 of LM358 chips with one end after capacitance C4 parallel connections End) and pin 2 (inverting input)；The pin 2 (inverting input) of LM358 chips is also grounded by resistance R1.LM358 chips Pin 4 (power cathode) meet -1V, the pin 8 (positive pole) of LM358 chips connects+12V, the 8 (power supply of pin of LM358 chips Anode) it is grounded by capacitance C3.

Regulator circuit 30 selects LM317.

LM317 is one of the power IC being most widely used, it not only has fixed three-terminal voltage-stabilizing circuit Simplest form, but also with the adjustable feature of output voltage.In addition, also have range of regulation is wide, voltage regulation performance is good, noise is low, Ripple Suppression than it is high the advantages that.Lm317 is adjustable 3 proper Voltagre regulators, the energy in 1.2 volts to 37 volts of output voltage range Enough to provide the electric current more than 1.5 peace, this voltage-stablizer is highly susceptible to using.

Specifically, the pin 1 (ADJ) of LM317 chips connects operational amplification circuit 20, and the pin 2 of LM317 chips connects electricity Flat conversion circuit 40.The pin 3 (VI) of LM317 chips also passes through electricity by current insurance silk RF1 connection+12V, pin 3 (VI) Hold C5 ground connection.The pin 2 of LM317 chips is grounded by capacitance C7, and the pin 4 of LM317 chips is grounded by capacitance C6, resistance R3 Both ends are separately connected the pin 1 and pin 4 of LM317 chips, and the pin 2 and pin 4 of LM317 chips are direct-connected.

Active crystal oscillating circuit 50 selects SG-210STF.The clock frequency that active crystal oscillating circuit 50 exports is 26Mhz.

Specifically, the pin 1 (NC) of SG-210STF chips is grounded by resistance R4, pin 2 (GND) ground connection, pin 3 (OUT) level shifting circuit 40, pin 4 (VCC) connection+3.3V are connected, pin 4 (VCC) is also grounded by capacitance C8.

Level shifting circuit 40 selects 74LVC1T45.74LVC1T45 is a kind of electric pressure converter.

Specifically, the pin 1 (VCCA) of 74LVC1T45 chips and pin 5 (DIR) connect 3.3V, and pin 2 (GND) is grounded, Pin 3 is connected with source crystal oscillator circuit 50 by pull-up resistor R5, and pin 6 (VCCB) connects regulator circuit 30, and pin 4 is as variable The output end of voltage clocks output circuit.

Embodiment 2

Embodiment 2 is exactly to increase analog switching circuit on the basis of embodiment 1.As shown in figure 3, a kind of variable voltage Clock output circuit, including：Active crystal oscillating circuit 50, adjustable voltage programme control circut 10, operational amplification circuit 20, regulator circuit 30, level shifting circuit 40 and analog switching circuit 60.

Adjustable voltage programme control circut 10, operational amplification circuit 20, regulator circuit 30, level shifting circuit 40 and analog switch Circuit 60 is electrically connected successively；Active crystal oscillating circuit 50 is electrically connected with level shifting circuit 40.

Analog switching circuit 60 is for controlling whether clock output circuit normally exports.

As shown in figure 4, in the present embodiment, adjustable voltage programme control circut 10 selects DS1803 chips.

Operational amplification circuit 20 selects LM358.

LM358 is dual operational amplifier.It is carried out at voltage amplification using 1 tunnel in 2 road operational amplifiers in this circuit Reason.

Regulator circuit 30 selects LM317.

Specifically, the pin 1 (VCCA) of 74LVC1T45 chips and pin 5 (DIR) connect 3.3V, and pin 2 (GND) is grounded, Pin 3 is connected with source crystal oscillator circuit 50 by pull-up resistor R5, and pin 6 (VCCB) connects regulator circuit 30, and pin 4 passes through resistance R6 connections analog switching circuit 60.

Analog switching circuit 60 selects SN74LVC1G66.SN74LVC1G66 is a kind of single channel of Texas Instruments' exploitation Analog switch.

Specifically, the pin 1 of SN74LVC1G66 connects level shifting circuit 40, and pin 3 is grounded, and pin 4 is that switch controls Whether end is normally exported by the height controlling switch 2 of 4 level of pin, and when pin 4 is high level, pin 2 exports pin 1 Electric signal normally export, when pin 4 is low level, pin 2 is without normal output.Pin 5 meets 3.3V.Pin 2 is used as can power transformation Press the output end of clock output circuit.

The operation principle of variable voltage clock output circuit is as follows：

Active crystal oscillating circuit generates the clock signal of the voltage output of high voltage 3.3V, low-voltage 0V.It is input to The A input ports of 74LVC1T45 chips.Adjustable voltage programme control circut provide adjustable voltage stepping 0.05V, voltage range 1.25 to The output of 5.5V.Digital regulation resistance chip DS1803 in adjustable voltage programme control circut can software 256 grades of resistance values of setting.Number The high termination 3V of potentiometer, low side ground connection.Centre tap W1 takes the voltage that software is arranged, and is 11.7mV per level-one.LM358 amplifiers Circuit is input to voltage amplification the ports ADJ (pin 1) of LM317.The ports VO (pin 2 and pin 4) voltage of LM317 is always high In the ports ADJ (pin 1) 1.25V.When controlling DS1803 generation voltage outputs, you can allow LM317 to generate corresponding voltage defeated Go out.Regulator circuit is output to the ports VCCB (pin 6) of electrical level transferring chip 74LVC1T45.

The ports A (pin 1) voltage of electrical level transferring chip 74LVC1T45 uses 3.3V.Match with 3.3V clock signals. By the voltage for changing the ports VCCB, you can it is VCCB, the clock signal of low level 0V to obtain high level.Clock signal is defeated again Enter the ports A (pin 1) to analog switch chip SN74LVC1G66.By the C-terminal mouth (pin 4) of control module switch chip, The output and closing of i.e. controllable clock signal.

It will be appreciated by those skilled in the art that the accompanying drawings are only schematic diagrams of a preferred implementation scenario, module in attached drawing or Flow is not necessarily implemented necessary to the utility model.

It will be appreciated by those skilled in the art that the module in device in implement scene can be described according to implement scene into Row is distributed in the device of implement scene, can also be carried out respective change and is located at the one or more dresses for being different from this implement scene In setting.The module of above-mentioned implement scene can be merged into a module, can also be further split into multiple submodule.

Above-mentioned the utility model serial number is for illustration only, does not represent the quality of implement scene.Disclosed above is only this Several specific implementation scenes of utility model, still, the utility model is not limited to this, any those skilled in the art's energy Think of variation should all fall into the scope of protection of the utility model.

Claims

1. a kind of variable voltage clock output circuit, which is characterized in that including：Active crystal oscillating circuit, adjustable voltage programme control circut, Operational amplification circuit, regulator circuit and level shifting circuit；

The adjustable voltage programme control circut, the operational amplification circuit, the regulator circuit and the level shifting circuit are successively It is electrically connected；The active crystal oscillating circuit is electrically connected with the level shifting circuit；

The adjustable voltage programme control circut realizes different voltage outputs for receiving control instruction；

The operational amplification circuit carries out voltage amplification processing to the voltage that the adjustable voltage programme control circut exports；

The regulator circuit is used to carry out steady pressure treatment to the voltage that the operational amplification circuit exports；

The active crystal oscillating circuit is used to generate the clock signal of high voltage 3.3V, low-voltage 0V；

The voltage and the active crystal oscillating circuit that the level shifting circuit is used to export according to the regulator circuit export when Clock signal carries out the clock signal of level conversion output 1.25V-5.5V.

2. variable voltage clock output circuit according to claim 1, which is characterized in that the adjustable voltage programme control circut Select DS1803 chips.

3. variable voltage clock output circuit according to claim 1, which is characterized in that the level shifting circuit is selected 74LVC1T45。

4. variable voltage clock output circuit according to claim 1, which is characterized in that the operational amplification circuit is selected LM358。

5. variable voltage clock output circuit according to claim 1, which is characterized in that the regulator circuit is selected LM317。

6. variable voltage clock output circuit according to claim 1, which is characterized in that the active crystal oscillating circuit is selected SG-210STF。

7. variable voltage clock output circuit according to claim 1, which is characterized in that the feeder ear of the regulator circuit It is connected to current insurance silk.

8. variable voltage clock output circuit according to claim 1, which is characterized in that the active crystal oscillating circuit output Clock frequency be 26Mhz.

9. variable voltage clock output circuit according to claim 1, which is characterized in that the variable voltage clock output Circuit further includes：Analog switching circuit；The analog switching circuit is electrically connected with the level shifting circuit, and the simulation is opened It closes for controlling whether the variable voltage clock output circuit normally exports.

10. variable voltage clock output circuit according to claim 9, which is characterized in that the analog switching circuit choosing Use SN74LVC1G66.