CN207518301U - A kind of boost type wireless charging receiving circuit - Google Patents

Abstract

The utility model relates to a step-up wireless charging receiving circuit, which does not adopt the traditional feedback method, but uses the characteristic that the output current of the energy storage inductor does not change with the duty cycle and charging time, and when the voltage of the charging battery does not reach the required In the case of low voltage, it is charged by a constant charging current, and when the voltage of the rechargeable battery reaches the required voltage, it is charged by a constant voltage, which improves the charging control and the stability of the charging process, and realizes step-up wireless charging.

Description

A step-up wireless charging receiving circuit

technical field

The utility model relates to the field of wireless charging, in particular to a step-up wireless charging receiving circuit.

Background technique

In order to improve the charging efficiency of the charger, most of the circuits of the charger are based on DC-DC converters. Due to the high input voltage of general wired chargers, it is convenient to use a step-down DC-DC structure to convert the input voltage into the voltage required by the lithium battery, such as 4.2V. However, for wireless charging, due to the limitation of wireless transmission efficiency and transmission power, the voltage received by wireless chargers is usually small, even less than 4.2V, so the buck DC-DC structure cannot be applied to wireless chargers . In order to obtain a relatively high voltage for the wireless charger, a step-up DC-DC structure must be used.

Please refer to FIG. 1 and FIG. 2 , FIG. 1 is a circuit structure diagram of a conventional step-up DC-DC charger, and FIG. 2 is a timing diagram of the charger control in FIG. 1 . For the charger, there needs to be a constant current mode and a constant voltage mode - first charge the output voltage Vout to VREF in the constant current mode, and then switch to the constant voltage mode. Among them, for the constant current mode, the output/charging current is expected to be constant. It can be seen from Figure 1 and Figure 2 that VDC is the input voltage. S controls the on-off of the power tubes MN and MP, and S is controlled by a combination of Reset and Set signals——when Reset is input, S is 0; when Set is input, S is 1. And the S control adopts a constant frequency control method, that is, the reset signal Reset with a constant frequency Appear. The current Iout flowing through the power transistor MP when the charging current is S=0 (at this time, the power transistor MN is disconnected and the power transistor MP is turned on). The charging current Iout generates a voltage VSENS through the integrator, and the voltage VSENS=1/C1·∫I _out ·dt, wherein C1 is an integrating capacitor, and the integrating time is ΔT _CHG . When VSENS exceeds the reference voltage VREF (VREF=1/C1·I _av ·ΔT _SW , representing that the average charging current reaches the rated value, where Iav is the average current), a Set signal is generated.

However, the above-mentioned feedback control method using constant frequency is unstable, as shown in FIG. 3 , which is a schematic diagram of problems existing in the feedback control method using constant frequency when charging in the existing step-up DC-DC charger. When there is a small disturbance ΔI1 in _IL , this disturbance will not be suppressed by feedback, but will become larger and larger, such as ΔI2.

In addition, the utilization of step-up wireless charging brings new challenges to the existing charging control methods. Please refer to Fig. 4, Fig. 4 is the circuit structure diagram of the step-up wireless charging circuit based on the DC-DC charging circuit of Fig. The only difference in the charging circuit is that a resonant circuit and a rectifier REC are added. Wherein, the resonant circuit can be connected in series or in parallel, and the rectifier can be a full-wave rectifier, a half-wave rectifier, a voltage doubler, and the like. After the output of the rectifier is stabilized and filtered by the capacitor C _DC , it is used as the input of the subsequent step-up DC-DC. However, please refer to FIG. 5 . FIG. 5 is a simulation diagram of the output voltage VDC of the rectifier of the step-up wireless charging circuit in FIG. 4 varying with the duty cycle D and charging time. For a wired DC-DC boost charging circuit, VDC is a fixed input voltage, but for a wireless boost charging circuit, VDC varies with the duty cycle D (D=(ΔT _SW -ΔT _CHG )/ΔT _SW ) and charging time change. This is because as the load of the wireless charging rectifier, the impedance of the subsequent step-up DC-DC rectifier will also change with the duty cycle and charging time. Excluding the start-up phase, it is obvious that the smaller the duty cycle, the longer the charging time and the larger the VDC. Therefore, the traditional charging control method based on DC-DC is not suitable for the step-up wireless charging circuit.

Utility model content

In order to solve the above-mentioned shortcomings and deficiencies of the prior art, the utility model provides a step-up wireless charging receiving circuit, which does not use the traditional feedback method, but uses the output current of the energy storage inductor to vary with the duty cycle and charging time. Changing characteristics, when the voltage of the rechargeable battery does not reach the required voltage, it is charged by a constant charging current, and when the voltage of the rechargeable battery reaches the required voltage, it is charged by a constant voltage, which improves the charging control and the stability of the charging process , to achieve step-up wireless charging.

A step-up wireless charging receiving circuit, including a resonant circuit, a rectifier, a first filter capacitor, an energy storage inductor, an N-type MOS tube, a P-type MOS tube, a second filter capacitor, an adder, a first comparator, a second a comparator, a third comparator, a first sampling capacitor, a first sampling switch, a second sampling switch, a second sampling capacitor, a third sampling capacitor, a third sampling switch and a control switch;

The resonant circuit receives the energy emitted by the external transmitting circuit through magnetic field coupling, and its output end is electrically connected to the input end of the rectifier;

The output terminal of the rectifier is grounded through the first filter capacitor, and the output signal of the output terminal of the rectifier is rectified and filtered by the first filter capacitor and then output to the energy storage inductor;

One end of the energy storage inductor is electrically connected to the output end of the rectifier, and the other end is electrically connected to the drain of the N-type MOS transistor and the drain of the P-type MOS transistor;

The source of the N-type MOS transistor is grounded, and the gate is electrically connected to the gate of the P-type MOS transistor and connected to a square wave control signal;

The source of the P-type MOS transistor is grounded through the second filter capacitor;

The two ends of the second filter capacitor form a charging output terminal for connecting to a rechargeable battery;

The two input terminals of the adder respectively detect the drain current flowing through the N-type MOS tube and the drain current of the P-type MOS tube to obtain the two mirror currents reduced in proportion, and the adder adds the two mirror currents Processing, generating the added current, and outputting through its output terminal; the output terminal of the adder is grounded through the first sampling capacitor;

The first sampling switch is connected in parallel with the first sampling capacitor, and the first sampling switch is controlled on and off by a first pulse signal, so as to short-circuit the first sampling capacitor or access the first sampling capacitor;

The two ends of the second sampling switch are respectively electrically connected to the output terminal of the adder and the inverting input terminal of the third comparator, and the second sampling switch is controlled to be turned on and off by a second pulse signal; The second pulse signal is input later than the first pulse signal;

One end of the second sampling capacitor is electrically connected to the inverting input end of the third comparator, and the other end is grounded;

The non-inverting input terminal of the third comparator is connected to a fixed current source, and the output terminal outputs a third pulse signal, and the third pulse signal controls the on-off of the third sampling switch;

One end of the third sampling switch is connected to the fixed current source, and the other end is grounded;

The third sampling capacitor is connected in parallel with the third sampling switch, and one end of the third sampling switch connected to the fixed current source is electrically connected to the non-inverting input end of the first comparator;

The non-inverting input terminal of the second comparator is electrically connected to the source of the P-type MOS transistor, the inverting input terminal is connected to a reference voltage, and the output terminal outputs a switch control signal;

The inverting input terminal of the first comparator is grounded through a capacitor; the first comparator obtains the required square wave control signal by comparing the input voltage of its inverting input terminal and the non-inverting input terminal, and passes it The output terminal outputs the square wave control signal to control the on-off of the N-type MOS transistor and the P-type MOS transistor, so as to obtain the required constant charging current in the constant current mode;

The control switch is connected in parallel with the capacitor, and its on-off is controlled by the switch control signal, and one end of the control switch connected to the inverting input end of the first comparator through the capacitor is connected to a fixed voltage. level; when the switch control signal controls the control switch to close, the inverting input terminal of the first comparator is grounded, and the circuit is in constant voltage mode; when the switch control signal controls the control switch to open, the first comparator The inverting input terminal of the circuit is connected to the fixed level, and the circuit is in the constant current mode.

Compared with the prior art, the boost-type wireless charging receiving circuit of the utility model utilizes the characteristic that the output current of the energy storage inductor does not change with the duty cycle and charging time, and when the voltage of the rechargeable battery does not reach the required voltage, the constant The charging current is used for charging, and when the voltage of the rechargeable battery reaches the required voltage, it is charged with a constant voltage to improve the charging control and the stability of the charging process, and realize the step-up wireless charging.

Further, in the constant current mode, the adder obtains the mirror current after the drain currents of the N-type MOS transistor and the P-type MOS transistor are proportionally reduced, and adds the two mirror currents to generate an added current I _SENS , The current I _SENS charges the first sampling capacitor C0 through the first pulse signal whose period is T _SENS to generate a sawtooth wave V _SENS with an amplitude of I _SENS ·T _SENS /C0, wherein T _SENS =C0/I0 , I0 is the fixed current source, I0=Iout0/1000, and Iout0 is the required constant charging current; the second pulse signal controls the on-off of the second sampling switch to sample the voltage at the highest point of the sawtooth wave V _SENS amplitude VE, and stored on the second sampling capacitor C2, VE=I _SENS T _SENS /C0=(I _L /1000) (C0/I0)/C0=I _L /Iout0=1/(1- D0), wherein I _L is the outflow current of the energy storage inductor; at the same time, the third sampling capacitor C3 is charged through the fixed current source I0 to generate another sawtooth wave V _RAMP , wherein, C3=C0/n, n is an integer; when the sawtooth wave V _RAMP reaches VE, the third pulse signal is generated by comparison with the third comparator, the third sampling switch is briefly turned on, and V _RAMP is reset, and the cycle T _RAMP of V _RAMP =VE· C3/I0=ISENS·T _SENS /C0·C3/I0=IL/Iout0/n·T _SENS =1/(1-D0)/n·T _SENS ; compare the sawtooth wave V by the first comparator _RAMP and the fixed level V0, V0=1V, generate the square wave control signal S with a duty ratio of D0, to achieve the required constant charging current Iout0;

The rechargeable battery is charged by a constant charging current Iout0, and the voltage of the rechargeable battery rises linearly with time; when the voltage of the rechargeable battery exceeds the reference voltage, the current rechargeable battery voltage and the reference voltage are compared by the second comparator to generate the switch The control signal is at a high level, and the control switch is controlled to close, and the potential of the inverting input terminal of the first comparator drops from V0 to a low potential, so that the duty cycle of the square wave control signal gradually increases to 100%. The above-mentioned constant charging current is 0, realizing the conversion from constant current mode to constant voltage mode.

Further, the value of the integer n is greater than 1. Through the definition here, the third sampling capacitor can be reduced to reduce ripple.

Further, the value of the integer n is equal to 4. Through the limitation here, the third sampling capacitor can be further reduced to reduce ripple.

Further, the resonant circuit is an LC series resonant circuit.

For better understanding and implementation, the utility model will be described in detail below in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a circuit structure diagram of an existing step-up DC-DC charger;

Fig. 2 is a timing diagram of charger control in Fig. 1;

Fig. 3 is a schematic diagram of the problems existing in the feedback control mode with constant frequency when charging in the existing step-up DC-DC charger;

4 is a circuit structure diagram of a step-up wireless charging circuit based on the DC-DC charging circuit of FIG. 1;

FIG. 5 is a simulation diagram of the output voltage VDC of the rectifier of the step-up wireless charging circuit in FIG. 4 changing with the duty cycle D and charging time;

Fig. 6 is the waveform diagram of one of the methods of the square wave control signal that the utility model produces the duty cycle as D0;

Fig. 7 is the oscillogram of another method of the square wave control signal that the utility model produces the duty ratio as D0;

Fig. 8 is a circuit schematic diagram of the boost type wireless charging receiving circuit of the present invention;

FIG. 9 is a working waveform diagram of the step-up wireless charging receiving circuit of the present invention.

Detailed ways

In order to solve the defects of the prior art, it is found through research that, for the step-up wireless charger, the output current _IL of the energy storage inductor is a quantity that does not vary with the duty cycle and charging time, because That is, I _L is only related to the signal amplitude V _PA of the transmitter and the L, C and coupling coefficient k of the resonant circuit. Therefore, using this characteristic, for the required constant charging current Iout0, it is only necessary to find the corresponding duty ratio D0. Therefore, the required constant charging current Iout0 can be obtained by generating a square wave control signal S with a duty ratio of D0 without using the traditional feedback method.

Among them, in order to obtain the square wave control signal with a duty ratio of D0, two methods can be used to obtain it:

The first acquisition method: Please refer to Figure 6. First, generate a sawtooth wave with an amplitude of 1, compare the sawtooth wave with an amplitude of 1 with a signal with an amplitude of 1-D0, and generate a cycle with a period of T and a duty cycle It is the square wave signal of D0.

The second acquisition method: Please refer to Figure 7. First, generate a signal with an amplitude of 1, and use the signal with an amplitude of 1 to compare with a signal with an amplitude of 1/(1-D0) to generate a period T, occupying A square wave signal with a duty cycle of D0.

It can be seen that, in the above two methods, the amplitude of the sawtooth wave is a fixed value of 1 in the first method, and 1/(1-D0) in the second method, which are all proportional to _IL ; and the comparison level The magnitude of is 1-D0 in the first method, and is a fixed value 1 in the second method, which is proportional to Iout. Obviously, for the charger, it is hoped that Iout is a fixed value, and _IL is a variable related to V _PA and k, and the relationship between the two is adjusted through D0. Therefore, in order to achieve a more stable charging control and a better charging effect, the utility model adopts a second acquisition method of a square wave control signal with a duty cycle of D0, as follows.

Please refer to Figure 8, the utility model provides a step-up wireless charging receiving circuit, including a resonant circuit, a rectifier REC, a first filter capacitor C _DC , an energy storage inductor L1, an N-type MOS tube MN, and a P-type MOS tube MP , second filter capacitor C1, adder, first comparator CMP1, second comparator CMP2, third comparator CMP3, first sampling capacitor C0, first sampling switch S1, second sampling switch S2, second sampling capacitor C2, the third sampling capacitor C3, the third sampling switch S3 and the control switch S4.

The resonant circuit receives the energy emitted by the external transmitting circuit through magnetic field coupling, and its output end is electrically connected to the input end of the rectifier REC. In this embodiment, the resonant circuit is an LC series resonant circuit, which is composed of a resonant inductor L and a resonant capacitor C. One end of the resonant inductor L and the resonant capacitor C are connected in series, and the other end together constitutes an output end of the resonant circuit, which outputs energy to the rectifier REC.

The output terminal of the rectifier REC is grounded through the first filter capacitor C _DC , and the output signal of the output terminal of the rectifier REC is rectified and filtered by the first filter capacitor C _DC and output to the energy storage inductor L1. The rectifier REC is a full-wave rectifier or a half-wave rectifier and a voltage doubler rectifier.

One end of the stored energy inductor L1 is electrically connected to the output end of the rectifier REC, and the other end is electrically connected to the drain of the N-type MOS transistor MN and the drain of the P-type MOS transistor MP.

The source of the N-type MOS transistor MN is grounded, and the gate is electrically connected to the gate of the P-type MOS transistor MP and connected to a square wave control signal S.

The source of the P-type MOS transistor MP is grounded through the second filter capacitor C1.

Both ends of the second filtering capacitor C1 form a charging output terminal for connecting to a rechargeable battery. The equivalent capacitance of the rechargeable battery in the circuit is CB, and its terminal voltage is Vout.

The two input terminals of the adder detect the drain current flowing through the N-type MOS transistor MN and the drain current of the P-type MOS transistor MP respectively, and obtain two mirror currents after proportional reduction, and the two mirror images obtained by the adder are The currents are summed to generate the summed current, which is output through its output terminal; the output terminal of the adder is grounded through the first sampling capacitor C0. In this embodiment, the two input ends of the adder respectively obtain mirror currents with drain currents reduced by 1000 times through transistors, that is, the obtained two mirror currents are respectively 1/1000 of their corresponding drain currents.

The first sampling switch S1 is connected in parallel with the first sampling capacitor C0, and the first sampling switch S1 is controlled on and off by a first pulse signal φ1, so as to short-circuit the first sampling capacitor C0 or connect to the first sampling capacitor C0 .

The two ends of the second sampling switch S2 are respectively electrically connected to the output terminal of the adder and the inverting input terminal of the third comparator CMP3, and the second sampling switch S2 is controlled by a second pulse signal φ2. off; the second pulse signal φ2 is delayed in input from the first pulse signal φ1. In this embodiment, the second pulse signal φ2 is delayed by an extremely short period from the first pulse signal φ1.

One end of the second sampling capacitor C2 is electrically connected to the inverting input end of the third comparator CMP3, and the other end is grounded.

The non-inverting input terminal of the third comparator CMP3 is connected to a fixed current source I0, and the output terminal outputs a third pulse signal φ3, and the third pulse signal φ3 controls the on-off of the third sampling switch S3.

One end of the third sampling switch S3 is connected to the fixed current source I0, and the other end is grounded.

The third sampling capacitor C3 is connected in parallel with the third sampling switch S3, and is electrically connected with the end of the third sampling switch S3 connected to the fixed current source I0 and the non-inverting input end of the first comparator CMP1.

The noninverting input terminal of the second comparator CMP2 is electrically connected to the source of the P-type MOS transistor MP, the inverting input terminal is connected to a reference voltage VREF, and the output terminal outputs a switch control signal VM.

The inverting input terminal of the first comparator CMP1 is grounded through a capacitor C4; the first comparator CMP1 obtains the required square wave control signal S by comparing the input voltages of its inverting input terminal and non-inverting input terminal. , and output the square wave control signal S through its output terminal to control the on-off of the N-type MOS transistor MN and the P-type MOS transistor MP, so as to obtain the required constant charging current Iout0 in the constant current mode.

The control switch S4 is connected in parallel with the capacitor, and its on-off is controlled by the switch control signal VM. And one end of the control switch S4 connected to the inverting input terminal of the first comparator CMP1 through the capacitor C4 is connected to a fixed level V0; when the switch control signal VM controls the control switch S4 to be closed, The inverting input terminal of the first comparator CMP1 is grounded, and the circuit is in the constant voltage mode; when the switch control signal VM controls the control switch S4 to be turned off, the inverting input terminal of the first comparator CMP1 is connected to the fixed level V0, the circuit is in constant current mode.

Please refer to FIG. 9 at the same time. In the constant current mode, in order to generate a sawtooth wave with an amplitude of 1/(1-D0), the adder obtains the drain currents of the N-type MOS transistor MN and the P-type MOS transistor MP after proportional reduction. mirror current, each obtained mirror current is 1/1000 of its corresponding drain current, and the two mirror currents are summed to generate an added current I _SENS , I _SENS = I _L /1000, and the current I _SENS passes through The first pulse signal φ1 whose period is T _SENS charges the first sampling capacitor C0 to generate a sawtooth wave V _SENS with an amplitude of I _SENS · T _SENS /C0, wherein T _SENS =C0/I0, I0 is The fixed current source, I0=Iout0/1000, Iout0 is the required constant charging current; the second pulse signal φ2 controls the on-off of the second sampling switch S2 to sample the voltage amplitude of the highest point of the sawtooth wave V _SENS VE, and stored on the second sampling capacitor C2, VE=I _SENS T _SENS /C0=(I _L /1000) (C0/I0)/C0=I _L /Iout0=1/(1-D0 ), wherein I _L is the outflow current of the energy storage inductor L1; at the same time, the third sampling capacitor C3 is charged through the fixed current source I0 to generate another sawtooth wave V _RAMP , wherein, C3=C0/n, n is an integer; when the sawtooth wave V _RAMP reaches VE, it is compared by the third comparator CMP3 to generate the third pulse signal φ3, briefly turn on the third sampling switch S3, reset V _RAMP , and the cycle T _RAMP of V _RAMP =VE·C3/I0=ISENS·T _SENS /C0·C3/I0=IL/Iout0/n·T _SENS =1/(1-D0)/n·T _SENS ; the first comparator CMP1 compares the The sawtooth wave V _RAMP and the fixed level V0, V0=1V, generate the square wave control signal S with a duty ratio of D0, and use the square wave control signal S to control the N-type MOS tube and the P-type MOS tube, the required constant charging current Iout0 can be obtained. At this time, the output current Iout of the source of the P-type MOS transistor=Iout0.

The rechargeable battery is charged by a constant charging current Iout0, and the rechargeable battery voltage Vout rises linearly with time; when the rechargeable battery voltage Vout exceeds the reference voltage VREF, the current rechargeable battery voltage Vout and the reference voltage VREF are compared by the second comparator CMP2 , the generated switch control signal VM is at a high level, and the control switch S4 is controlled to be closed, and the potential of the inverting input terminal of the first comparator CMP1 drops from V0 to a low potential to realize the occupation of the square wave control signal S The duty ratio gradually increases to 100%, and the constant charging current Iout0 is 0, realizing the conversion from the constant current mode to the constant voltage mode.

In order to reduce the ripple, the third sampling capacitor C3 is reduced. Preferably, the value of the integer n is greater than 1. However, in this embodiment, the value of the integer n is equal to 4.

Compared with the prior art, the boost-type wireless charging receiving circuit of the utility model does not adopt the traditional feedback method, but utilizes the characteristic that the output current of the energy storage inductor does not vary with the duty cycle and charging time, and when the voltage of the rechargeable battery does not reach In the case of the required voltage, it is charged by a constant charging current, and when the voltage of the rechargeable battery reaches the required voltage, it is charged by a constant voltage to improve the charging control and the stability of the charging process, and realize the step-up wireless charging.

The above-mentioned embodiments only express several implementation modes of the utility model, and the description thereof is relatively specific and detailed, but it should not be understood as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention.

Claims (5)

1. A step-up wireless charging receiving circuit, characterized in that it includes a resonant circuit, a rectifier, a first filter capacitor, an energy storage inductor, an N-type MOS tube, a P-type MOS tube, a second filter capacitor, an adder, and a second filter capacitor. A comparator, a second comparator, a third comparator, a first sampling capacitor, a first sampling switch, a second sampling switch, a second sampling capacitor, a third sampling capacitor, a third sampling switch and a control switch; The resonant circuit receives the energy emitted by the external transmitting circuit through magnetic field coupling, and its output end is electrically connected to the input end of the rectifier; The output terminal of the rectifier is grounded through the first filter capacitor, and the output signal of the output terminal of the rectifier is rectified and filtered by the first filter capacitor and then output to the energy storage inductor; One end of the energy storage inductor is electrically connected to the output end of the rectifier, and the other end is electrically connected to the drain of the N-type MOS transistor and the drain of the P-type MOS transistor; The source of the N-type MOS transistor is grounded, and the gate is electrically connected to the gate of the P-type MOS transistor and connected to a square wave control signal; The source of the P-type MOS transistor is grounded through the second filter capacitor; The two ends of the second filter capacitor form a charging output terminal for connecting to a rechargeable battery; The two input terminals of the adder obtain the two mirror currents reduced in proportion by respectively detecting the drain current flowing through the N-type MOS tube and the drain current of the P-type MOS tube, and the adder performs a phase comparison of the two mirror currents. Adding processing, generating the added current, and outputting through its output terminal; the output terminal of the adder is grounded through the first sampling capacitor; The first sampling switch is connected in parallel with the first sampling capacitor, and the first sampling switch is controlled on and off by a first pulse signal, so as to short-circuit the first sampling capacitor or access the first sampling capacitor; The two ends of the second sampling switch are respectively electrically connected to the output terminal of the adder and the inverting input terminal of the third comparator, and the second sampling switch is controlled to be turned on and off by a second pulse signal; The second pulse signal is input later than the first pulse signal; One end of the second sampling capacitor is electrically connected to the inverting input end of the third comparator, and the other end is grounded; The non-inverting input terminal of the third comparator is connected to a fixed current source, and the output terminal outputs a third pulse signal, and the third pulse signal controls the on-off of the third sampling switch; One end of the third sampling switch is connected to the fixed current source, and the other end is grounded; The third sampling capacitor is connected in parallel with the third sampling switch, and one end of the third sampling switch connected to the fixed current source is electrically connected to the non-inverting input end of the first comparator; The non-inverting input terminal of the second comparator is electrically connected to the source of the P-type MOS transistor, the inverting input terminal is connected to a reference voltage, and the output terminal outputs a switch control signal; The inverting input terminal of the first comparator is grounded through a capacitor; the first comparator obtains the required square wave control signal by comparing the input voltage of its inverting input terminal and the non-inverting input terminal, and passes it The output terminal outputs the square wave control signal to control the on-off of the N-type MOS transistor and the P-type MOS transistor, so as to obtain the required constant charging current in the constant current mode; The control switch is connected in parallel with the capacitor, and its on-off is controlled by the switch control signal, and one end of the control switch connected to the inverting input end of the first comparator through the capacitor is connected to a fixed voltage. level; when the switch control signal controls the control switch to close, the inverting input terminal of the first comparator is grounded, and the circuit is in constant voltage mode; when the switch control signal controls the control switch to open, the first comparator The inverting input terminal of the circuit is connected to the fixed level, and the circuit is in the constant current mode. 2. The step-up wireless charging receiving circuit according to claim 1, characterized in that: In the constant current mode, the adder obtains the mirror current after the drain currents of the N-type MOS transistor and the P-type MOS transistor are proportionally reduced, and adds the two mirror currents to generate the summed current I _SENS , the current I _SENS charges the first sampling capacitor C0 through the first pulse signal whose period is T _SENS , and generates a sawtooth wave V _SENS with an amplitude of I _SENS T _SENS /C0, wherein T _SENS =C0/I0, I0 For the fixed current source, I0=Iout0/1000, and Iout0 is the required constant charging current; the second pulse signal controls the on-off of the second sampling switch to sample the voltage amplitude VE at the highest point of the sawtooth wave V _SENS , and stored on the second sampling capacitor C2, VE=I _SENS T _SENS /C0=(I _L /1000) (C0/I0)/C0=I _L /Iout0=1/(1-D0) , where I _L is the output current of the energy storage inductor; at the same time, the third sampling capacitor C3 is charged through the fixed current source I0 to generate another sawtooth wave V _RAMP , where C3=C0/n, n is an integer ; When the sawtooth wave V _RAMP reaches VE, the third comparator is compared to generate the third pulse signal, the third sampling switch is turned on briefly, and V _RAMP is reset, and the period _{TRAMP of V RAMP =} VE·C3/ I0=ISENS·T _SENS /C0·C3/I0=IL/Iout0/n·T _SENS =1/(1-D0)/n·T _SENS ; compare the sawtooth wave V _RAMP and The fixed level V0, V0=1V, generates the square wave control signal S with a duty cycle of D0, so as to obtain the required constant charging current Iout0; The rechargeable battery is charged by a constant charging current Iout0, and the voltage of the rechargeable battery rises linearly with time; when the voltage of the rechargeable battery exceeds the reference voltage, the current rechargeable battery voltage and the reference voltage are compared by the second comparator to generate the switch The control signal is at a high level, and the control switch is controlled to close, and the potential of the inverting input terminal of the first comparator drops from V0 to a low potential, so that the duty cycle of the square wave control signal gradually increases to 100%. The above-mentioned constant charging current is 0, realizing the conversion from constant current mode to constant voltage mode. 3. The step-up wireless charging receiving circuit according to claim 2, wherein the value of the integer n is greater than 1. 4. The step-up wireless charging receiving circuit according to claim 3, wherein the value of the integer n is equal to 4. 5. The step-up wireless charging receiving circuit according to claim 1, wherein the resonant circuit is an LC series resonant circuit.