CN207475579U - It is a kind of while support 4G modules and the interface switching control circuit of USBOTG - Google Patents
It is a kind of while support 4G modules and the interface switching control circuit of USBOTG Download PDFInfo
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- CN207475579U CN207475579U CN201721535333.XU CN201721535333U CN207475579U CN 207475579 U CN207475579 U CN 207475579U CN 201721535333 U CN201721535333 U CN 201721535333U CN 207475579 U CN207475579 U CN 207475579U
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Abstract
The utility model provides a kind of while supports 4G modules and the interface switching control circuit of USBOTG, and including switching part and power pack, switching part and power pack are connected with CPU;Circuit realizes the practical application of 3 kinds of USB states using a power supply chip and two USB switching chips, by single USB2.0 Interface Expandings go out two can free switching 4G modules and USBOTG interfaces circuit.Circuit structure of the utility model is simple, and without HUB chips, cost is small;Only need to control it is I/O mouthfuls several, implement conveniently;It is few using cpu i/f resource, but can support multiple USB port peripheral hardwares, considerably increase the number of ports of conventional security CPU.
Description
Technical field
The utility model is related to a kind of while support 4G modules and the interface switching control circuit of USBOTG, belong to circuit engineering neck
Domain.
Background technology
In traditional POS financial fields, used safe host CPU interface is often relatively simple limited, since CPU has peace
Full nucleus module, after a CPU maturations are applied to market, the speed to update is much slower than general-purpose built-in type system.
But market is really higher and higher for the functional requirement of traditional POS machine device, particularly in communication module speed and letter
In terms of number.Traditional POS financial terminals are faced also to be come into being by the requirement of 2G module upgrades to 4G modules.Interface is also by serial ports liter
Grade is high speed USB 2.0.However, although the serial port resource of conventional security CPU is relatively abundanter, its 2.0 interface of high speed USB is but
It is very limited.In actual use, often there are hi-speed USB interface it is not enough the problem of.
Utility model content
The technical problem to be solved by the present invention is to provide a kind of realized using single USB2.0 interfaces to support 4G simultaneously
The interface switching control circuit of module and USBOTG.
In order to solve the above-mentioned technical problem, the technical solution of the utility model be to provide it is a kind of and meanwhile support 4G modules with
The interface switching control circuit of USBOTG, it is characterised in that:Including switching part and power pack, switching part and power pack with
CPU is connected;
The switching part includes resistance R321, and one end of resistance R321 connects the handover network USB_ controlled by CPU
SWITCH, the base stage of other end connecting triode Q303, the emitter ground connection of triode Q303, the collector of triode Q303 connect
10 feet of pull-up resistor R316 one end, 10 feet of USB switching chips U300 and switching chip U302 are connected, pull-up resistor R316's is another
9 feet of one end connection power vd D3V3 and USB switching chip U300;Coupled capacitor C304 one end is connected with power vd D3V3, coupling
Close capacitance C304 other ends ground connection;
7 feet of USB switchings chip U300 are connected with the HSD2_DP networks of 4G modules, 6 feet of USB switching chips U300 and
The HSD2_DM of 4G modules is connected, and 4 feet of USB switching chips U300 are connected with outside HSD1_DM networks, USB switching chips U300
5 feet be connected with outside HSD1_DP networks, 3 feet of USB switchings chip U300 and be connected;One end of resistance R319 and USB are cut
2 feet for changing chip U300 are connected, and the resistance R319 other ends are connected with the USB_OTG_DM of CPU;One end of resistance R320 and USB are cut
1 foot for changing chip U300 is connected, and the resistance R320 other ends are connected with the USB_OTG_DP networks of CPU;
9 feet of coupled capacitor C306 one end connection power vd D3V3 and USB switching chip U302, coupled capacitor C306 are another
End ground connection;Resistance R307 one end is connected with the USB_OTG_UID networks of CPU, the resistance R307 other ends and USB switching chips U302
1 foot be connected;One end of resistance R328 is connected with the network USB_OTGID_CHK of CPU, the resistance R328 other ends while and resistance
One end of R326, one end of resistance R327 are connected, and the other end of resistance R326 is simultaneously and 5 feet, the external network USB_ of U302
OTG_UID1 is connected, and the other end of resistance R327 is connected with power vd D3V3;One end of resistance R322 and USB switching chips U302
7 feet be connected, the 3rd foot of the resistance R322 other ends and USB switchings chip U302 are grounded simultaneously;
The power pack includes resistance R310, and one end of resistance R310 is connected with CPU networks VBUS_EN, resistance R310
The other end is connected with 1 foot of power supply chip U301, and VBUS_EN networks are connected simultaneously with one end of resistance R312, and R312's is another
One end of end connection resistance R313, the base stage of triode Q302, the other end of resistance R313, the emitter of triode Q302 connect
Ground;One end of triode Q302 collectors connection resistance R309, one end of resistance R308, the other end and metal-oxide-semiconductor of resistance R309
The grid of Q301 is connected:5 feet of power supply chip U301 are connected with external power supply network USB_5V_VBUS;One end of capacitance C303
It is connected with 4 feet of power supply chip U301, capacitance C303 other ends ground connection, the other end of resistance R308 and the 4 of power supply chip U301
Foot is connected;The 2 foot source electrodes of metal-oxide-semiconductor Q301 are connected with 4 feet of power supply chip U301,4 feet of power supply chip U301 and power vd D5V
It is connected, the drain electrode of one end and metal-oxide-semiconductor Q301 of diode D300 is connected, the diode D300 other ends and external power supply network USB_
5V_VBUS is connected;
Described USB switchings chip U300, U302 are the SGM7227 types of SGMICRO companies production;
The power supply chip U301 is the RT9102GB types of RichTek companies production.
When preferably, using 4G modules, 3.3V, triode are set as by the CPU handover network USB_SWITCH controlled
Q303 is conducting state, and the 3rd foot of triode Q303 is low level, the whole accesses of USB are USB_OTG_DM-- > HSD2_DM,
USB_OTG_DP-- > HSD2_DP;USB switches 1 foot of chip U300 and 7 feet are connected, 2 feet and 6 feet are connected, USB switching chips
7 feet of U302 and the connection of 1 foot, i.e. USB_OTG_UID networks are low level;
The first foot of power supply chip U301 is set as low level, and the enabled foot of power supply chip U301 is closed, power supply chip
5 foot of power supply output pin of U301 is 0V, CPU with 4G modules connect.
When preferably, without using 4G modules, 0V, triode are set as by the CPU handover network USB_SWITCH controlled
Q303 is cut-off state, and 3 feet of triode Q303 are high level, the whole accesses of USB are USB_OTG_DM-- > HSD1_DM,
USB_OTG_DP-- > HSD1_DP;USB switches 1 foot of chip U300 and 5 feet are connected, 2 feet and 4 feet are connected, USB switching chips
5 feet and 1 foot of U302 are connected, i.e. external network USB_OTG_UID1 is connected with the USB_OTG_UID networks of CPU.
It is highly preferred that in USB access USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_DP, work as gold
When melting terminal as main equipment:External network USB_OTG_UID1 is set as 0, CPU networks VBUS_EN and is set as high level, power supply
5 foot of power supply output pin of chip U301 is 5V.
It is highly preferred that in USB access USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_DP, work as gold
When melting terminal as slave device:External network USB_OTG_UID1 is set as 1, CPU networks VBUS_EN and is set as low level, power supply
5 foot of power supply output pin of chip U301 is 0V.
The utility model provide it is a kind of by single USB2.0 Interface Expandings go out two can free switching 4G modules and
The circuit of USBOTG interfaces compared with prior art, has the advantages that:
1) circuit structure realized is simple, and without HUB chips, cost is small;
2) only need to control it is I/O mouthfuls several, software implement conveniently;
3) it is few using cpu i/f resource, but can support multiple USB port peripheral hardwares.
Description of the drawings
Fig. 1 shows for interface switching control circuit switching part structure provided in this embodiment while supporting 4G modules and USBOTG
It is intended to;
Fig. 2 shows for interface switching control circuit power pack structure provided in this embodiment while supporting 4G modules and USBOTG
It is intended to.
Specific embodiment
It is provided in this embodiment while 4G modules and the interface switching control circuit of USBOTG is supported to include switching part and power supply
Part, respectively as depicted in figs. 1 and 2.4G modules and the interface switching control circuit structure of USBOTG is supported to use 2 while described
USB switches chip U300, U302 and a power supply chip U301.
USB switching chips SGM7227 uses the SGM7227 types of SGMICRO SG Micro Corp Co., Ltd production.
Power supply chip U301 uses the RT9102GB types of RichTek Liqi Science and Technology Co., Ltd. production.
Wherein, switching part includes resistance R321, and one end of resistance R321 connects the handover network USB_ controlled by CPU
SWITCH, the base stage of other end connecting triode Q303, the emitter ground connection of triode Q303, the collector of triode Q303 connect
10 feet of pull-up resistor R316 one end, 10 feet of switching chip U300 and switching chip U302 are connected, pull-up resistor R316's is another
End connection power vd D3V3 and 9 feet for switching chip U300.Coupled capacitor C304 one end is connected with power vd D3V3, coupled capacitor
Another termination GND of C304.
7 feet of switching chip U300 are connected with the HSD2_DP networks of 4G modules, 6 feet and 4G modules of switching chip U300
HSD2_DM be connected.4 feet of switching chip U300 are connected with outside HSD1_DM networks, 5 feet of switching chip U300 and outside
HSD1_DP networks are connected, and 3 feet of switching chip U300 are connected with ground.One end of resistance R319 and the 2 foot phases of switching chip U300
Even, the resistance R319 other ends are connected with the USB_OTG_DM of CPU.One end of resistance R320 is connected with 1 foot of switching chip U300,
The resistance R320 other ends are connected with the USB_OTG_DP networks of CPU.
Coupled capacitor C306 one end connects power vd D3V3 and switches 9 feet of chip U302, the coupled capacitor C306 other ends
Ground connection.Resistance R307 one end is connected with the USB_OTG_UID networks of CPU, 1 foot of the resistance R307 other ends and switching chip U302
It is connected.One end of resistance R328 is connected with the network USB_OTGID_CHK of CPU, the resistance R328 other ends while and resistance R326
One end, resistance R327 one end be connected.The other end of resistance R326 is simultaneously and 5 feet, the external network USB_OTG_ of U302
UID1 is connected.The other end of resistance R327 is connected with power vd D3V3.One end of resistance R322 and the 7 foot phases of switching chip U302
Even, the 3rd foot of the resistance R322 other ends and switching chip U302 are grounded simultaneously.
Power pack includes resistance R310, and one end of resistance R310 is connected with CPU networks VBUS_EN, and resistance R310 is another
End is connected with 1 foot of power supply chip U301, and VBUS_EN networks are connected simultaneously with one end of resistance R312, and the other end of R312 connects
One end of connecting resistance R313, the base stage of triode Q302, the other end of resistance R313, the emitter of triode Q302 are grounded.
One end of triode Q302 collectors connection resistance R309, one end of resistance R308, the other end of resistance R309 and metal-oxide-semiconductor Q301
1 foot grid be connected.5 feet of power supply chip U301 are connected with external power supply network USB_5V_VBUS.One end of capacitance C303 and
4 feet of power supply chip U301 are connected, capacitance C303 other ends ground connection.The other end of resistance R308 and 4 feet of power supply chip U301
It is connected.The 2 foot source electrodes of metal-oxide-semiconductor Q301 are connected with 4 feet of power supply chip U301.4 feet of power supply chip U301 and power vd D5V phases
Even.One end of diode D300 is connected with the 3 feet drain electrode of metal-oxide-semiconductor Q301, the diode D300 other ends and external power supply network
USB_5V_VBUS is connected.
In the present embodiment, the production man of metal-oxide-semiconductor is WILLSEMI (Wei Er), model WPM2026.
It is provided in this embodiment while support that the application method of 4G modules and the interface switching control circuit of USBOTG is as follows:
First, when using 4G modules:CPU draws USB_SWITCH and is connected for 3.3V, Q303, and the 3rd foot of Q303 drags down i.e.
It is low level that the 10th foot of U300, which is drawn, and the whole accesses of USB are USB_OTG_DM-- > HSD2_DM, USB_OTG_DP-- >
1 foot and 7 feet of HSD2_DP, i.e. U300 are connected, and 2 feet and 6 feet are connected.Simultaneously because the 3rd foot of Q303, which drags down, also makes the of U302
10 feet drag down, and the 7th foot of U302 and the connection of the 1st foot, i.e. USB_OTG_UID networks drag down at this time, and the low level of this network is led to
Know CPU, do not need to 5V power supplies at this time.CPU receives VBUS_EN (the of U301 that Fig. 2 power packs are dragged down after low level signal
One foot), the enabled foot of power supply chip U301 is closed, the power supply output pin USB_5V_VBUS (the 5th foot of U301) for making U301 is
0V.Whole flow process completes the handshaking procedures of CPU and 4G modules at this time.
2nd, when without using 4G modules:USB_SWITCH is set to 0V, Q303 cut-offs by CPU, and 3 feet of Q303 are drawn high i.e.
It is high level that the 10th foot of U300, which is drawn, and the whole accesses of USB are USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_
1 foot and 5 feet of DP, i.e. U300 are connected, and 2 feet and 4 feet are connected.5 feet of corresponding U302 and 1 foot are connected simultaneously, i.e. USB_OTG_
UID1 with USB_OTG_UID networks are connected.In this access, circuit realizes two kinds of shapes to read USB_OTGID_CHK
State:
When have peripheral hardware connection i.e. financial terminal for main equipment when:USB_OTG_UID1 is 0, that is, passes through R326 and R328USB_
OTGID_CHK states are also 0, and such CPU knows there is slave device connection by reading the level of this network, passes through Fig. 2 in this way
In draw high VBUS_EN, open USB_5V_VBUS (the 5th foot of U301) and power for 5V to slave device.
When financial terminal is as slave device, it is 1, i.e. USB_OTGID_CHK shapes that CPU, which reads USB_OTGID_CHK states,
State is also 1, and such CPU knows that financial terminal is used as slave device at this time by reading the level of this network, in this way by Fig. 2
VBUS_EN is dragged down, USB_5V_VBUS (the 5th foot of U301) is closed and stops power supply outward for 0V.
A whole set of circuit utilizes 3 I/O mouthfuls:USB_SWITCH, USB_OTG_UID, USB_OTGID_CHK, a power supply core
Special switching chip U300, the U302 of piece U301,2 USB realizes the practical application of 3 kinds of USB states.
Interface switching control circuit structure provided in this embodiment uses single USB interface in the safe CPU of traditional financial, while real
4G modules and USBOTG functions are showed, without using HUB chips.Only use 2 USB switching chips, a power supply chip can be real
It is existing, have the advantages that cost is small, circuit structure is simple, considerably increase the number of ports of conventional security CPU.
The preferred embodiment of the above, only the utility model, it is in any form and substantive not to the utility model
On limitation, it is noted that for those skilled in the art, in the premise for not departing from the utility model method
Under, several improvement and supplement can be also made, these are improved and supplement also should be regarded as the scope of protection of the utility model.It is all ripe
Professional and technical personnel is known, in the case where not departing from the spirit and scope of the utility model, when using disclosed above
Technology contents and the equivalent variations of a little variation, modification and evolution made, be the utility model equivalent embodiment;Together
When, variation, modification and evolution of any equivalent variations that all substantial technologicals according to the utility model make above-described embodiment,
In the range of still falling within the technical solution of the utility model.
Claims (5)
- It is 1. a kind of while support 4G modules and the interface switching control circuit of USBOTG, it is characterised in that:Including switching part and power supply Part, switching part and power pack are connected with CPU;The switching part includes resistance R321, and one end of resistance R321 connects the handover network USB_SWITCH controlled by CPU, The base stage of other end connecting triode Q303, the emitter ground connection of triode Q303, the collector connection pull-up of triode Q303 10 feet of resistance R316 one end, 10 feet of USB switching chips U300 and switching chip U302, the other end of pull-up resistor R316 connect Connect 9 feet of power vd D3V3 and USB switching chip U300;Coupled capacitor C304 one end is connected with power vd D3V3, coupled capacitor The C304 other ends are grounded;7 feet of USB switching chips U300 are connected with the HSD2_DP networks of 4G modules, 6 feet and 4G moulds of USB switching chips U300 The HSD2_DM of block is connected, and 4 feet of USB switching chips U300 are connected with outside HSD1_DM networks, and the 5 of USB switching chips U300 Foot is connected with outside HSD1_DP networks, and 3 feet of USB switching chips U300 are connected with ground;One end of resistance R319 and USB switchings 2 feet of chip U300 are connected, and the resistance R319 other ends are connected with the USB_OTG_DM of CPU;One end of resistance R320 and USB switchings 1 foot of chip U300 is connected, and the resistance R320 other ends are connected with the USB_OTG_DP networks of CPU;9 feet of coupled capacitor C306 one end connection power vd D3V3 and USB switching chip U302, another terminations of coupled capacitor C306 Ground;Resistance R307 one end is connected with the USB_OTG_UID networks of CPU, and the resistance R307 other ends and USB switch the 1 of chip U302 Foot is connected;One end of resistance R328 is connected with the network USB_OTGID_CHK of CPU, the resistance R328 other ends while and resistance One end of R326, one end of resistance R327 are connected, and the other end of resistance R326 is simultaneously and 5 feet, the external network USB_ of U302 OTG_UID1 is connected, and the other end of resistance R327 is connected with power vd D3V3;One end of resistance R322 and USB switching chips U302 7 feet be connected, the 3rd foot of the resistance R322 other ends and USB switchings chip U302 are grounded simultaneously;The power pack includes resistance R310, and one end of resistance R310 is connected with CPU networks VBUS_EN, and resistance R310 is another End is connected with 1 foot of power supply chip U301, and VBUS_EN networks are connected simultaneously with one end of resistance R312, and the other end of R312 connects One end of connecting resistance R313, the base stage of triode Q302, the other end of resistance R313, the emitter of triode Q302 are grounded; One end of triode Q302 collectors connection resistance R309, one end of resistance R308, the other end of resistance R309 and metal-oxide-semiconductor Q301 Grid be connected;5 feet of power supply chip U301 are connected with external power supply network USB_5V_VBUS;One end of capacitance C303 and electricity 4 feet of source chip U301 are connected, capacitance C303 other ends ground connection, the other end of resistance R308 and the 4 foot phases of power supply chip U301 Even;The 2 foot source electrodes of metal-oxide-semiconductor Q301 are connected with 4 feet of power supply chip U301,4 feet of power supply chip U301 and power vd D5V phases Even, the drain electrode of one end and metal-oxide-semiconductor Q301 of diode D300 is connected, the diode D300 other ends and external power supply network USB_ 5V_VBUS is connected;Described USB switchings chip U300, U302 are the SGM7227 types of SGMICRO companies production;The power supply chip U301 is the RT9102GB types of RichTek companies production.
- It is 2. as described in claim 1 a kind of while support 4G modules and the interface switching control circuit of USBOTG, it is characterised in that:Make During with 4G modules, 3.3V is set as by the CPU handover network USB_SWITCH controlled, triode Q303 is conducting state, three poles The 3rd foot of pipe Q303 is low level, and the whole accesses of USB are USB_OTG_DM-- > HSD2_DM, USB_OTG_DP-- > HSD2_ DP;USB switches 1 foot of chip U300 and 7 feet are connected, 2 feet and 6 feet are connected, 7 feet of USB switching chips U302 and the connection of 1 foot, I.e. USB_OTG_UID networks are low level;The first foot of power supply chip U301 is set as low level, and the enabled foot of power supply chip U301 is closed, power supply chip U301's 5 foot of power supply output pin is 0V, CPU with 4G modules connect.
- It is 3. as described in claim 1 a kind of while support 4G modules and the interface switching control circuit of USBOTG, it is characterised in that:No During using 4G modules, 0V is set as by the CPU handover network USB_SWITCH controlled, triode Q303 is cut-off state, three poles 3 feet of pipe Q303 are high level, and the whole accesses of USB are USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_DP; USB switches 1 foot of chip U300 and 5 feet are connected, 2 feet and 4 feet are connected, and 5 feet and 1 foot of USB switching chips U302 are connected, i.e., outer Portion network USB_OTG_UID1 is connected with the USB_OTG_UID networks of CPU.
- It is 4. as claimed in claim 3 a kind of while support 4G modules and the interface switching control circuit of USBOTG, it is characterised in that: In USB access USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_DP, when financial terminal is main equipment:Outside Portion network USB_OTG_UID1 is set as 0, CPU networks VBUS_EN and is set as high level, the power supply output pin of power supply chip U301 5 feet are 5V.
- It is 5. as claimed in claim 3 a kind of while support 4G modules and the interface switching control circuit of USBOTG, it is characterised in that: In USB access USB_OTG_DM-- > HSD1_DM, USB_OTG_DP-- > HSD1_DP, when financial terminal is slave device:Outside Portion network USB_OTG_UID1 is set as 1, CPU networks VBUS_EN and is set as low level, the power supply output pin of power supply chip U301 5 feet are 0V.
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CN201721535333.XU CN207475579U (en) | 2017-11-16 | 2017-11-16 | It is a kind of while support 4G modules and the interface switching control circuit of USBOTG |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109102650A (en) * | 2018-09-27 | 2018-12-28 | 深圳市丰巢科技有限公司 | Express cabinet for wired communication |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109102650A (en) * | 2018-09-27 | 2018-12-28 | 深圳市丰巢科技有限公司 | Express cabinet for wired communication |
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