CN207475535U - A kind of gradual approaching A/D converter - Google Patents
A kind of gradual approaching A/D converter Download PDFInfo
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- CN207475535U CN207475535U CN201721204885.2U CN201721204885U CN207475535U CN 207475535 U CN207475535 U CN 207475535U CN 201721204885 U CN201721204885 U CN 201721204885U CN 207475535 U CN207475535 U CN 207475535U
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Abstract
The utility model discloses a kind of gradual approaching A/D converters, and including generating circuit from reference voltage, N roads successive approximation modulus conversion circuit, N is the integer more than or equal to 1；Successive approximation modulus conversion circuit moves circuit including reference voltage, analog signal voltage moves circuit, sampling hold circuit, digital analog converter, comparator, Digital Logic control unit.The utility model by reference to voltage moves circuit and analog signal voltage moves reference voltage that circuit respectively generates generating circuit from reference voltage and analog signal to be converted performs voltage and moves operation, and the voltage for moving value and analog signal to be converted of reference voltage moves internal node of the value equal to successive approximation modulus conversion circuit relative to the pressure drop between internal place altogether, then the common ground pressure drop in digital analog converter is eliminated by comparing device, the analog-digital conversion result for making successive approximation modulus conversion circuit is unrelated relative to the pressure drop in internal place altogether with analog to digital conversion circuit internal node.
Description
Technical field
The utility model is related to modulus conversion technique field more particularly to a kind of gradual approaching A/D converters.
Background technology
Analog-digital converter, that is, A/D converter (abbreviation ADC) refers to convert analog signals into the electronics member of digital signal
Part.There are many kinds of the types of analog-digital converter, wherein gradual approaching A/D converter (SAR ADC, successive
Approximation register) it receives and is widely applied with its low cost, low-power consumption.Gradual approaching A/D converter
In transfer process each time, by traversing all quantized values and being translated into the analogue value, by input analog signal and its
Compare one by one, finally obtain the digital signal to be exported.
But pressure drop can cause the digital-to-analogue inside analog-digital converter altogether existing for inside gradual approaching A/D converter
Converter performance declines.
Utility model content
The utility model is intended to provide a kind of gradual approaching A/D converter, reduces gradual approaching A/D converter and is total to
The risk that performance of analog-to-digital convertor caused by ground pressure drop declines.
To achieve these goals, the utility model takes following technical solution：
A kind of gradual approaching A/D converter, including N roads successive approximation modulus conversion circuit, N is more than or equal to 1
Integer；The successive approximation modulus conversion circuit includes sampling hold circuit S/H, digital analog converter DAC, comparator CMP, number
Word logic control element SAR_LOGIC；It is characterized in that：
The gradual approaching A/D converter further includes reference voltage circuit；The successive approximation modulus conversion circuit
Further include that reference voltage moves circuit, analog signal voltage moves circuit；Two output terminals difference of the reference voltage circuit
Circuit is moved with reference voltage, analog signal voltage is moved circuit and connect；The reference voltage moves the output terminal and number of circuit
Mode converter DAC connections；The output terminal that the analog signal voltage moves circuit is connect with sampling hold circuit S/H；The ginseng
The voltage for examining voltage moves value, the voltage of analog signal to be converted moves the inside that value is equal to successive approximation modulus conversion circuit
Node is relative to the internal pressure drop for being total to place.
Further, the N is the integer more than or equal to 2；It is in parallel between the N roads successive approximation modulus conversion circuit
Connection.
Further, the inside of the internal node of the reference voltage circuit and gradual approaching A/D converter is total to place
Between there are spurious impedance RPO；The internal node of the successive approximation modulus conversion circuit is converted with successive approximation modulus
The inside of device is total between place that there are spurious impedance RP；The inside of the gradual approaching A/D converter be total to place with externally
Between there are spurious impedance RPA；One end of the spurious impedance RPO and the internal node of reference voltage circuit connect, the other end
Place is total to the inside of gradual approaching A/D converter to connect；One end of the spurious impedance RP turns with successive approximation modulus
The internal node for changing circuit connects, and the inside of the other end and gradual approaching A/D converter is total to place connection；The parasitic resistance
One end of anti-RPA and the inside of gradual approaching A/D converter are total to place connection, and the other end is with externally connecting.
Further, the digital analog converter DAC uses R2RDAC.
Further, the reference voltage circuit includes generating circuit from reference voltage, input voltage buffer circuit；The ginseng
The input terminal for examining voltage generation circuit receives input voltage VCM, output terminal moves circuit with reference voltage and connect；The input electricity
The input terminal of buffer circuit is pressed to receive input voltage VCM, output terminal moves circuit with analog signal voltage and connect；The reference electricity
Pressure generation circuit output reference voltage moves circuit to reference voltage；The input voltage buffer circuit output-input voltage VCMIt gives
Analog signal voltage moves circuit.
Further, the generating circuit from reference voltage includes operational amplifier OPAaO, metal-oxide-semiconductor MO, resistance RO；It is described
The in-phase input end of operational amplifier OPAaO receives input voltage VCM, reverse input end is connect with the collector of MOS pipes MO, defeated
Outlet is moved circuit and is connect with the base stage of metal-oxide-semiconductor MO, reference voltage respectively；One end of the resistance RO and the current collection of metal-oxide-semiconductor MO
Pole connects, the internal node of another termination reference voltage circuit.
Further, the input voltage buffer circuit includes operational amplifier OPAbO；The operational amplifier OPAbO
In-phase input end receive input voltage VCM, reverse input end connect with the output terminal of operational amplifier OPAbO, output terminal and mould
Intend signal voltage and move circuit connection.
Further, the reference voltage move circuit include operational amplifier OPAa, metal-oxide-semiconductor M, resistance R；The MOS
The base stage of pipe M is connect with the output terminal of operational amplifier OPAaO, and the in-phase input end of collector and operational amplifier OPAa connects
It connects；The reverse input end of the operational amplifier OPAa is connect with output terminal, and the input terminal of output terminal and digital analog converter DAC connects
It connects；One end of the resistance R is connect with the collector of metal-oxide-semiconductor M, the inside section of another termination gradual approaching number conversion circuit
Point.
Further, the resistance R and resistance RO resistance values are equal or proportional.
Further, analog signal voltage move circuit include operational amplifier OPAb, resistance Ra, resistance Rb, resistance Rc,
Resistance Rd, resistance Re, resistance Rf；One end of the resistance Ra is connect with the output terminal of operational amplifier OPAbO, the other end with
The inverting input connection of operational amplifier OPAb；One end of the resistance Rb is connect with the output terminal of operational amplifier OPAa,
The other end is connect with the inverting input of operational amplifier OPAb；One end of the resistance Rc connects with analog signal to be converted
It connects, the other end is connect with the in-phase input end of operational amplifier OPAb；One end of the resistance Rd is with operational amplifier OPAb's
In-phase input end connects, and the other end is connect with the output terminal of operational amplifier OPAb；One end operational amplifier of the resistance Re
The output terminal connection of OPAb, the other end are connect with one end of resistance Rf；Another termination gradual approaching number of the resistance Rf
The internal node of conversion circuit；The resistance Re is connect with the common end of resistance Rf with the input terminal of sampling hold circuit S/H.
Further, the resistance Ra, resistance Rb, resistance Rc, resistance Rd, resistance Re and resistance Rf relationships are：Ra=
Rc, Rb=Rd, Re=Rf.
The utility model advantageous effect：
By above technical scheme it is found that the utility model moves circuit by reference to voltage and analog signal voltage moves electricity
The reference voltage to reference voltage circuit generation and analog signal values to be converted execution voltage move operation, and refer to respectively on road
The voltage for moving value and analog signal to be converted of voltage moves internal node of the value equal to successive approximation modulus conversion circuit
Relative to the pressure drop between internal place altogether, the common ground pressure drop in digital analog converter is then eliminated by comparing device, at this time gradually
The analog-digital conversion result of approach type analog to digital conversion circuit is with analog to digital conversion circuit internal node relative to the pressure drop in internal place altogether
Unrelated, so as to reduce gradual approaching A/D converter, pressure drop causes the risk that performance of analog-to-digital convertor declines altogether.This reality
Multichannel successive approximation modulus conversion circuit is used with novel, can effectively reduce the analog-to-digital conversion delay of analog-digital converter.With
This simultaneously, reference voltage circuit and N roads successive approximation modulus conversion circuit are total to place using common inside, can effectively subtract
The input pin number of few gradual approaching A/D converter.
Description of the drawings
In order to illustrate more clearly of the utility model embodiment, attached drawing needed in the embodiment is done simply below
Introduction.The accompanying drawings in the following description is only the embodiment in the utility model, and those of ordinary skill in the art are come
It says, without creative efforts, can also be obtained according to these attached drawings other accompanying drawings.
Fig. 1 is that specific embodiment of the utility model only has overall structure block diagram all the way；
Fig. 2 is the circuit diagram that specific embodiment of the utility model only has successive approximation modulus conversion circuit all the way；
Fig. 3 is the overall structure block diagram of specific embodiment of the utility model multichannel successive approximation modulus conversion circuit；
Fig. 4 is the circuit diagram of specific embodiment of the utility model multichannel successive approximation modulus conversion circuit.
Specific embodiment
Below in conjunction with the accompanying drawings, the utility model is described in detail.
In order to which the purpose of this utility model, technical solution, advantage is more clearly understood, with reference to the accompanying drawings and embodiments
The present invention is further described in detail.It should be appreciated that specific embodiment described herein is only used to explain this
Utility model is not used to limit the utility model.
Embodiment 1
As shown in Figure 1, a kind of gradual approaching A/D converter includes reference voltage circuit, successive approximation modulus is converted
Circuit.
As shown in Fig. 2, successive approximation modulus conversion circuit includes sampling hold circuit S/H, digital analog converter DAC, ratio
Compared with device CMP, Digital Logic control unit SAR_LOGIC and reference voltage move circuit, analog signal moves circuit.In this reality
It applies in example, digital analog converter DAC uses R2RDAC.
Reference voltage moves circuit, analog signal voltage is moved the input terminal of circuit and connect with reference voltage circuit.With reference to
The output terminal that voltage moves circuit is connect with digital analog converter DAC.Analog signal voltage moves the output terminal of circuit and sampling is protected
Hold the input terminal connection of circuit S/H.The output terminal of sampling hold circuit S/H is connect with the inverting input of comparator CMP.Digital-to-analogue
Converter DAC is connect with the in-phase input end of comparator CMP.The output terminal of comparator CMP and Digital Logic control unit SAR_
The input terminal connection of LOGIC.The output terminal of Digital Logic control unit SAR_LOGIC is connect with digital analog converter DAC.Modulus turns
Parallel operation DAC is connect with the internal node of successive approximation modulus conversion circuit.
Reference voltage circuit receives input voltage VCM, output reference voltage moves circuit to reference voltage, and exports input
Voltage VCMCircuit is moved to analog signal voltage.Reference voltage moves circuit and moves operation, and will to reference voltage execution voltage
As a result it is output to digital analog converter DAC.Analog signal voltage moves to be converted analog signal V of the circuit to inputINPerform voltage
Operation is moved, and result is output to sampling hold circuit S/H.The voltage of reference voltage moves value, analog signal to be converted
It is related relative to the pressure drop in internal place altogether that voltage moves value and the internal node of successive approximation modulus conversion circuit.
The voltage that comparator CMP exports digital analog converter DAC and the analog signal voltage of sampling hold circuit S/H acquisitions
It is compared, and result of the comparison is sent to Digital Logic control unit SAR_LOGIC.Digital Logic control unit is according to upper
The voltage of the comparison result adjustment digital analog converter DAC outputs of comparator CMP, until the electricity of digital analog converter DAC outputs
Pressure is equal with the analog signal voltage that sampling hold circuit S/H is acquired.Digital Logic control unit SAR_LOGIC outputs are gradually forced
The analog-digital conversion result ADCOUT of plesiotype analog to digital conversion circuit.
As shown in Fig. 2, reference voltage circuit includes generating circuit from reference voltage, input voltage buffer circuit.Reference voltage
The input terminal of generation circuit receives input voltage VCM, output terminal moves circuit with reference voltage and connect.Input voltage buffer circuit
Input terminal receive input voltage VCM, output terminal moves circuit with analog signal voltage and connect.Generating circuit from reference voltage exports
Reference voltage moves circuit to reference voltage.Input voltage buffer circuit output-input voltage VCMElectricity is moved to analog signal voltage
Road.
As shown in Fig. 2, generating circuit from reference voltage includes operational amplifier OPAaO, metal-oxide-semiconductor MO, resistance RO.Operation is put
The in-phase input end of big device OPAaO receives input voltage VCM, reverse input end connect with the collector of metal-oxide-semiconductor MO, output terminal point
Do not move circuit with the base stage of metal-oxide-semiconductor MO, reference voltage and connect.One end of resistance RO is connect with the collector of metal-oxide-semiconductor MO, separately
The internal node of one termination reference voltage circuit.The resistance value of resistance RO is very big in the present embodiment, generating circuit from reference voltage hair
Give the electric current I that reference voltage moves circuitREF=VCM/RO。
As shown in Fig. 2, input voltage buffer circuit includes operational amplifier OPAbO.The same phase of operational amplifier OPAbO
Input terminal receives input voltage VCM, reverse input end connect with the output terminal of operational amplifier OPAbO, output terminal and analog signal
Voltage moves circuit connection.Input voltage buffer circuit is sent to the voltage V that analog signal voltage moves circuitCMBUF=VCM。
As shown in Fig. 2, reference voltage, which moves circuit, includes operational amplifier OPAa, metal-oxide-semiconductor M, resistance R.The base of metal-oxide-semiconductor M
Pole is connect with the output terminal of operational amplifier OPAaO, and collector is connect with the in-phase input end of operational amplifier OPAa.Operation
The reverse input end of amplifier OPAa is connect with output terminal, and output terminal is connect with the input terminal of digital analog converter DAC.Resistance R's
One end is connect with the collector of metal-oxide-semiconductor M, the internal node of another termination gradual approaching number conversion circuit, the electricity on resistance R
Stream is equal to IREF。
In the present embodiment, resistance R is equal with resistance RO resistance values, and the voltage at resistance R both ends is equal to VCM.Operational amplifier
The homophase input terminal voltage V of OPAaREF=VCM+VS, wherein VSBe successive approximation modulus conversion circuit internal node with gradually
The inside for approaching type analog-to-digital converter is total to pressure drop between place.Operational amplifier OPAa is output to the electricity of analog-digital converter DAC
Pressure is VBUF=VCM+VS.Voltage K* (the V of digital analog converter DAC input comparators CMPBUF-VS)+VS=K*VCM+VS, wherein K values
It is determined by Digital Logic control unit SAR_LOGIC.
As shown in Fig. 2, analog signal voltage, which moves circuit, includes operational amplifier OPAb, resistance Ra, resistance Rb, resistance
Rc, resistance Rd, resistance Re, resistance Rf.One end of resistance Ra is connect with the output terminal of operational amplifier OPAbO, the other end and fortune
Calculate the inverting input connection of amplifier OPAb.One end of resistance Rb is connect with the output terminal of operational amplifier OPAa, the other end
It is connect with the inverting input of operational amplifier OPAb.One end of resistance Rc is connect with analog signal to be converted, the other end with
The in-phase input end connection of operational amplifier OPAb.One end of resistance Rd is connect with the in-phase input end of operational amplifier OPAb,
The other end is connect with the output terminal of operational amplifier OPAb.The output terminal connection of one end operational amplifier OPAb of resistance Re, separately
One end is connect with one end of resistance Rf.The internal node of another termination gradual approaching number conversion circuit of resistance Rf.Resistance
Re is connect with the common end of resistance Rf with the input terminal of sampling hold circuit S/H.In the present embodiment, resistance Ra, resistance Rb, electricity
Resistance Rc, resistance Rd, resistance Re and resistance Rf meet Ra=Rc, Rb=Rd, Re=Rf.Remember q=Ra/Rb, then q=Ra/Rb=
The voltage V of Rc/Rd, operational amplifier OPAb outputOUT=q* (VCMBUF-VIN)+VBUF=q* (VCMBUF-VIN)+VCM+VSn.Simulation
Signal voltage moves circuit output to the voltage V of sampling hold circuit S/HADC=(VOUT-VS)/2+VS=0.5*q* (VCMBUF-
VIN)+0.5*VCM+VS=0.5*q* (VCM-VIN)+0.5*VCM+VS。
Comparator CMP compares sampling hold circuit S/H input voltages VADCWith digital analog converter DAC input comparators CMP's
Voltage K*VCM+VS, and comparison result is sent to Digital Logic control unit SAR_LOGIC.Digital Logic control unit SAR_
LOGIC adjusts the K of digital analog converter according to the comparison result of comparator CMP, until VADC=K*VCM+VS, i.e. 0.5*q* (VCM-
VIN)+0.5*VCM+VS=K*VCM+VS, K=0.5* (q+1) -0.5*q*VIN /VCM.Digital Logic control unit SAR_LOGIC is defeated
Go out VADC=K*VCM+VSWhen K values, K at this time is exactly the analog-digital conversion result of successive approximation modulus conversion circuit.At this time by
The analog-digital conversion result of secondary approach type analog to digital conversion circuit is with analog to digital conversion circuit internal node relative to the pressure in internal place altogether
Drop it is unrelated, so as to reduce gradual approaching A/D converter altogether pressure drop cause performance of analog-to-digital convertor decline risk.
As shown in Fig. 2, the internal node of reference voltage circuit and the inside of gradual approaching A/D converter be total to place it
Between there are spurious impedance RPO, one end of spurious impedance RPO and the internal node of reference voltage circuit connect, the other end with gradually
The inside for approaching type analog-to-digital converter is total to place connection.
As shown in Fig. 2, successive approximation modulus conversion circuit internal node and gradual approaching A/D converter it is interior
Portion is total between place that there are spurious impedance RP, one end of spurious impedance RP and the internal nodes of successive approximation modulus conversion circuit
The inside of connection, the other end and gradual approaching A/D converter is total to place connection.The inside of gradual approaching A/D converter
Place voltage is V altogetherSA。
As shown in Fig. 2, the inside of gradual approaching A/D converter be total to place and externally between there are spurious impedances
RPA, one end of spurious impedance RPA and the inside of gradual approaching A/D converter are total to place connection, and the other end is with externally connecting
It connects.
Embodiment 2
As shown in figure 3, a kind of gradual approaching A/D converter includes reference voltage circuit, N roads successive approximation modulus
Conversion circuit, wherein N are the integer (the same below) more than or equal to 2.It is in parallel between the successive approximation modulus conversion circuit of N roads to connect
It connects.Reference voltage circuit is connect respectively with N roads successive approximation modulus conversion circuit.
As shown in figure 4, the n-th road successive approximation modulus conversion circuit includes sampling hold circuit S/H (n), digital-to-analogue conversion
Device DAC (n), comparator CMPn, Digital Logic control unit SAR_LOGIC (n), the n-th road reference voltage move circuit, the n-th tunnel
Input voltage moves circuit.Wherein, n=1,2 ... N (the same below).In the present embodiment, digital analog converter DAC (n) is used
R2RDAC。
As shown in figure 4, reference voltage circuit includes generating circuit from reference voltage, input voltage buffer circuit.Reference voltage
The input terminal of generation circuit receives input voltage VCM, output terminal moves circuit with the n-th road reference voltage and connect.Input voltage caches
The input terminal of circuit receives input voltage VCM, output terminal moves circuit with the n-th road analog signal voltage and connect.Reference voltage generates
Circuit output reference voltage moves circuit to the n-th road reference voltage.Input voltage buffer circuit output-input voltage VCMTo the n-th tunnel
Analog signal voltage moves circuit.
As shown in figure 4, the n-th road reference voltage moves circuit, the n-th road analog signal voltage moves the input terminal and ginseng of circuit
Examine potential circuit connection.The output terminal that n-th road reference voltage moves circuit is connect with digital analog converter DAC (n).It simulates on the n-th tunnel
The output terminal that signal voltage moves circuit is connect with the input terminal of sampling hold circuit S/H (n).Sampling hold circuit S/H's (n)
Output terminal is connect with the inverting input of comparator CMPn.The in-phase input end of digital analog converter DAC (n) and comparator CMPn connects
It connects.The output terminal of comparator CMPn is connect with the input terminal of Digital Logic control unit SAR_LOGIC (n).Digital Logic controls
The output terminal of cell S AR_LOGIC (n) is connect with digital analog converter DAC (n).Analog-digital converter DAC (n) is gradually forced with the n-th tunnel
The internal node connection of plesiotype analog to digital conversion circuit.
As shown in figure 4, generating circuit from reference voltage includes operational amplifier OPAaO, metal-oxide-semiconductor MO, resistance RO.Operation is put
The in-phase input end of big device OPAaO receives input voltage VCM, reverse input end connect with the collector of metal-oxide-semiconductor MO, output terminal point
Do not move circuit with the base stage of metal-oxide-semiconductor MO, the n-th road reference voltage and connect.One end of resistance RO connects with the collector of metal-oxide-semiconductor MO
It connects, the internal node of another termination reference voltage circuit.The resistance value of resistance RO is very big in the present embodiment, and reference voltage generates electricity
Road is sent to the electric current I that the n-th road reference voltage moves circuitREF=VCM/RO。
As shown in figure 4, input voltage buffer circuit includes operational amplifier OPAbO.The same phase of operational amplifier OPAbO
Input terminal receives input voltage VCM, reverse input end connect with the output terminal of operational amplifier OPAbO, output terminal and the n-th road mould
Intend signal voltage and move circuit connection.Input voltage buffer circuit is sent to the voltage that the n-th road analog signal voltage moves circuit
VCMBUF=VCM。
As shown in figure 4, the n-th road reference voltage, which moves circuit, includes operational amplifier OPAan, metal-oxide-semiconductor Mn, resistance Rn.Fortune
The output terminal for calculating amplifier OPAaO is connect with the base stage of metal-oxide-semiconductor Mn.The collector of metal-oxide-semiconductor Mn respectively with operational amplifier OPAna
In-phase input end connected with one end of resistance Rn.The other end of resistance Rn and the n-th road successive approximation modulus conversion circuit
Internal node connects.The output terminal of operational amplifier OPAna turns respectively with the in-phase input end of operational amplifier OPAna, digital-to-analogue
Parallel operation DAC (n) connections.The output terminal of operational amplifier OPAOa flows into the electric current In=IO=V of metal-oxide-semiconductor MnCM/RO。
As shown in figure 4, digital analog converter DAC (n) and the internal node of the n-th road successive approximation modulus conversion circuit connect
It connects.The output end voltage of operational amplifier OPAan is denoted as VBUFn, the internal node of the n-th road successive approximation modulus conversion circuit
Voltage is denoted as VSn.The normal phase input end voltage V of operational amplifier OPAanREFn=In*R1+MSn=(VCM*R1)/RO+VSn.
In the present embodiment, the normal phase input end voltage V of resistance Rn=R1, operational amplifier OPAanREFn=In*R1+MSn=VCM+VSn。
The output end voltage V of operational amplifier OPAan at this timeBUFn=VREFn=VCM+VSn, digital analog converter DAC (n) both end voltages
VDAC(n)=VBUFn-VSn=VCM, the voltage at digital analog converter DAC (n) both ends and the n-th road successive approximation modulus conversion are electric at this time
The common ground pressure drop V on roadSnIt is unrelated, overcome the influence of common ground pressure drop logarithm mode converter DAC (n) performances.Digital analog converter DAC
(n) the reference voltage K*V of outputDAC(n)+VSn=K*VCM+VSn。
As shown in figure 4, the n-th road input voltage, which moves circuit, includes operational amplifier OPAbn, resistance Ran, resistance Rbn, electricity
Hinder Rcn, resistance Rdn, resistance Ren, resistance Rfn.One end of resistance Ran and one end other end of resistance Rbn and operational amplifier
The output terminal connection of OPAbO.The other end of resistance Rbn is connect with the output terminal of operational amplifier OPAan.Resistance Rbn and electricity
The common end of resistance Ran is connect with the inverting input of operational amplifier operational amplifier OPAbn.One end of resistance Rcn and resistance
One end connection of Rdn, connect with the n-th road analog signal VINn to be converted.The other end of Rdn is defeated with operational amplifier OPAbn's
Outlet connects.The common end of resistance Rcn and resistance Rdn are connect with the in-phase input end of operational amplifier operational amplifier OPAbn.
One end of resistance Ren is connect with one end of resistance Rfn, and the other end is connect with the output terminal of operational amplifier OPAbn.Rfn's is another
One end is connect with the internal node of the n-th road successive approximation modulus conversion circuit.The common end of resistance Ren and resistance Rfn and n-th
Road sampling hold circuit S/H (n) connections.In the present embodiment, resistance Ran, resistance Rbn, resistance Rcn, resistance Rdn, resistance Ren
Value relatable with resistance Rfn is：Ran=Ren, Rbn=Rdn, Ren=Rfn.Remember that q=Rbn/Ran=Rdn/Rcn is (following
Together).The output end voltage V of operational amplifier OPAbnOUTn=q* (VCMBUF-VINn)+VBUFn=q* (VCMBUF-VINn)+VCM+VSn。
The input voltage V of n-th road sampling hold circuitADCn=(VOUTn-VSn)/2+VSn=0.5*q* (VCMBUF-VINn)+0.5*VCM++
VSn。
As shown in figure 4, sampling hold circuit S/H (n) is connect with the inverting input of comparator CMPn, the n-th tunnel is waited to turn
Change analog signal VINnThe signal V obtained after movingADCnIt is output to comparator CMPn.Digital analog converter DAC (n) is compared with
The in-phase input end connection of device CMPn, by the reference voltage output that digital analog converter DAC (n) is generated to comparator CMPn.Compare
Device CMPn is connect with Digital Logic control unit SAR_LOGIC (n), the voltage that the n-th road sampling hold circuit S/H (n) is acquired
VADCnIt is compared, and result of the comparison is output to Digital Logic control with digital analog converter DAC (n) the reference voltage K generated
Cell S AR_LOGIC (n) processed.Digital Logic control unit SAR_LOGIC (n) is connect with digital analog converter DAC (n), according to than
Compared with the reference voltage that device CMPn result of the comparison control digital analog converter DAC (n) is generated, until digital analog converter DAC (n) is produced
Raw reference voltage and the voltage V of the n-th road sampling hold circuit S/H (n) acquisitionsADCnIt is equal, i.e. K*VCM+VSn=VADCn=
0.5*q*(VCMBUF-VINn)+0.5*VCM++VSn, K=0.5* (q+1) -0.5*q*V at this timeINn/VCM, with the n-th road successive approximation
The common ground pressure drop V of analog to digital conversion circuitSnIt is unrelated.Digital Logic control unit SAR_LOGIC (n) produces digital analog converter DAC (n)
Raw reference voltage and the voltage V of the n-th road sampling hold circuit S/H (n) acquisitionsADCnK when equal is denoted as result ADCOUT(n)
Output.
As shown in figure 4, the inside of the internal node of generating circuit from reference voltage and multichannel gradual approaching A/D converter
There are spurious impedance RPO, one end of spurious impedance RPO and the internal nodes of generating circuit from reference voltage between place altogether to connect,
The other end is total to place with the inside of multichannel gradual approaching A/D converter and connect.
As shown in figure 4, the internal node of the n-th road successive approximation modulus conversion circuit turns with multichannel successive approximation modulus
The inside of parallel operation is total between place there are spurious impedance RPn, and one end of spurious impedance RPn turns with the n-th road successive approximation modulus
The internal node connection of circuit is changed, the other end is total to place with the inside of multichannel gradual approaching A/D converter and connect.Multichannel by
The secondary inside for approaching type analog-to-digital converter is total to place voltage as VSA。
As shown in figure 4, the inside of multichannel gradual approaching A/D converter be total to place and externally between there is parasitic resistance
One end of anti-RPA, spurious impedance RPA are total to place with the inside of multichannel gradual approaching A/D converter and connect, the other end with it is outer
Connect to portion.
The above is only the preferred embodiment of the utility model, and the scope of protection of the utility model is not limited merely to
Embodiment is stated, all technical solutions belonged under the utility model thinking belong to the scope of protection of the utility model.It should be pointed out that
For those skilled in the art, several improvement under the premise of the utility model principle is not departed from and profit
Decorations, these improvements and modifications also should be regarded as the scope of protection of the utility model.
Claims (18)
1. a kind of gradual approaching A/D converter, including N roads successive approximation modulus conversion circuit, N is whole more than or equal to 1
Number；The successive approximation modulus conversion circuit includes sampling hold circuit S/H, digital analog converter DAC, comparator CMP, number
Logic control element SAR_LOGIC；It is characterized in that：
The gradual approaching A/D converter further includes reference voltage circuit；The successive approximation modulus conversion circuit also wraps
Include that reference voltage moves circuit, analog signal voltage moves circuit；Two output terminals of the reference voltage circuit and reference electricity
Pressure moves circuit, analog signal voltage is moved circuit and is correspondingly connected with；The reference voltage moves the output terminal of circuit and digital-to-analogue turns
Parallel operation DAC connections；The output terminal that the analog signal voltage moves circuit is connect with sampling hold circuit S/H；The reference electricity
The voltage of pressure moves value, the voltage of analog signal to be converted moves the internal node that value is equal to successive approximation modulus conversion circuit
Relative to the pressure drop in internal place altogether.
2. gradual approaching A/D converter according to claim 1, it is characterised in that：The N is whole more than or equal to 2
Number；It is connected in parallel between the N roads successive approximation modulus conversion circuit.
3. gradual approaching A/D converter according to claim 1 or 2, it is characterised in that：The reference voltage circuit
Internal node and the inside of gradual approaching A/D converter be total between place that there are spurious impedance RPO；The Approach by inchmeal
The internal node of type analog to digital conversion circuit and the inside of gradual approaching A/D converter are total between place that there are spurious impedance RP；
The inside of the gradual approaching A/D converter be total to place and externally between there are spurious impedance RPA；The spurious impedance
One end of RPO and the internal node of reference voltage circuit connect, and the inside of the other end and gradual approaching A/D converter is altogether
Point connection；One end of the spurious impedance RP is connect with the internal node of successive approximation modulus conversion circuit, the other end with by
The secondary inside for approaching type analog-to-digital converter is total to place connection；It is converted with successive approximation modulus one end of the spurious impedance RPA
The inside of device is total to place connection, and the other end is with externally connecting.
4. gradual approaching A/D converter according to claim 1, it is characterised in that：The digital analog converter DAC is adopted
Use R2RDAC.
5. according to the gradual approaching A/D converter described in claims 1 or 2 or 4, it is characterised in that：The reference voltage electricity
Road includes generating circuit from reference voltage, input voltage buffer circuit；The input terminal of the generating circuit from reference voltage receives input
Voltage VCM, output terminal moves circuit with reference voltage and connect；The input terminal of the input voltage buffer circuit receives input voltage
VCM, output terminal moves circuit with analog signal voltage and connect；The generating circuit from reference voltage output reference voltage is given with reference to electricity
Pressure moves circuit；The input voltage buffer circuit output-input voltage VCMCircuit is moved to analog signal voltage.
6. gradual approaching A/D converter according to claim 5, it is characterised in that：The generating circuit from reference voltage
Including operational amplifier OPAaO, metal-oxide-semiconductor MO, resistance RO；The in-phase input end of the operational amplifier OPAaO receives input electricity
Press VCM, reverse input end connect with the collector of metal-oxide-semiconductor MO, and output terminal moves electricity with the base stage of metal-oxide-semiconductor MO, reference voltage respectively
Road connects；One end of the resistance RO is connect with the collector of metal-oxide-semiconductor MO, the internal node of another termination reference voltage circuit.
7. gradual approaching A/D converter according to claim 5, it is characterised in that：The input voltage buffer circuit
Including operational amplifier OPAbO；The in-phase input end of the operational amplifier OPAbO receives input voltage VCM, reverse input end
It is connect with the output terminal of operational amplifier OPAbO, output terminal is moved circuit with analog signal voltage and connect.
8. the gradual approaching A/D converter described according to claim 6 or 7, it is characterised in that：The reference voltage is moved
Circuit includes operational amplifier OPAa, metal-oxide-semiconductor M, resistance R；The base stage of the metal-oxide-semiconductor M and the output terminal of operational amplifier OPAaO
Connection, collector are connect with the in-phase input end of operational amplifier OPAa；The reverse input end of the operational amplifier OPAa with
Output terminal connects, and output terminal is connect with the input terminal of digital analog converter DAC；One end of the resistance R and the collector of metal-oxide-semiconductor M
Connection, the internal node of another termination gradual approaching number conversion circuit.
9. gradual approaching A/D converter according to claim 8, it is characterised in that：The resistance R and resistance RO hinders
It is worth equal or proportional.
10. gradual approaching A/D converter according to claim 8, it is characterised in that：Analog signal voltage moves electricity
Road includes operational amplifier OPAb, resistance Ra, resistance Rb, resistance Rc, resistance Rd, resistance Re, resistance Rf；The one of the resistance Ra
End is connect with the output terminal of operational amplifier OPAbO, and the other end is connect with the inverting input of operational amplifier OPAb；The electricity
One end of resistance Rb is connect with the output terminal of operational amplifier OPAa, and the inverting input of the other end and operational amplifier OPAb connects
It connects；One end of the resistance Rc is connect with analog signal to be converted, the in-phase input end of the other end and operational amplifier OPAb
Connection；One end of the resistance Rd is connect with the in-phase input end of operational amplifier OPAb, the other end and operational amplifier OPAb
Output terminal connection；The output terminal connection of one end operational amplifier OPAb of the resistance Re, one end of the other end and resistance Rf
Connection；The internal node of another termination gradual approaching number conversion circuit of the resistance Rf；The resistance Re and resistance Rf
Common end connect with the input terminal of sampling hold circuit S/H.
11. gradual approaching A/D converter according to claim 10, it is characterised in that：The resistance Ra, resistance Rb,
Resistance Rc, resistance Rd, resistance Re and resistance Rf relationships are：Ra=Rc, Rb=Rd, Re=Rf.
12. gradual approaching A/D converter according to claim 3, it is characterised in that：The reference voltage circuit packet
Include generating circuit from reference voltage, input voltage buffer circuit；The input terminal of the generating circuit from reference voltage receives input voltage
VCM, output terminal moves circuit with reference voltage and connect；The input terminal of the input voltage buffer circuit receives input voltage VCM,
Output terminal is moved circuit with analog signal voltage and is connect；The generating circuit from reference voltage output reference voltage is removed to reference voltage
Shift circuit；The input voltage buffer circuit output-input voltage VCMCircuit is moved to analog signal voltage.
13. gradual approaching A/D converter according to claim 12, it is characterised in that：The reference voltage generates electricity
Road includes operational amplifier OPAaO, metal-oxide-semiconductor MO, resistance RO；The in-phase input end of the operational amplifier OPAaO receives input
Voltage VCM, reverse input end connect with the collector of metal-oxide-semiconductor MO, and output terminal is moved respectively with the base stage of metal-oxide-semiconductor MO, reference voltage
Circuit connects；One end of the resistance RO is connect with the collector of metal-oxide-semiconductor MO, the inside section of another termination reference voltage circuit
Point.
14. gradual approaching A/D converter according to claim 12, it is characterised in that：The input voltage caching electricity
Road includes operational amplifier OPAbO；The in-phase input end of the operational amplifier OPAbO receives input voltage VCM, reversely input
End is connect with the output terminal of operational amplifier OPAbO, and output terminal is moved circuit with analog signal voltage and connect.
15. the gradual approaching A/D converter according to claim 13 or 14, it is characterised in that：The reference voltage is removed
Shift circuit includes operational amplifier OPAa, metal-oxide-semiconductor M, resistance R；The base stage of the metal-oxide-semiconductor M and the output of operational amplifier OPAaO
End connection, collector are connect with the in-phase input end of operational amplifier OPAa；The reverse input end of the operational amplifier OPAa
It is connect with output terminal, output terminal is connect with the input terminal of digital analog converter DAC；One end of the resistance R and the current collection of metal-oxide-semiconductor M
Pole connects, the internal node of another termination gradual approaching number conversion circuit.
16. gradual approaching A/D converter according to claim 15, it is characterised in that：The resistance R and resistance RO
Resistance value is equal or proportional.
17. gradual approaching A/D converter according to claim 15, it is characterised in that：Analog signal voltage moves electricity
Road includes operational amplifier OPAb, resistance Ra, resistance Rb, resistance Rc, resistance Rd, resistance Re, resistance Rf；The one of the resistance Ra
End is connect with the output terminal of operational amplifier OPAbO, and the other end is connect with the inverting input of operational amplifier OPAb；The electricity
One end of resistance Rb is connect with the output terminal of operational amplifier OPAa, and the inverting input of the other end and operational amplifier OPAb connects
It connects；One end of the resistance Rc is connect with analog signal to be converted, the in-phase input end of the other end and operational amplifier OPAb
Connection；One end of the resistance Rd is connect with the in-phase input end of operational amplifier OPAb, the other end and operational amplifier OPAb
Output terminal connection；The output terminal connection of one end operational amplifier OPAb of the resistance Re, one end of the other end and resistance Rf
Connection；The internal node of another termination gradual approaching number conversion circuit of the resistance Rf；The resistance Re and resistance Rf
Common end connect with the input terminal of sampling hold circuit S/H.
18. gradual approaching A/D converter according to claim 17, it is characterised in that：The resistance Ra, resistance Rb,
Resistance Rc, resistance Rd, resistance Re and resistance Rf relationships are：Ra=Rc, Rb=Rd, Re=Rf.
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| CN201721204885.2U CN207475535U (en) | 2017-09-19 | 2017-09-19 | A kind of gradual approaching A/D converter |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107565968A (en) * | 2017-09-19 | 2018-01-09 | 珠海泰芯半导体有限公司 | A kind of gradual approaching A/D converter |
| CN112311396A (en) * | 2020-10-22 | 2021-02-02 | 西安空间无线电技术研究所 | Successive comparison type analog-to-digital conversion circuit with novel architecture |
| CN116318153A (en) * | 2023-05-10 | 2023-06-23 | 微龛(广州)半导体有限公司 | Reference voltage driving circuit, analog-to-digital converter, chip and driving method |
-
2017
- 2017-09-19 CN CN201721204885.2U patent/CN207475535U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107565968A (en) * | 2017-09-19 | 2018-01-09 | 珠海泰芯半导体有限公司 | A kind of gradual approaching A/D converter |
| CN107565968B (en) * | 2017-09-19 | 2024-01-26 | 珠海泰为电子有限公司 | Successive approximation type analog-to-digital converter |
| CN112311396A (en) * | 2020-10-22 | 2021-02-02 | 西安空间无线电技术研究所 | Successive comparison type analog-to-digital conversion circuit with novel architecture |
| CN112311396B (en) * | 2020-10-22 | 2024-03-15 | 西安空间无线电技术研究所 | Successive comparison type analog-to-digital conversion circuit with new architecture |
| CN116318153A (en) * | 2023-05-10 | 2023-06-23 | 微龛(广州)半导体有限公司 | Reference voltage driving circuit, analog-to-digital converter, chip and driving method |
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