CN207410024U - Serial line interface protects circuit - Google Patents
Serial line interface protects circuit Download PDFInfo
- Publication number
- CN207410024U CN207410024U CN201721428988.7U CN201721428988U CN207410024U CN 207410024 U CN207410024 U CN 207410024U CN 201721428988 U CN201721428988 U CN 201721428988U CN 207410024 U CN207410024 U CN 207410024U
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- CN
- China
- Prior art keywords
- interface
- circuit
- external
- internal
- serial line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model provides a kind of serial line interface protection circuit, it solves the technical problems such as the prior art is not in place to the protection of serial line interface.This serial line interface protects circuit; it is arranged between internal interface and external interface; internal interface includes internal transmission interface and internal receipt interface; external interface includes external transmission interface and external reception interface; internal transmission interface is connected by the first current-limiting circuit with external transmission interface, and internal receipt interface is connected by the second current-limiting circuit with external reception interface.Advantage is：First current-limiting circuit and the second current-limiting circuit limit the electric current for passing through internal interface when internal interface short circuit or internal interface voltage are more than operating voltage for limiting electric current；When first clamp circuit and the second clamp circuit can prevent static discharge or hot plugging, the voltage-to-ground of external transmission interface and external reception interface goes beyond the scope, so as to protect serial line interface.
Description
Technical field
The utility model belongs to field of circuit technology, and circuit is protected more particularly, to a kind of serial line interface.
Background technology
Serial line interface refers to that one ground order of data transmits, its main feature is that communication line is simple, as long as a pair of of transmission
Line can realize two-way communication, to be used for servo parameter import and program burn writing update etc., therefore in actual use its
Need charged warm connection function and a degree of antistatic capacity.But existing serial line interface is often not provided with protecting
Protection circuit, therefore do not possess above-mentioned function, it is not in place to the protection of serial line interface, cause the service life of serial line interface to reduce.
The content of the invention
The purpose of this utility model is in view of the above-mentioned problems, to provide a kind of design reasonable, simple in structure, can be protected serial
The serial line interface protection circuit of interface.
In order to achieve the above objectives, the utility model employs following technical proposal：This serial line interface protects circuit, is arranged on
Between internal interface and external interface, the internal interface includes internal transmission interface and internal receipt interface, and described is outer
Portion's interface includes external transmission interface and external reception interface, and the inside transmission interface passes through the first current-limiting circuit and outside
Transmission interface is connected, and the internal receipt interface is connected by the second current-limiting circuit with external reception interface.First current limliting electricity
Road and the second current-limiting circuit limit for limiting electric current when internal interface short circuit or internal interface voltage are more than operating voltage
By the electric current of internal interface, so as to protect serial line interface.
In above-mentioned serial line interface protection circuit, first current-limiting circuit and the second current-limiting circuit are resistance.
In above-mentioned serial line interface protection circuit, the external transmission interface is connected with the first clamp circuit, described
External reception interface be connected with the second clamp circuit.First clamp circuit and the second clamp circuit can prevent static discharge or
When person plugs, the voltage-to-ground of external transmission interface and external reception interface goes beyond the scope, so as to protect serial interface
Mouthful.
In above-mentioned serial line interface protection circuit, first clamp circuit and the second clamp circuit include two
The zener diode that anode is connected with each other, one of zener diode in the first clamp circuit and the second clamp circuit it is negative
Pole is connected with ground terminal, and the cathode of another zener diode in the first clamp circuit is connected with external transmission interface, the
The cathode of another zener diode in two clamp circuits is connected with external reception interface.
In above-mentioned serial line interface protection circuit, the inside transmission interface and the first internal high frequency spike filter out electricity
Road is connected, and the internal receipt interface is connected with the second internal high frequency spike filtering circuit, the external transmission interface with
First external high frequency spike filtering circuit is connected, the external reception interface and the second external high frequency spike filtering circuit phase
Even.
In above-mentioned serial line interface protection circuit, the first internal high frequency spike filtering circuit includes being arranged on interior
The first internal capacitance between portion's transmission interface and ground terminal, the second internal high frequency spike filtering circuit include being arranged on
The second internal capacitance between internal receipt interface and ground terminal, the first external high frequency spike filtering circuit include setting
The first external capacitive between external transmission interface and ground terminal, the second external high frequency spike filtering circuit include setting
Put the second external capacitive between external receiving interface and ground terminal.
Compared with prior art, it is the advantages of this serial line interface protection circuit：First current-limiting circuit and the second current limliting
Circuit limits when internal interface short circuit or internal interface voltage are more than operating voltage for limiting electric current and passes through internal interface
Electric current；When first clamp circuit and the second clamp circuit can prevent static discharge or hot plugging, external transmission interface
It goes beyond the scope with the voltage-to-ground of external reception interface, so as to protect serial line interface.
Description of the drawings
Fig. 1 provides the structure diagram of the utility model.
In figure, internal transmission interface 11, internal receipt interface 12, external transmission interface 21, external reception interface 22, first
Current-limiting circuit 31, the second current-limiting circuit 32, the first clamp circuit 41, the second clamp circuit 42, the first internal high frequency spike filter out
Circuit 51, the second internal high frequency spike filtering circuit 52, the first external high frequency spike filtering circuit 53, the second external high frequency spike
Filtering circuit 54.
Specific embodiment
The technical issues of in order to solve the utility model, technical solution and advantageous effect are more clearly understood, below
The utility model is described further with reference to the drawings and specific embodiments, but the utility model is not limited to described implementation
Example, on the contrary, the utility model includes whole modifications, modification and the equivalent fallen within the scope of the appended claims.
As shown in Figure 1, this serial line interface protects circuit, it is arranged between internal interface and external interface, internal interface bag
Internal transmission interface 11 and internal receipt interface 12 are included, external interface includes external transmission interface 21 and external reception interface 22,
Internal transmission interface 11 is connected by the first current-limiting circuit 31 with external transmission interface 21, and internal receipt interface 12 passes through the second limit
Current circuit 32 is connected with external reception interface 22；Preferably, the first current-limiting circuit 31 and the second current-limiting circuit 32 are resistance.The
One current-limiting circuit 31 and the second current-limiting circuit 32 are more than work in internal interface short circuit or internal interface voltage for limiting electric current
Make to limit the electric current by internal interface during voltage, so as to protect serial line interface.
Referring back to Fig. 1, external transmission interface 21 is connected with the first clamp circuit 41,22 and second clamper of external reception interface
Circuit 42 is connected；Preferably, the first clamp circuit 41 and the second clamp circuit 42 include the voltage stabilizing that two anodes are connected with each other
Diode, selection TPD2E007, the first clamp circuit 41 and one of zener diode in the second clamp circuit 42
Cathode is connected with ground terminal, the cathode of another zener diode in the first clamp circuit 41 and 21 phase of external transmission interface
Even, the cathode of another zener diode in the second clamp circuit 42 is connected with external reception interface 22.First clamper electricity
When 41 and second clamp circuit 42 of road can prevent static discharge or hot plugging, external transmission interface 21 and external reception connect
The voltage-to-ground of mouth 22 goes beyond the scope, so as to protect serial line interface.
In order to filter out high frequency spikes, internal transmission interface 11 is connected with the first internal high frequency spike filtering circuit 51, internal
Receiving interface 12 is connected with the second internal high frequency spike filtering circuit 52, external 21 and first external high frequency spike of transmission interface filter
Except circuit 53 is connected, external reception interface 22 is connected with the second external high frequency spike filtering circuit 54；Preferably, the first inside is high
Frequency spike filtering circuit 51 includes the first internal capacitance being arranged between internal transmission interface 11 and ground terminal, and the second inside is high
Frequency spike filtering circuit 52 includes the second internal capacitance being arranged between internal receipt interface 12 and ground terminal, and the first outside is high
Frequency spike filtering circuit 53 includes the first external capacitive being arranged between external transmission interface 21 and ground terminal, and the second outside is high
Frequency spike filtering circuit 54 includes the second external capacitive being arranged between external reception interface 22 and ground terminal.
The specific embodiments described herein are merely examples of the spirit of the present invention.The utility model institute
Described specific embodiment can be done various modifications or additions or using similar by belonging to those skilled in the art
Mode substitute, but without departing from the spirit of the present application or beyond the scope of the appended claims.
Although internal transmission interface 11, internal receipt interface 12, external transmission interface 21, outside is used more herein
Receiving interface 22, the first current-limiting circuit 31, the second current-limiting circuit 32, the first clamp circuit 41, in the second clamp circuit 42, first
Portion's high frequency spikes filtering circuit 51, the second internal high frequency spike filtering circuit 52, the first external high frequency spike filtering circuit 53,
Two external high frequency spike filtering circuits, 54 grade terms, but it does not preclude the possibility of using other terms.Using these terms only
Merely to more easily describe and explain the essence of the utility model；Being construed as any one of the additional limitations is all
It is contrary to the spirit of the present invention.
Claims (6)
1. a kind of serial line interface protects circuit, it is arranged between internal interface and external interface, which is characterized in that the inside
Interface includes internal transmission interface (11) and internal receipt interface (12), and the external interface includes external transmission interface (21)
With external reception interface (22), the inside transmission interface (11) passes through the first current-limiting circuit (31) and external transmission interface
(21) it is connected, the internal receipt interface (12) is connected by the second current-limiting circuit (32) with external reception interface (22).
2. serial line interface according to claim 1 protects circuit, which is characterized in that first current-limiting circuit (31) and
Second current-limiting circuit (32) is resistance.
3. serial line interface according to claim 1 protects circuit, which is characterized in that the external transmission interface (21) and
First clamp circuit (41) is connected, and the external reception interface (22) is connected with the second clamp circuit (42).
4. serial line interface according to claim 3 protects circuit, which is characterized in that first clamp circuit (41) and
Second clamp circuit (42) includes the zener diode that two anodes are connected with each other, the first clamp circuit (41) and the second clamper
The cathode of one of zener diode in circuit (42) is connected with ground terminal, another in the first clamp circuit (41)
The cathode of zener diode is connected with external transmission interface (21), another zener diode in the second clamp circuit (42)
Cathode be connected with external reception interface (22).
5. the serial line interface protection circuit according to claim 1 or 2 or 3 or 4, which is characterized in that the inside is sent
Interface (11) is connected with the first internal high frequency spike filtering circuit (51), and the internal receipt interface (12) and the second inside are high
Frequency spike filtering circuit (52) is connected, the external transmission interface (21) and first external high frequency spike filtering circuit (53) phase
Even, the external reception interface (22) is connected with the second external high frequency spike filtering circuit (54).
6. serial line interface according to claim 5 protects circuit, which is characterized in that the first internal high frequency spike filter
Except circuit (51) includes being arranged on first internal capacitance of the internal transmission interface (11) between ground terminal, inside described second
High frequency spikes filtering circuit (52) includes being arranged on second internal capacitance of the internal receipt interface (12) between ground terminal, described
The first external high frequency spike filtering circuit (53) include be arranged on external transmission interface (21) between ground terminal first outside
Portion's capacitance, the second external high frequency spike filtering circuit (54) include being arranged on external reception interface (22) and ground terminal it
Between the second external capacitive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721428988.7U CN207410024U (en) | 2017-10-31 | 2017-10-31 | Serial line interface protects circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721428988.7U CN207410024U (en) | 2017-10-31 | 2017-10-31 | Serial line interface protects circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207410024U true CN207410024U (en) | 2018-05-25 |
Family
ID=62408483
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721428988.7U Expired - Fee Related CN207410024U (en) | 2017-10-31 | 2017-10-31 | Serial line interface protects circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207410024U (en) |
-
2017
- 2017-10-31 CN CN201721428988.7U patent/CN207410024U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180525 Termination date: 20201031 |