CN207382435U - A kind of more display mainboards and the lottery tickets machine control system using the mainboard - Google Patents

Abstract

A kind of more display mainboards and the lottery tickets machine control system using the mainboard, mainboard include：Polytype display interface；First VGA converting units connect a USB interface, by the signals of DDI all the way of input be converted to all the way VGA signal outputs to a USB interface；2nd VGA converting units, connect two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA signal outputs to two USB interfaces；LVDS converting units connect a LVDS interface, by the signals of EDP all the way of input be converted to all the way LVDS signal outputs to a LVDS interface；Processor, the exportable signals of EDP all the way to LVDS converting units, PCIE signal to the 2nd VGA converting units and three road DDI signals of output are respectively to the first VGA converting units, a HDMI interface, a DP interface all the way.

Description

A kind of more display mainboards and the lottery tickets machine control system using the mainboard

Technical field

The utility model is related to display field more particularly to a kind of more display mainboards and the lottery tickets machine controls using the mainboard System processed.

Background technology

Number or simulative display interface, HDMI, DP, LVDS, VGA etc. can be all left on usual computer main board, is passed through These interfaces can transmit and show the important information stored in computer.Since the operation principle of different display interfaces is different, lead Causing its effect, there is also larger differences with application field.If HDMI is a kind of digitized audio/video interface, can pass simultaneously Audio and video frequency signal is sent, in high-definition digital display field using very extensive.And LVDS interface is that LCD Panel are general connects Mouth standard, technological core are using extremely low voltage swing high speed differential transmission data, can be realized point-to-point or point-to-points Connection, there is low-power consumption, low error rate, low crosstalk and Low emissivity, be mostly used for the liquid crystal display of 7 cun of dimensions above On screen.And VGA is then a kind of video transmission standard of simulation, has many advantages, such as that high resolution, display rate be fast, various colors, It is widely applied in color monitor field, but does not support audio transmission.

The display signal that general computer processor provides all is DDI (or EDP) digital signal, but many display interfaces cannot It is directly shown using digital signal, if USB interface is to transmit display by analog signal, and LVDS interface is then logical Cross low-voltage differential signal.In addition, the species of display interface is often extremely limited on many computer main boards, usually only provides one and arrive Two kinds of display interfaces (HDMI or VGA), for needing for multidisplay equipment or server, there is many limitations for this.Than Such as in some lottery selling stations, lottery tickets machine control system needs to support the use of multiple displays simultaneously, and this requires computer masters Plate can possess more display resources.Finally with the fast development of information technology and mobile Internet, online (scene) regards Frequency live streaming becomes more and more popular.Based on this, fine definition, the demand of smooth net cast equipment are also more and more vigorous.It is same with this When, these equipment are to showing that the transmission speed of signal also proposed higher requirement.

Utility model content

The technical problems to be solved in the utility model is, for the drawbacks described above of the prior art, provides one kind and shows more Mainboard and the lottery tickets machine control system using the mainboard.

Technical solution is used by the utility model solves its technical problem：A kind of more display mainboards of construction, including：

Polytype display interface, including USB interface, HDMI interface, DP interfaces, LVDS interface；

Processor, the exportable signals of EDP all the way, all the way PCIE signal, all the way DDI signals to showing signal conversion module, And two-way DDI signals are exported to a HDMI interface and a DP interface；

Show signal conversion module, the signals of DDI all the way for that will input be converted to all the way VGA signal outputs to an institute State USB interface and by the PCIE signal all the way of input be converted to two-way VGA signal outputs to described two USB interfaces and By the signals of EDP all the way of input be converted to all the way LVDS signal outputs to a LVDS interface.

In more display mainboards described in the utility model, the display signal conversion module specifically includes：

First VGA converting units, connect a USB interface, and the signals of DDI all the way for that will input are converted to VGA all the way Signal output is to one USB interface；

2nd VGA converting units, connect two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA Signal output is to described two USB interfaces.

LVDS converting units, connect a LVDS interface, and the signals of EDP all the way for that will input are converted to LVDS letters all the way Number output is to a LVDS interface.

In more display mainboards described in the utility model, the first VGA converting units include CH7517 chips, corresponding USB interface is the stand of 15 pins, per DDI signals all the way by 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 heat Plug detection signal composition, wherein：2 pairs of image transmission signals in DDI signals are delivered to respectively via a capacitance all the way 31, No. 32 pins and 34, No. 35 pins, 1 pair of auxiliary channel signal of CH7517 chips are delivered to respectively via a capacitance 3, No. 4 pins of CH7517 chips, 1 hot plug detection signal are delivered to No. 38 pins of CH7517 chips, and CH7517 cores No. 38 pins of piece are also via resistance eutral grounding, and 28,26, No. 24 pins of CH7517 chips are respectively correspondingly via a magnetic Pearl is connected to the 1 of USB interface, 2, No. 3 pin, and 13,14,20,22,21, No. 19 pins of CH7517 chips correspond respectively 4,11,12,13,14, No. 15 pins for being connected to USB interface.

In more display mainboards described in the utility model, the 2nd VGA converting units include SM750 chips, and corresponding two A USB interface is the stand of 15 pins, and pin TX+, TX-, RX+, RX-, REFCLK+, REFCLK- of SM750 chips are received PCIE signal all the way, pin R0, G0, B0 of SM750 chips are connected to a VGA via a magnetic bead correspondingly respectively and connect 1,2, No. 3 pin of mouth, and pin PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 difference of CH7517 chips are one-to-one It is connected to 12,13,14, No. 15 pins of a USB interface；Pin R1, G1, B1 difference of SM750 chips are one-to-one It is connected to 1,2, No. 3 pin of another USB interface via a magnetic bead, and pin SDA, FP_HSYNC of CH7517 chips, FP_VSYNC, SCL are connected to the 12 of another USB interface, 13,14, No. 15 pins correspondingly respectively.

In more display mainboards described in the utility model, LVDS converting units include CH7511B chips, per EDP all the way Signal is made of 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 hot plug detection signal, and a LVDS interface includes The LVDS stands of two 20 pins, wherein：2 pairs of image transmission signals in EDP signals convey respectively via a capacitance all the way To pin DP0P, DP0N and DP1P, the DP1N of CH7511B chips, 1 pair of auxiliary channel signal is delivered to respectively via a capacitance Pin AUXP, AUXN of CH7511B chips, 1 hot plug detection signal are connected to the source electrode of a metal-oxide-semiconductor, the source of metal-oxide-semiconductor Pole, drain electrode are respectively via a resistance eutral grounding, and the grid of metal-oxide-semiconductor connects high level, and the drain electrode of metal-oxide-semiconductor is additionally coupled to CH7511B cores The pin HPDET of piece；Pin LDC0P-LDC3P, pin LDC0N-LDC3N, pin LL1CP and the pin of CH7511B chips LL1CN is connected to the corresponding pin of one of LVDS stands, pin LDC4P-LDC7P, the pin LDC4N- of CH7511B chips LDC7N, pin LL2CP and pin LL2CN are connected to the corresponding pin of another LVDS stand,

In more display mainboards described in the utility model, per DDI signals all the way by 4 pairs of image transmission signals, 1 pair it is auxiliary Channel signal and 1 hot plug detection signal composition are helped,

Wherein 4 pairs of pins of the HDMI interface receive 4 pairs of image transmission signals, the HDMI via a capacitance respectively Wherein 1 pair of pin of interface directly receives 1 pair of auxiliary channel signal, and wherein 1 pin of the HDMI interface directly receives heat Plug detection signal；

Wherein 4 pairs of pins of the DP interfaces receive 4 pairs of image transmission signals, the DP interfaces via a capacitance respectively Wherein 1 pair of pin receive 1 pair of auxiliary channel signal via capacitance respectively, wherein 1 pin of the DP interfaces is direct Receive hot plug detection signal.

In more display mainboards described in the utility model, the processor is the Skylake-S processors of Intel.

In more display mainboards described in the utility model, the HDMI interface and the DP interfaces use it is two-in-one on Lower floor's display interface.

The invention also discloses a kind of lottery tickets machine control system, including：

Using the control system of mainboard as described above；

Three VGA displays connect one to one with three USB interfaces on mainboard, and one of VGA displays supply work Make personnel's use, other two VGA display selects note for user；

One HDMI display, is connected with the HDMI interface on mainboard, is launched for advertisement；

One DP display is connected with the DP interfaces on mainboard, is launched for advertisement；

LVDS display screens are connected with the LVDS interface on mainboard, are reported for lottery information.

The more display mainboards for implementing the utility model and the lottery tickets machine control system using the mainboard have beneficial below Effect：The mainboard of the utility model can support high-speed transfer and a variety of displays, utilize existing DDI/EDP/PCIE in processor Signal resource, conversion export a variety of different types of display signals, can specifically support to make while 4 types, 6 displays With at low cost, all display interfaces are more convenient to use on same mainboard, and the integrated level of device is high.

Description of the drawings

It in order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only It is the embodiment of the utility model, for those of ordinary skill in the art, without creative efforts, also Other attached drawings can be obtained according to the attached drawing of offer：

Fig. 1 is the structure diagram that the utility model shows mainboard more；

Fig. 2 is HDMI interface, the interface related circuit diagrams of DP；

Fig. 3 is the circuit diagram of LVDS converting units and LVDS interface；

Fig. 4 is the circuit diagram of the first VGA converting units and a USB interface connected to it；

Fig. 5 is the circuit diagram of the 2nd VGA converting units and two USB interfaces connected to it；

Fig. 6 is the structure diagram of lottery tickets machine control system.

Specific embodiment

For the ease of understanding the utility model, the utility model is more fully retouched below with reference to relevant drawings It states.The exemplary embodiments of the utility model are given in attached drawing.But the utility model can in many different forms come in fact It is existing, however it is not limited to embodiment described herein.On the contrary, the purpose for providing these embodiments is the public affairs made to the utility model Open content more thorough and comprehensive.

It should be noted that " connected " or " connection " described in the utility model, not only includes two entities are straight Connect it is connected, also include by having other entities of beneficial improvement to be indirectly connected.

Unless otherwise defined, all of technologies and scientific terms used here by the article is led with belonging to the technology of the utility model The normally understood meaning of technical staff in domain is identical.It is simply in the term used in the description of the utility model herein The purpose of description specific embodiment, it is not intended that in limitation the utility model.

The term comprising ordinal number such as " first " that is used in this specification, " second " can be used for illustrating various inscapes, But these inscapes are from the restriction of these terms.It is only that using the purpose of these terms and distinguishes an inscape In other inscapes.For example, on the premise of the interest field of the utility model is not departed from, the first inscape can be named For the second inscape, similarly, the second inscape can also be named as the first inscape.

The total thinking of the utility model is：A kind of more display mainboards of construction, including：

Polytype display interface, including USB interface, HDMI interface, DP interfaces, LVDS interface；

Processor, the exportable signals of EDP all the way, all the way PCIE signal, all the way DDI signals to showing signal conversion module, And two-way DDI signals are exported to a HDMI interface and a DP interface；

Show signal conversion module, the signals of DDI all the way for that will input be converted to all the way VGA signal outputs to an institute State USB interface and by the PCIE signal all the way of input be converted to two-way VGA signal outputs to described two USB interfaces and By the signals of EDP all the way of input be converted to all the way LVDS signal outputs to a LVDS interface.

Wherein, the display signal conversion module specifically includes：

First VGA converting units, connect a USB interface, and the signals of DDI all the way for that will input are converted to VGA all the way Signal output is to one USB interface；

2nd VGA converting units, connect two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA Signal output is to described two USB interfaces.

LVDS converting units, connect a LVDS interface, and the signals of EDP all the way for that will input are converted to LVDS letters all the way Number output is to a LVDS interface.

In order to better understand the above technical scheme, in conjunction with appended figures and specific embodiments to upper It states technical solution to be described in detail, it should be understood that the specific features in the utility model embodiment and embodiment are to this Apply for the detailed description of technical solution rather than the restriction to technical scheme, in the case where there is no conflict, this practicality Technical characteristic in new embodiment and embodiment can be mutually combined.

With reference to figure 1, the processor is the Skylake-S processors of Intel, is put down based on the newest Skylake-S of Intel The rate highest of platform, DDI rates and PCIE are respectively up to 5.4Gb/s and 8Gb/s.Its exportable signals of EDP all the way, all the way PCIE Signal, three road DDI signals (DDIB, DDIC, DDID signal in such as figure).Wherein per road DDI, EDP signal by 4 pairs of image transmissions Signal DDI_TX, 1 couple of auxiliary channel signal DDI_AUX and 1 hot plug detection signal HPD composition.

First VGA converting units include CH7517 chips, and the 2nd VGA converting units include SM750 chips, and LVDS conversions are single Member includes CH7511B chips.

As shown in Figure 1, the utility model is first by 1 road DDI in Skylake-S processors and 1 road EDP numerical monitors letter Number be separately input in CH7517 and CH7511B conversion chips, using both chips, can convert out VGA displays and Analog signal and low-voltage differential signal needed for LVDS liquid crystal displays；The other 2 road DDI signals that processor provides then directly input Onto HDMI, DP interface；1 tunnel PCIE signal in processor has been input in SM750 chips, has expanded 2 road VGA letters again Number.Therefore using this method configuration mainboard can external a variety of displays, and up to 4 kinds of the species of external-connection displayer, quantity are more Up to 6 displays：3 VGA displays, 1 HDMI display, 1 DP display, 1 LVDS display screen.

The display with regard to all kinds of display signals is described in detail separately below.

1) HDMI and DP are shown

As shown in Fig. 2 circuits, HDMI interface is by 4 pairs of image transmission signal DDIC_TX_DP (N), 1 pair of SMBUS signal HDMI_SCL/SDA and 1 HPD signal composition, and DP interfaces are then by 4 pairs of image transmission signal DDID_TX_DP (N), 1 pair of auxiliary Channel signal DDID_AUX_DP (N) and 1 and HPD signal composition, can be with the number of external 2 high definitions by the two display interfaces Word display.In the present embodiment, the two-in-one levels display interface of the HDMI interface and DP interfaces use.

Specifically, as shown in Fig. 2, the HDMI interface include 19 pins, wherein 4 pairs of pins 1 and 3,4 and 6,7 and 9, 10 and 12 receive 4 pairs of image transmissions via capacitance C262, C263, C266, C264, C265, C267, C268, a C269 respectively Signal, wherein 1 pair of pin 15,16 of the HDMI interface directly receive 1 pair of auxiliary channel signal, and the HDMI interface is wherein 1 pin 19 directly receives hot plug detection signal.

Wherein 4 couples of pins P1 and P3, P4 and P6, P7 and P8, P10 and the P12 of DP interfaces respectively via a capacitance C225, C226, C227, C228, C229, C230, C231, C234 receive 4 pairs of image transmission signals, wherein 1 couple of pin P15 of DP interfaces 1 pair of auxiliary channel signal is received via capacitance C235, a C236 respectively with P17, wherein 1 pin P18 of DP interfaces is direct Receive hot plug detection signal.

2) LVDS is shown

One LVDS interface includes the LVDS stands of two 20 pins：LVDS1 stands and LVDS2 stands.LVDS liquid crystal displays It is a kind of common display, general processor does not provide the low-voltage differential signal needed for it, and the utility model utilizes EDP Signal and CH7511B chips are converted.As shown in Fig. 3 circuits, by 2 couples of image transmission signal EDP_TX_ in EDP signals DP (N) and 1 pair of auxiliary channel signal EDP_AUX_DP (N) are input in CH7511B chips, which can export 1 group of bilateral Low-voltage differential signal LVDS_D (0~the 7) _ P/N in road, and by LVDS_D (0~7) _ P/N signals be separately input to LVDS1 and On LVDS2 stands, you can external LVDS liquid crystal displays, the display resolution of liquid crystal display is then by 4 GPIO signals in chip To set.

Specifically, such as Fig. 3, U21 represents CH7511B chips, and 2 pairs of images in the signals of EDP all the way of processor output pass Defeated signal respectively via capacitance C258, C256, C261, a C260 be delivered to CH7511B chips pin DP0P, DP0N and DP1P, DP1N, 1 pair of auxiliary channel signal are delivered to the pin of CH7511B chips via capacitance C257, a C259 respectively AUXP, AUXN, 1 hot plug detection signal are connected to the source electrode of the metal-oxide-semiconductor Q24 of a N-channel, the source electrode of metal-oxide-semiconductor Q24 via One resistance R400 ground connection, the drain electrode of metal-oxide-semiconductor Q24 are grounded via a resistance R401, and the grid of metal-oxide-semiconductor Q24 connects high level, The drain electrode of metal-oxide-semiconductor Q24 is additionally coupled to the pin HPDET of CH7511B chips；The pin LDC0P-LDC3P of CH7511B chips, draw Foot LDC0N-LDC3N, pin LL1CP and pin LL1CN are connected to the corresponding pin of LVDS1 stands, and CH7511B chips draw The correspondence that foot LDC4P-LDC7P, pin LDC4N-LDC7N, pin LL2CP and pin LL2CN are connected to LVDS2 stands is drawn Foot, specific connection relation is with reference to figure 3.

3) VGA is shown

With reference to figure 4-5, two kinds of VGA display modes are present embodiments provided, support 3 USB interfaces in total：VGA 1、VGA 2nd, VGA 3 are the stand of 15 pins.

With reference to figure 4, U6 represents CH7517 chips in figure, and first way is to utilize the DDI signals all the way in processor (DDIB), as illustrated in the circuit of figure 4,2 pairs of transmission signal DDIB_TX0 (1) _ DP/N and 1 pair in DDI signals (DDIB) are aided in Channel signal DDIB_AUX_DP/N is input in CH7517 chips, by conversion chip, can be provided needed for VGA displays Red (CRT_RED), green (CRT_GREEN), blue (CRT_BLUE) tricolor signal and ranks synchronizing signal (HSYNC and VSYNC).Then these analog signals of output are connected to VGA 1, it is possible to external common VGA displays.

Specifically, it is passed through respectively with reference to 2 pairs of image transmission signals in the signals of DDI all the way (DDIB) that figure 4, processor export The 31 of CH7517 chips, No. 32 pins and 34, No. 35 pins are delivered to by capacitance C183, C185, C191, a C190,1 pair auxiliary Channel signal is helped to be delivered to the 3 of CH7517 chips, No. 4 pins, 1 hot plug detection via capacitance C188, a C189 respectively Signal is delivered to No. 38 pins of CH7517 chips, and No. 38 pins of CH7517 chips are also grounded via resistance R315, 28,26, No. 24 pins of CH7517 chips respectively correspondingly via magnetic bead FB6, FB7, a FB8 be connected to VGA1 1, 2nd, No. 3 pins, 13,14,20,22,21, No. 19 pins of CH7517 chips be connected to correspondingly respectively VGA1 4,11, 12nd, 13,14, No. 15 pins.

Another mode is to extend VGA signals using the PCIE signal all the way in processor, as shown in Fig. 5 circuits, U4 represents SM750-64 chips in figure, and 1 road PCIE3.0 signals are input in SM750-64 chips, can expand 2 road VGA Signal (VGA0 and VGA1), VGA0 and VGA1 signals are separately input on VGA 2 and VGA 3, can be extended 2 VGA again and be shown Show device.

Specifically, with reference to figure 5, pin TX+, TX-, RX+, RX-, REFCLK+, REFCLK- of SM750 chips are received all the way PCIE signal, pin R0, G0, B0 of SM750 chips are connected respectively via magnetic bead FB31, FB30, a FB29 correspondingly 1,2, No. 3 pin to VGA2, and pin PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 difference one of CH7517 chips is a pair of That answers is connected to 12,13,14, No. 15 pins of VGA2；Pin R1, G1, B1 of SM750 chips are respectively correspondingly via one A magnetic bead FB28, FB27, FB26 are connected to the 1 of VGA3,2, No. 3 pin, and pin SDA, FP_HSYNC of CH7517 chips, FP_VSYNC, SCL are connected to the 12 of VGA3,13,14, No. 15 pins correspondingly respectively.

It should be noted that each display interface in the utility model uses signal money different in processor Source does not conflict each other, therefore the utility model can at most support 6 displays simultaneously.

With reference to figure 6, the invention also discloses a kind of lottery tickets machine control systems.

With the rapid development of Chinese lottery industry, domestic Machine lootery ticket vending point is also more and more, and collects number selection, color The multi-functional lottery tickets machine for the one such as ticket information is reported and advertisement is launched also begins to appear in some large-scale Machine lootery ticket vending points.This Control mainboard inside kind lottery tickets machine requirement can support multiple displays, facilitate the use of staff and lottery fan.Therefore, this reality Above-mentioned mainboard is applied in this lottery tickets machine control system with new, system includes：

Using the control system of mainboard as described above；

Three VGA displays connect one to one with three USB interfaces on mainboard；

One HDMI display, is connected with the HDMI interface on mainboard；

One DP display is connected with the DP interfaces on mainboard；

LVDS display screens are connected with the LVDS interface on mainboard.

As it can be seen that 6 interfaces of the lottery tickets machine control system of the utility model have all been connected on corresponding display, for showing Show different contents.The VGA displays wherein converted by CH7517 chips are used for staff's print lottery tickets, and by SM750 cores 2 VGA displays of piece extension are then to lottery fan note to be selected to use.Except normally using operation, lottery tickets machine control system also carries The digital display interface (i.e. HDMI and DP interfaces) of two high definitions has been supplied, hall dispensing is placed on for connecing HDMI and DP display devices Advertisement.A last LVDS interface is then reported for the lottery information on the same day.It can be seen that utilize the various letters in processor Number resource extends different display interfaces, can greatly expand the display function and application range of lottery tickets machine system.

In conclusion the more display mainboards for implementing the utility model and the lottery tickets machine control system using the mainboard, tool There is following advantageous effect：The mainboard of the utility model can support high-speed transfer and a variety of displays, using existing in processor DDI/EDP/PCIE signal resources, conversion export a variety of different types of display signals, can specifically support 4 types, 6 displays It is used while device, at low cost, all display interfaces are more convenient to use on same mainboard, and device integrates Degree is high.

The embodiment of the utility model is described above in conjunction with attached drawing, but the utility model is not limited to The specific embodiment stated, above-mentioned specific embodiment is only schematical rather than restricted, this field it is common Technical staff is not departing from the utility model aims and scope of the claimed protection situation under the enlightenment of the utility model Under, many forms can be also made, these are belonged within the protection of the utility model.

Claims (9)

1. a kind of more display mainboards, which is characterized in that including：

Polytype display interface, including USB interface, HDMI interface, DP interfaces, LVDS interface；

Processor, the exportable signals of EDP all the way, all the way PCIE signal, all the way DDI signals to show signal conversion module and Two-way DDI signals are exported to a HDMI interface and a DP interface；

Show signal conversion module, the signals of DDI all the way for that will input are converted to described in VGA signal outputs to one all the way USB interface and by the PCIE signal all the way of input be converted to two-way VGA signal outputs to described two USB interfaces and will The signals of EDP all the way of input be converted to all the way LVDS signal outputs to a LVDS interface.

2. more display mainboards according to claim 1, which is characterized in that the display signal conversion module specifically includes：

First VGA converting units, connect a USB interface, and the signals of DDI all the way for that will input are converted to VGA signals all the way It exports to one USB interface；

2nd VGA converting units, connect two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA signals It exports to described two USB interfaces；

LVDS converting units connect a LVDS interface, and it is defeated that the signals of EDP all the way for that will input are converted to LVDS signals all the way Go out to a LVDS interface.

3. more display mainboards according to claim 2, which is characterized in that the first VGA converting units include CH7517 chips, Corresponding USB interface is the stand of 15 pins, per DDI signals all the way by 4 pairs of image transmission signals, 1 pair of auxiliary channel signal It is formed with 1 hot plug detection signal, wherein：2 pairs of image transmission signals all the way in DDI signals are defeated via a capacitance respectively It send to the 31 of CH7517 chips, No. 32 pins and 34, No. 35 pins, 1 pair of auxiliary channel signal conveys respectively via a capacitance 3, No. 4 pins to CH7517 chips, 1 hot plug detection signal are delivered to No. 38 pins of CH7517 chips, and CH7517 No. 38 pins of chip are also via resistance eutral grounding, and 28,26, No. 24 pins of CH7517 chips are respectively correspondingly via one Magnetic bead is connected to the 1 of USB interface, 2, No. 3 pin, and 13,14,20,22,21, No. 19 pins difference one of CH7517 chips is a pair of That answers is connected to 4,11,12,13,14, No. 15 pins of USB interface.

4. more display mainboards according to claim 2, which is characterized in that the 2nd VGA converting units include SM750 chips, Corresponding two USB interfaces are the stand of 15 pins, pin TX+, TX- of SM750 chips, RX+, RX-, REFCLK+, REFCLK- receives PCIE signal all the way, and pin R0, G0, B0 of SM750 chips are connected respectively via a magnetic bead correspondingly 1,2, No. 3 pin to a USB interface, and PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 points of the pin of CH7517 chips It is not connected to 12,13,14, No. 15 pins of a USB interface correspondingly；R1, G1, B1 points of the pin of SM750 chips It is not connected to 1,2, No. 3 pin of another USB interface, and the pin of CH7517 chips via a magnetic bead correspondingly SDA, FP_HSYNC, FP_VSYNC, SCL are connected to the 12 of another USB interface, 13,14, No. 15 and draw correspondingly respectively Foot.

5. more display mainboards according to claim 2, which is characterized in that LVDS converting units include CH7511B chips, often EDP signals are made of 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 hot plug detection signal all the way, a LVDS Interface includes the LVDS stands of two 20 pins, wherein：2 pairs of image transmission signals in EDP signals are respectively via one all the way Capacitance is delivered to pin DP0P, DP0N and DP1P, the DP1N of CH7511B chips, and 1 pair of auxiliary channel signal is respectively via an electricity Hold pin AUXP, the AUXN for being delivered to CH7511B chips, 1 hot plug detection signal is connected to the source electrode of a metal-oxide-semiconductor, MOS The source electrode of pipe drains respectively via a resistance eutral grounding, and the grid of metal-oxide-semiconductor connects high level, and the drain electrode of metal-oxide-semiconductor is additionally coupled to The pin HPDET of CH7511B chips；Pin LDC0P-LDC3P, pin LDC0N-LDC3N, the pin LL1CP of CH7511B chips And pin LL1CN is connected to the corresponding pin of one of LVDS stands, the pin LDC4P-LDC7P of CH7511B chips, draws Foot LDC4N-LDC7N, pin LL2CP and pin LL2CN are connected to the corresponding pin of another LVDS stand.

6. more display mainboards according to claim 1, which is characterized in that believed per DDI signals all the way by 4 pairs of image transmissions Number, 1 pair of auxiliary channel signal and 1 hot plug detection signal composition,

Wherein 4 pairs of pins of the HDMI interface receive 4 pairs of image transmission signals, the HDMI interface via a capacitance respectively Wherein 1 pair of pin directly receive 1 pair of auxiliary channel signal, wherein 1 pin of the HDMI interface directly receives hot plug Detect signal；

Wherein 4 pairs of pins of the DP interfaces receive 4 pairs of image transmission signals via capacitance respectively, the DP interfaces its In 1 pair of pin receive 1 pair of auxiliary channel signal via capacitance respectively, wherein 1 pin of the DP interfaces directly receives Hot plug detects signal.

7. more display mainboards according to claim 1, which is characterized in that the processor is at the Skylake-S of Intel Manage device.

8. more display mainboard according to claim 1, which is characterized in that the HDMI interface and the DP interfaces used Two-in-one levels display interface.

9. a kind of lottery tickets machine control system, which is characterized in that including：

Using the control system of any one of the claim 1-8 mainboards；

Three VGA displays connect one to one with three USB interfaces on mainboard, and one of VGA displays supply work people Member uses, other two VGA display selects note for user；

One HDMI display, is connected with the HDMI interface on mainboard, is launched for advertisement；

One DP display is connected with the DP interfaces on mainboard, is launched for advertisement；

LVDS display screens are connected with the LVDS interface on mainboard, are reported for lottery information.