CN109495696A - A kind of more display mainboards and the lottery ticket machine control system using the mainboard - Google Patents
A kind of more display mainboards and the lottery ticket machine control system using the mainboard Download PDFInfo
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- CN109495696A CN109495696A CN201710811098.2A CN201710811098A CN109495696A CN 109495696 A CN109495696 A CN 109495696A CN 201710811098 A CN201710811098 A CN 201710811098A CN 109495696 A CN109495696 A CN 109495696A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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Abstract
It shows mainboard the invention discloses one kind more and using the lottery ticket machine control system of the mainboard, mainboard includes: a plurality of types of display interfaces；First VGA converting unit connects a USB interface, and the signal of DDI all the way of input is converted to VGA signal all the way and is exported to a USB interface；2nd VGA converting unit connects two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA signal and exports to two USB interfaces；LVDS converting unit connects a LVDS interface, and the signal of EDP all the way of input is converted to LVDS signal all the way and is exported to a LVDS interface；Processor, the exportable signal of EDP all the way to LVDS converting unit, all the way PCIE signal to the 2nd VGA converting unit, and three road DDI signals of output are respectively to the first VGA converting unit, a HDMI interface, a DP interface.Mainboard of the invention can support high-speed transfer and a variety of displays, and using DDI/EDP/PCIE signal resource existing in processor, conversion exports a variety of different types of display signals, and at low cost, the integrated level of device is high.
Description
Technical field
The present invention relates to display fields, more particularly to a kind of more display mainboards and the lottery tickets machine control system using the mainboard
System.
Background technique
It all can there are numbers or simulative display interface, HDMI, DP, LVDS, VGA etc. to pass through on usual computer main board
These interfaces can transmit and show the important information stored in computer.Since the working principle of different display interfaces is different, lead
Causing its effect with application field, there is also biggish differences.If HDMI is a kind of digitized audio/video interface, can pass simultaneously
Audio and video frequency signal is sent, in high-definition digital display field using very extensive.And LVDS interface is that LCD Panel is general connects
Mouth standard, technological core are may be implemented point-to-point or point-to-points using extremely low voltage swing high speed differential transmission data
Connection, have the characteristics that low-power consumption, low error rate, low crosstalk and Low emissivity, be mostly used for the liquid crystal display of 7 cun of dimensions above
On screen.And VGA is then a kind of video transmission standard of simulation, has many advantages, such as that high resolution, display rate be fast, various colors,
It is widely applied in color monitor field, but does not support audio transmission.
The display signal that general computer processor provides all is DDI (or EDP) digital signal, but many display interfaces cannot
It is directly shown using digital signal, if USB interface is to transmit display by analog signal, and LVDS interface is then logical
Cross low-voltage differential signal.In addition, the type of display interface is often extremely limited on many computer main boards, usually only provides one and arrive
Two kinds of display interfaces (HDMI or VGA), for needing for multidisplay equipment or server, there is many limitations for this.Than
Such as in some lottery selling stations, lottery ticket machine control system needs while supporting the use of multiple displays, and this requires computer masters
Plate can possess more display resources.Finally with the fast development of information technology and mobile Internet, online (scene) view
Frequency live streaming becomes more and more popular.Based on this, fine definition, the demand of smooth net cast equipment are also more and more vigorous.It is same with this
When, higher requirements are also raised for transmission speed of these equipment to display signal.
Summary of the invention
The technical problem to be solved in the present invention is that in view of the above drawbacks of the prior art, providing one kind and showing mainboard more
And the lottery ticket machine control system using the mainboard.
The technical solution adopted by the present invention to solve the technical problems is: constructing one kind and shows mainboard more, comprising:
A plurality of types of display interfaces, including USB interface, HDMI interface, DP interface, LVDS interface；
Processor, the exportable signal of EDP all the way, all the way PCIE signal, all the way DDI signal to showing signal conversion module,
And two-way DDI signal is exported to a HDMI interface and a DP interface；
Show signal conversion module, the signal of DDI all the way for that will input is converted to VGA signal all the way and exports to an institute
USB interface is stated, and the PCIE signal all the way of input is converted into two-way VGA signal and is exported to described two USB interfaces, and
The signal of EDP all the way of input is converted to LVDS signal all the way to export to a LVDS interface.
In more display mainboards of the present invention, the display signal conversion module is specifically included:
First VGA converting unit connects a USB interface, and the signal of DDI all the way for that will input is converted to VGA all the way
Signal is exported to one USB interface；
2nd VGA converting unit connects two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA
Signal is exported to described two USB interfaces.
LVDS converting unit connects a LVDS interface, and the signal of EDP all the way for that will input is converted to LVDS letter all the way
Number output is to a LVDS interface.
In more display mainboards of the present invention, the first VGA converting unit includes CH7517 chip, and corresponding VGA connects
Mouth is the stand of 15 pins, per DDI signal all the way by 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 hot plug
Detect signal composition, in which: 2 pairs of image transmission signals in DDI signal are delivered to CH7517 via a capacitor respectively all the way
31, No. 32 pins and 34, No. 35 pins, 1 pair of auxiliary channel signal of chip are delivered to CH7517 core via a capacitor respectively
3, No. 4 pins of piece, 1 hot plug detection signal are delivered to No. 38 pins of CH7517 chip, and No. 38 of CH7517 chip
Also via resistance eutral grounding, 28,26, No. 24 pins of CH7517 chip are connected to via a magnetic bead pin correspondingly respectively
13,14,20,22,21, No. 19 pins of 1,2, No. 3 pin of USB interface, CH7517 chip are connected to correspondingly respectively
4,11,12,13,14, No. 15 pins of USB interface.
In more display mainboards of the present invention, the 2nd VGA converting unit includes SM750 chip, corresponding two VGA
Interface is the stand of 15 pins, and pin TX+, TX-, RX+, RX-, REFCLK+, REFCLK- of SM750 chip are received all the way
PCIE signal, pin R0, G0, B0 of SM750 chip are connected to a USB interface via a magnetic bead correspondingly respectively
1,2, No. 3 pins, and pin PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 of CH7517 chip one-to-one connection respectively
To 12,13,14, No. 15 pins of a USB interface；Pin R1, G1, B1 of SM750 chip respectively correspondingly via
One magnetic bead is connected to the 1 of another USB interface, 2, No. 3 pin, and pin SDA, FP_HSYNC, FP_ of CH7517 chip
VSYNC, SCL are connected to the 12 of another USB interface, 13,14, No. 15 pins correspondingly respectively.
In more display mainboards of the present invention, LVDS converting unit includes CH7511B chip, per EDP signal all the way
It is made of 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 hot plug detection signal, a LVDS interface includes two
The LVDS stand of 20 pins, in which: 2 pairs of image transmission signals in EDP signal are delivered to via a capacitor respectively all the way
Pin DP0P, DP0N and DP1P, the DP1N of CH7511B chip, 1 pair of auxiliary channel signal are delivered to via a capacitor respectively
Pin AUXP, AUXN of CH7511B chip, 1 hot plug detection signal are connected to the source electrode of a metal-oxide-semiconductor, the source of metal-oxide-semiconductor
Pole, drain electrode are respectively via a resistance eutral grounding, and the grid of metal-oxide-semiconductor connects high level, and the drain electrode of metal-oxide-semiconductor is additionally coupled to CH7511B core
The pin HPDET of piece；Pin LDC0P-LDC3P, pin LDC0N-LDC3N, pin LL1CP and the pin of CH7511B chip
LL1CN is connected to the corresponding pin of one of LVDS stand, pin LDC4P-LDC7P, the pin LDC4N- of CH7511B chip
LDC7N, pin LL2CP and pin LL2CN are connected to the corresponding pin of another LVDS stand,
It is logical by 4 pairs of image transmission signals, 1 pair of auxiliary per DDI signal all the way in more display mainboards of the present invention
Road signal and 1 hot plug detection signal composition,
Wherein 4 pairs of pins of the HDMI interface receive 4 pairs of image transmission signals, the HDMI via a capacitor respectively
Wherein 1 pair of pin of interface directly receives 1 pair of auxiliary channel signal, and wherein 1 pin of the HDMI interface directly receives heat
Plug detection signal；
Wherein 4 pairs of pins of the DP interface receive 4 pairs of image transmission signals, the DP interface via a capacitor respectively
Wherein 1 pair of pin receive 1 pair of auxiliary channel signal via capacitor respectively, wherein 1 pin of the DP interface is direct
It receives hot plug and detects signal.
In more display mainboards of the present invention, the processor is the Skylake-S processor of Intel.
In more display mainboards of the present invention, the two-in-one upper and lower level of the HDMI interface and DP interface use
Display interface.
The invention also discloses a kind of lottery ticket machine control systems, comprising:
Using the control system of mainboard as described above；
Three VGA displays connect one to one with three USB interfaces on mainboard, and one of VGA display is for work
Make personnel's use, other two VGA display is selected for user and infused；
One HDMI display, connect with the HDMI interface on mainboard, launches for advertisement；
One DP display is connect with the DP interface on mainboard, is launched for advertisement；
LVDS display screen is connect with the LVDS interface on mainboard, is broadcasted for lottery information.
Implement more display mainboards of the invention and the lottery ticket machine control system using the mainboard, has below beneficial to effect
Fruit: mainboard of the invention can support high-speed transfer and a variety of displays, be provided using DDI/EDP/PCIE signal existing in processor
Source, conversion export a variety of different types of display signals, use while can specifically supporting 4 seed types, 6 displays, cost
Low, all display interfaces are more convenient to use on same mainboard, and the integrated level of device is high.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings:
Fig. 1 is the structural schematic diagram that the present invention shows mainboard more；
Fig. 2 is HDMI interface, the interface related circuit diagram of DP；
Fig. 3 is the circuit diagram of LVDS converting unit and LVDS interface；
Fig. 4 is the circuit diagram of the first VGA converting unit and a USB interface connected to it；
Fig. 5 is the circuit diagram of the 2nd VGA converting unit and two USB interfaces connected to it；
Fig. 6 is the structural schematic diagram of lottery ticket machine control system.
Specific embodiment
To facilitate the understanding of the present invention, a more comprehensive description of the invention is given in the following sections with reference to the relevant attached drawings.In attached drawing
Give exemplary embodiments of the invention.But the invention can be realized in many different forms, however it is not limited to this paper institute
The embodiment of description.On the contrary, purpose of providing these embodiments is make it is more thorough and comprehensive to the disclosure.
It should be noted that heretofore described " connected " or " connection ", not only includes by two direct phases of entity
It even, also include being indirectly connected by having other entities beneficial to improvement.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool
The purpose of the embodiment of body, it is not intended that in the limitation present invention.
" first ", " second " used in this specification etc. includes that the term of ordinal number can be used for illustrating various constituent elements,
But these constituent elements are not limited by these terms.It is only that using the purpose of these terms and distinguishes a constituent element
In other constituent elements.For example, first constituent element can be named as under the premise of not departing from interest field of the invention
Two constituent elements, similarly, the second constituent element can also be named as the first constituent element.
The total thinking of the present invention is: constructing one kind and shows mainboard more, comprising:
A plurality of types of display interfaces, including USB interface, HDMI interface, DP interface, LVDS interface；
Processor, the exportable signal of EDP all the way, all the way PCIE signal, all the way DDI signal to showing signal conversion module,
And two-way DDI signal is exported to a HDMI interface and a DP interface；
Show signal conversion module, the signal of DDI all the way for that will input is converted to VGA signal all the way and exports to an institute
USB interface is stated, and the PCIE signal all the way of input is converted into two-way VGA signal and is exported to described two USB interfaces, and
The signal of EDP all the way of input is converted to LVDS signal all the way to export to a LVDS interface.
Wherein, the display signal conversion module specifically includes:
First VGA converting unit connects a USB interface, and the signal of DDI all the way for that will input is converted to VGA all the way
Signal is exported to one USB interface；
2nd VGA converting unit connects two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA
Signal is exported to described two USB interfaces.
LVDS converting unit connects a LVDS interface, and the signal of EDP all the way for that will input is converted to LVDS letter all the way
Number output is to a LVDS interface.
In order to better understand the above technical scheme, in conjunction with appended figures and specific embodiments to upper
It states technical solution to be described in detail, it should be understood that the specific features in the embodiment of the present invention and embodiment are to the application
The detailed description of technical solution, rather than the restriction to technical scheme, in the absence of conflict, the present invention are implemented
Technical characteristic in example and embodiment can be combined with each other.
With reference to Fig. 1, the processor is the Skylake-S processor of Intel, flat based on the newest Skylake-S of Intel
The rate highest of platform, DDI rate and PCIE are respectively up to 5.4Gb/s and 8Gb/s.Its exportable signal of EDP all the way, all the way PCIE
Signal, three road DDI signals (DDIB, DDIC, DDID signal in such as figure).Wherein every road DDI, EDP signal is by 4 pairs of image transmissions
Signal DDI_TX, 1 couple of auxiliary channel signal DDI_AUX and 1 hot plug detection signal HPD composition.
First VGA converting unit includes CH7517 chip, and the 2nd VGA converting unit includes SM750 chip, and LVDS conversion is single
Member includes CH7511B chip.
As shown in Figure 1, the present invention is first by the 1 road DDI and 1 road EDP digital displaying signal point in Skylake-S processor
It is not input in CH7517 and CH7511B conversion chip, using both chips, VGA display and LVDS liquid can be converted out
Analog signal and low-voltage differential signal needed for crystalline substance screen；The other 2 road DDI signal that processor provides then is directly inputted to
On HDMI, DP interface；1 tunnel PCIE signal in processor has been input in SM750 chip, has expanded 2 road VGA letter again
Number.Therefore using the mainboard of this method configuration can external a variety of displays, and up to 4 kinds of the type of external-connection displayer, quantity are more
Up to 6 displays: 3 VGA displays, 1 HDMI display, 1 DP display, 1 LVDS display screen.
The display with regard to all kinds of display signals is described in detail separately below.
1) HDMI and DP are shown
As shown in Fig. 2 circuit, HDMI interface is by 4 pairs of image transmission signal DDIC_TX_DP (N), 1 pair of SMBUS signal
HDMI_SCL/SDA and 1 HPD signal composition, and DP interface is then by 4 pairs of image transmission signal DDID_TX_DP (N), 1 pair of auxiliary
Channel signal DDID_AUX_DP (N) and 1 and HPD signal composition, can be with the number of external 2 high definitions by the two display interfaces
Word display.In the present embodiment, the two-in-one upper and lower level display interface of the HDMI interface and DP interface use.
Specifically, as shown in Fig. 2, the HDMI interface include 19 pins, wherein 4 pairs of pins 1 and 3,4 and 6,7 and 9,
10 and 12 receive 4 pairs of image transmissions via capacitor C262, C263, C266, C264, C265, C267, C268, a C269 respectively
Wherein 1 pair of pin 15,16 of signal, the HDMI interface directly receives 1 pair of auxiliary channel signal, and the HDMI interface is wherein
1 pin 19 directly receives hot plug detection signal.
Wherein 4 couples of pins P1 and P3, P4 and P6, P7 and P8, P10 and the P12 of DP interface respectively via a capacitor C225,
C226, C227, C228, C229, C230, C231, C234 receive 4 pairs of image transmission signals, wherein 1 couple of pin P15 of DP interface
1 pair of auxiliary channel signal is received via capacitor C235, a C236 respectively with P17, wherein 1 pin P18 of DP interface is direct
It receives hot plug and detects signal.
2) LVDS is shown
One LVDS interface includes the LVDS stand of two 20 pins: LVDS1 stand and LVDS2 stand.LVDS liquid crystal display
It is a kind of common display, general processor does not provide the low-voltage differential signal needed for it, and the present invention utilizes EDP signal
It is converted with CH7511B chip.As shown in Fig. 3 circuit, by 2 couples of image transmission signal EDP_TX_DP in EDP signal
(N) it is input in CH7511B chip with 1 pair of auxiliary channel signal EDP_AUX_DP (N), which can export 1 group of binary channels
Low-voltage differential signal LVDS_D (0~7) _ P/N, and by LVDS_D (0~7) _ P/N signal be separately input to LVDS1 and
On LVDS2 stand, can external LVDS liquid crystal display, the display resolution of liquid crystal display is then by 4 GPIO signals in chip
To be arranged.
Specifically, U21 indicates that CH7511B chip, 2 pairs of images in the signal of EDP all the way of processor output pass such as Fig. 3
Defeated signal respectively via capacitor C258, C256, C261, a C260 be delivered to CH7511B chip pin DP0P, DP0N and
DP1P, DP1N, 1 pair of auxiliary channel signal are delivered to the pin of CH7511B chip via capacitor C257, a C259 respectively
AUXP, AUXN, 1 hot plug detection signal are connected to the source electrode of the metal-oxide-semiconductor Q24 an of N-channel, the source electrode of metal-oxide-semiconductor Q24 via
One resistance R400 ground connection, the drain electrode of metal-oxide-semiconductor Q24 are grounded via a resistance R401, and the grid of metal-oxide-semiconductor Q24 connects high level,
The drain electrode of metal-oxide-semiconductor Q24 is additionally coupled to the pin HPDET of CH7511B chip；The pin LDC0P-LDC3P of CH7511B chip, draw
Foot LDC0N-LDC3N, pin LL1CP and pin LL1CN are connected to the corresponding pin of LVDS1 stand, and CH7511B chip draws
The correspondence that foot LDC4P-LDC7P, pin LDC4N-LDC7N, pin LL2CP and pin LL2CN are connected to LVDS2 stand is drawn
Foot, specific connection relationship refer to Fig. 3.
3) VGA is shown
With reference to Fig. 4-5, two kinds of VGA display modes are present embodiments provided, support 3 USB interfaces: VGA 1, VGA in total
2,3 VGA are the stand of 15 pins.
With reference to Fig. 4, U6 indicates CH7517 chip in figure, and first way is to utilize the DDI signal all the way in processor
(DDIB), as illustrated in the circuit of figure 4,2 pairs of transmission signal DDIB_TX0 (1) _ DP/N and 1 pair in DDI signal (DDIB) are assisted
Channel signal DDIB_AUX_DP/N is input in CH7517 chip, by conversion chip, can be provided needed for VGA display
Red (CRT_RED), green (CRT_GREEN), blue (CRT_BLUE) tricolor signal and ranks synchronization signal (HSYNC and
VSYNC).Then these analog signals of output are connected to VGA 1, so that it may external common VGA display.
Specifically, 2 pairs of image transmission signals in the signal of DDI all the way (DDIB) of processor output pass through respectively with reference to Fig. 4
The 31 of CH7517 chip, No. 32 pins and 34, No. 35 pins are delivered to by capacitor C183, C185, C191, a C190,1 pair auxiliary
Channel signal is helped to be delivered to the 3 of CH7517 chip, No. 4 pins, 1 hot plug detection via capacitor C188, a C189 respectively
Signal is delivered to No. 38 pins of CH7517 chip, and No. 38 pins of CH7517 chip are also grounded via resistance R315,
28,26, No. 24 pins of CH7517 chip respectively correspondingly via magnetic bead FB6, FB7, a FB8 be connected to VGA1 1,
2, No. 3 pins, 13,14,20,22,21, No. 19 pins of CH7517 chip be connected to correspondingly respectively VGA1 4,11,
12,13,14, No. 15 pins.
Another mode is to extend VGA signal using the PCIE signal all the way in processor, as shown in Fig. 5 circuit,
U4 indicates SM750-64 chip in figure, and 1 road PCIE3.0 signal is input in SM750-64 chip, 2 road VGA can be expanded
Signal (VGA0 and VGA1), VGA0 and VGA1 signal is separately input on VGA 2 and VGA 3, and it is aobvious can to extend 2 VGA again
Show device.
Specifically, pin TX+, TX-, RX+, RX-, REFCLK+, REFCLK- of SM750 chip are received all the way with reference to Fig. 5
PCIE signal, pin R0, G0, B0 of SM750 chip are connected via magnetic bead FB31, FB30, a FB29 correspondingly respectively
To 1,2, No. 3 pin of VGA2, and pin PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 difference one of CH7517 chip is a pair of
12,13,14, No. 15 pins for being connected to VGA2 answered；Pin R1, G1, B1 of SM750 chip are respectively correspondingly via one
A magnetic bead FB28, FB27, FB26 are connected to the 1 of VGA3,2, No. 3 pin, and pin SDA, FP_HSYNC of CH7517 chip,
FP_VSYNC, SCL are connected to the 12 of VGA3,13,14, No. 15 pins correspondingly respectively.
It should be noted that each display interface in the present invention uses signal resource different in processor, that
Do not conflict between this, therefore the present invention can at most support 6 displays simultaneously.
With reference to Fig. 6, the invention also discloses a kind of lottery ticket machine control systems.
With the rapid development of Chinese lottery industry, domestic Machine lootery ticket vending point is also more and more, and collects number selection, color
The multi-functional lottery tickets machine of the one such as the casting of ticket information and advertisement dispensing also begins to appear in the Machine lootery ticket vending point of some large sizes.This
Control mainboard inside kind lottery tickets machine requirement can support multiple displays, facilitate the use of staff and lottery fan.Therefore, this hair
Bright that above-mentioned mainboard is applied in this lottery ticket machine control system, system includes:
Using the control system of mainboard as described above；
Three VGA displays connect one to one with three USB interfaces on mainboard；
One HDMI display, connect with the HDMI interface on mainboard；
One DP display is connect with the DP interface on mainboard；
LVDS display screen is connect with the LVDS interface on mainboard.
As it can be seen that 6 interfaces of lottery ticket machine control system of the invention have all been connected on corresponding display, for showing not
Same content.The VGA display wherein converted by CH7517 chip is expanded for staff's print lottery tickets by SM750 chip
2 VGA displays of exhibition are then to select note to use to lottery fan.In addition to normally using operation, lottery ticket machine control system is additionally provided
The digital display interface (i.e. HDMI and DP interface) of two high definitions is placed on hall dispensing extensively for connecing HDMI and DP display device
It accuses.A last LVDS interface is then used for the lottery information casting on the same day.It can be seen that utilizing the various signals in processor
Resource extends different display interfaces, can greatly expand the display function and application range of lottery tickets machine system.
In conclusion implementing more display mainboards of the invention and the lottery ticket machine control system using the mainboard, have with
Down the utility model has the advantages that mainboard of the invention can support high-speed transfer and a variety of displays, DDI/EDP/ existing in processor is utilized
PCIE signal resource, conversion exports a variety of different types of display signals, while can specifically supporting 4 seed types, 6 displays
It uses, at low cost, all display interfaces are more convenient to use on same mainboard, and the integrated level of device is high.
The embodiment of the present invention is described with above attached drawing, but the invention is not limited to above-mentioned specific
Embodiment, the above mentioned embodiment is only schematical, rather than restrictive, those skilled in the art
Under the inspiration of the present invention, without breaking away from the scope protected by the purposes and claims of the present invention, it can also make very much
Form, all of these belong to the protection of the present invention.
Claims (9)
1. a kind of more display mainboards characterized by comprising
A plurality of types of display interfaces, including USB interface, HDMI interface, DP interface, LVDS interface；
Processor, the exportable signal of EDP all the way, all the way PCIE signal, all the way DDI signal to showing signal conversion module, and
Two-way DDI signal is exported to a HDMI interface and a DP interface；
Show signal conversion module, the signal of DDI all the way for that will input is converted to VGA signal all the way and exports to described in one
USB interface, and the PCIE signal all the way of input is converted into two-way VGA signal and is exported to described two USB interfaces, and will
The signal of EDP all the way of input is converted to LVDS signal all the way and exports to a LVDS interface.
2. more display mainboards according to claim 1, which is characterized in that the display signal conversion module specifically includes:
First VGA converting unit connects a USB interface, and the signal of DDI all the way for that will input is converted to VGA signal all the way
It exports to one USB interface；
2nd VGA converting unit connects two USB interfaces, and the PCIE signal all the way for that will input is converted to two-way VGA signal
It exports to described two USB interfaces；
LVDS converting unit connects a LVDS interface, and it is defeated that the signal of EDP all the way for that will input is converted to LVDS signal all the way
Out to a LVDS interface.
3. more display mainboards according to claim 2, which is characterized in that the first VGA converting unit includes CH7517 chip,
Corresponding USB interface is the stand of 15 pins, per DDI signal all the way by 4 pairs of image transmission signals, 1 pair of auxiliary channel signal
With 1 hot plug detection signal composition, in which: 2 pairs of image transmission signals all the way in DDI signal are defeated via a capacitor respectively
It send to the 31 of CH7517 chip, No. 32 pins and 34, No. 35 pins, 1 pair of auxiliary channel signal is conveyed via a capacitor respectively
To 3, No. 4 pins of CH7517 chip, 1 hot plug detection signal is delivered to No. 38 pins of CH7517 chip, and CH7517
No. 38 pins of chip are also via resistance eutral grounding, and 28,26, No. 24 pins of CH7517 chip are respectively correspondingly via one
Magnetic bead is connected to the 1 of USB interface, 2, No. 3 pin, and 13,14,20,22,21, No. 19 pins difference one of CH7517 chip is a pair of
4,11,12,13,14, No. 15 pins for being connected to USB interface answered.
4. more display mainboards according to claim 2, which is characterized in that the 2nd VGA converting unit includes SM750 chip,
Corresponding two USB interfaces are the stand of 15 pins, pin TX+, TX- of SM750 chip, RX+, RX-, REFCLK+,
REFCLK- receives PCIE signal all the way, and pin R0, G0, B0 of SM750 chip are connected via a magnetic bead correspondingly respectively
To 1,2, No. 3 pin of a USB interface, and pin PWM1, CRT_HSYNC, CRT_VSYNC, PWM0 of CH7517 chip points
It is not connected to 12,13,14, No. 15 pins of a USB interface correspondingly；Pin R1, G1, B1 of SM750 chip points
It is not connected to 1,2, No. 3 pin of another USB interface, and the pin of CH7517 chip via a magnetic bead correspondingly
SDA, FP_HSYNC, FP_VSYNC, SCL are connected to the 12 of another USB interface, 13,14, No. 15 correspondingly respectively and draw
Foot.
5. more display mainboards according to claim 2, which is characterized in that LVDS converting unit includes CH7511B chip, often
EDP signal is made of 4 pairs of image transmission signals, 1 pair of auxiliary channel signal and 1 hot plug detection signal all the way, a LVDS
Interface includes the LVDS stand of two 20 pins, in which: 2 pairs of image transmission signals in EDP signal are respectively via one all the way
Capacitor is delivered to pin DP0P, DP0N and DP1P, the DP1N of CH7511B chip, and 1 pair of auxiliary channel signal is respectively via an electricity
Hold pin AUXP, the AUXN for being delivered to CH7511B chip, 1 hot plug detection signal is connected to the source electrode of a metal-oxide-semiconductor, MOS
The source electrode of pipe drains respectively via a resistance eutral grounding, and the grid of metal-oxide-semiconductor connects high level, and the drain electrode of metal-oxide-semiconductor is additionally coupled to
The pin HPDET of CH7511B chip；Pin LDC0P-LDC3P, pin LDC0N-LDC3N, the pin LL1CP of CH7511B chip
And pin LL1CN is connected to the corresponding pin of one of LVDS stand, the pin LDC4P-LDC7P of CH7511B chip, draws
Foot LDC4N-LDC7N, pin LL2CP and pin LL2CN are connected to the corresponding pin of another LVDS stand.
6. more display mainboards according to claim 1, which is characterized in that believed per DDI signal all the way by 4 pairs of image transmissions
Number, 1 pair of auxiliary channel signal and 1 hot plug detection signal composition,
Wherein 4 pairs of pins of the HDMI interface receive 4 pairs of image transmission signals, the HDMI interface via a capacitor respectively
Wherein 1 pair of pin directly receive 1 pair of auxiliary channel signal, wherein 1 pin of the HDMI interface directly receives hot plug
Detect signal；
Wherein 4 pairs of pins of the DP interface receive 4 pairs of image transmission signals via capacitor respectively, the DP interface its
In 1 pair of pin receive 1 pair of auxiliary channel signal via capacitor respectively, wherein 1 pin of the DP interface directly receives
Hot plug detects signal.
7. more display mainboards according to claim 1, which is characterized in that the processor is at the Skylake-S of Intel
Manage device.
Show mainboard 8. according to claim 1, which is characterized in that the HDMI interface and the DP interface used more
Two-in-one upper and lower level display interface.
9. a kind of lottery ticket machine control system characterized by comprising
Using the control system of any one of the claim 1-8 mainboard；
Three VGA displays connect one to one with three USB interfaces on mainboard, and one of VGA display is for the people that works
Member uses, other two VGA display is selected for user and infused；
One HDMI display, connect with the HDMI interface on mainboard, launches for advertisement；
One DP display is connect with the DP interface on mainboard, is launched for advertisement；
LVDS display screen is connect with the LVDS interface on mainboard, is broadcasted for lottery information.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710811098.2A CN109495696A (en) | 2017-09-11 | 2017-09-11 | A kind of more display mainboards and the lottery ticket machine control system using the mainboard |
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| CN201710811098.2A CN109495696A (en) | 2017-09-11 | 2017-09-11 | A kind of more display mainboards and the lottery ticket machine control system using the mainboard |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110213506A (en) * | 2019-06-06 | 2019-09-06 | 深圳市智微智能科技开发有限公司 | A kind of embedded main board realizes the circuit and method of double LVDS display outputs |
| WO2022100143A1 (en) * | 2020-11-16 | 2022-05-19 | Wingcomm Co. Ltd. | Signal communication over an optical link |
| CN115809211A (en) * | 2022-10-19 | 2023-03-17 | 深圳市朗宇芯科技有限公司 | Motion control method and device for adaptive communication mode |
| TWI809413B (en) * | 2021-06-07 | 2023-07-21 | 德承股份有限公司 | Electronic device and method for supporting multiple peripheral devices |
-
2017
- 2017-09-11 CN CN201710811098.2A patent/CN109495696A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110213506A (en) * | 2019-06-06 | 2019-09-06 | 深圳市智微智能科技开发有限公司 | A kind of embedded main board realizes the circuit and method of double LVDS display outputs |
| WO2022100143A1 (en) * | 2020-11-16 | 2022-05-19 | Wingcomm Co. Ltd. | Signal communication over an optical link |
| TWI809413B (en) * | 2021-06-07 | 2023-07-21 | 德承股份有限公司 | Electronic device and method for supporting multiple peripheral devices |
| CN115809211A (en) * | 2022-10-19 | 2023-03-17 | 深圳市朗宇芯科技有限公司 | Motion control method and device for adaptive communication mode |
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Application publication date: 20190319 |