CN207369002U - A kind of L-band Signal-regulated kinase - Google Patents
A kind of L-band Signal-regulated kinase Download PDFInfo
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- CN207369002U CN207369002U CN201721165623.XU CN201721165623U CN207369002U CN 207369002 U CN207369002 U CN 207369002U CN 201721165623 U CN201721165623 U CN 201721165623U CN 207369002 U CN207369002 U CN 207369002U
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Abstract
The utility model discloses a kind of L-band Signal-regulated kinase, including radio frequency circuit board and control board, control board can connect host computer, radio frequency circuit board includes first via input channel and the second tunnel input channel, the first via input channel is sequentially connected the first low-noise amplifier, second low-noise amplifier, first numerical-control attenuator, first digital phase shifter and the first temperature compensation attenuator, second tunnel input channel is sequentially connected the 3rd low-noise amplifier, 4th low-noise amplifier, second numerical-control attenuator, fixed attenuator and second temperature compensator, first temperature compensator is connected combiner with the output terminal of second temperature compensator, the output terminal of the combiner connects the second digital phase shifter, output terminal is connected after 5th low-noise amplifier.The utility model compact, has 2 passage integrated levels high, fast response time, high/low temperature uniformity is good, high sensitivity, has ultra-low noise coefficient, increasing degree control function.
Description
Technical field
Signal processing technology field is the utility model is related to, is a kind of L-band Signal-regulated kinase specifically.
Background technology
According to IEEE521-2002 standards, L-band refers to radio waveband of the frequency in 1-2GHz;And the L ripples of NATO
Section then refers to 40-60GHz (wavelength 7.50-5.00mm), belongs to millimeter wave.L-band can be used for digital audio broadcasting（DAB）With
Satellite navigation system（GPS）Deng.The conditioning of progress phase and power is needed during L-band signal modulation, in the market is existing
Product generally use microstrip line realizes phase shifter plus switch, and in the case where amount of phase shift is larger, micro-strip line length is especially long, leads
Cause small product size larger.Due to the use of switch and long microstrip line, overall Insertion Loss is larger, and noise coefficient is very big, can be sensitive to complete machine
Degree adversely affects, it is impossible to increase other functions, and also each product only has a passage, when needing to use multichannel,
Generally require to purchase several product mixes uses, unfavorable casing structure arrangement.
Utility model content
The purpose of this utility model is to provide a kind of L-band Signal-regulated kinase, for solving L-band in the prior art
Signal-regulated kinase increases pass using microstrip line and realizes the problem of phase shifter causes noise coefficient big, and product in the prior art
An only passage, be applied in combination volume it is larger be unfavorable for cabinet wiring the problem of.
In order to achieve the above object, the utility model is achieved through the following technical solutions：
A kind of L-band Signal-regulated kinase, including for adjusting the power of two-way input signal and the radio circuit of phase
Plate and for powering and outputing control signals to the control board of radio frequency circuit board to the radio frequency circuit board, the control electricity
Road board communications are connected with host computer, and the radio frequency circuit board includes first via input channel and the second tunnel input channel, and described
Input channel is sequentially connected the first low-noise amplifier, the second low-noise amplifier, the first numerical-control attenuator, the first numerical control all the way
Phase shifter and the first temperature compensation attenuator, second tunnel input channel are sequentially connected the 3rd low-noise amplifier, the 4th low
Noise amplifier, the second numerical-control attenuator, fixed attenuator and second temperature compensator, first temperature compensator with it is described
The input terminal of the output terminal connection combiner of second temperature compensator, the output terminal of the combiner are connected with the second numerical control phase shift
Device, second digital phase shifter connect the 5th low-noise amplifier, and the 5th low-noise amplifier connects radio frequency circuit board
Output terminal.
Operation principle：
L-band Signal-regulated kinase includes the radio frequency circuit board and control board of two input channels, control circuit
Power module is provided with plate, for radio frequency circuit board and power itself, being provided with control board and communicating with host computer
Interface, for receiving the instruction of host computer, and by the control signal of instruction morphing radio frequency circuit board in pairs.L-band is believed all the way
Number input from the first via input channel of radio frequency circuit board, carried out by the first low-noise amplifier and the second low-noise amplifier
After two-stage signal amplification, the first numerical-control attenuator of input inputs the tune that the first digital phase shifter carries out phase after carrying out power attenuation
Whole, the reason for then inputting the first temperature compensation attenuator again, increasing by the first temperature compensation attenuator before combiner, is：
The main heating source of radio frequency circuit board avoids reducing power amplification since temperature raises in end；For between prime and rear class
Isolation, reduce influencing each other between prime and rear class.Another way L-band signal is from the second tunnel input channel input by the
By the second numerical-control attenuator and fixed attenuator after three low-noise amplifiers and the amplification of the 4th low-noise amplifier two-stage signal
After carrying out power attenuation, after input second temperature compensator is isolated, the output signal one with the first temperature compensation attenuator
Input combiner is played, it is low by the 5th after output is to the second digital phase shifter into horizontal phasing control after combiner converges signal
Noise amplifier is exported after being amplified by output terminal.First numerical-control attenuator therein, the second numerical-control attenuator, the first numerical control
Phase shifter and the second digital phase shifter are decayed in the signal to input, phase shift when, receive the control of control board input
Signal processed, the amplitude of size and phase shift to decay are controlled.Control board and host computer communicate to connect, therefore can be with
Control panel is sent in host computer and is instructed, the first numerical-control attenuator, the second number in radio frequency circuit board are controlled by control board
Control attenuator, the first digital phase shifter and the second digital phase shifter.Phase shifter, radio frequency circuit board are realized using radio frequency circuit board
Overcome using low noise amplification, multiple power levels decay and by the way of using temperature compensation attenuator to isolate prime with rear class
Pass is increased using microstrip line in the prior art and realizes the problem of noise coefficient of phase shifter is big, radio frequency circuit board uses two paths of signals
Input, overcome single channel input product mix using when volume it is larger be unfavorable for cabinet connect up the problem of.
Further, the control board includes main control chip, and the main control chip is connected with BUFFER circuits and use
In the SPI interface to communicate with the host computer, the BUFFER circuits are connected with radio frequency circuit board using power cord.
Operation principle：
The main control chip of control board is connected with SPI interface and BUFFER circuits, is respectively used to and host computer and radio frequency
Circuit board connects.Control board is communicated by SPI interface with host computer, receives the instruction of host computer, and passes through main control chip
I/O port export to BUFFER circuits, BUFFER circuits avoid clutter from entering radio frequency circuit board, play the work of filtering clutter
With.BUFFER electricity is by the first numerical-control attenuator of power cord and radio frequency circuit board, the second numerical-control attenuator, and all power cords are all
There is the filtering of π types, additional electromagnetic compatibility wave filter is connected on the chip on radio frequency circuit board again after strengthening filtering.Control board
Exclusion, row hold collocation and use on control line, further increase anti-interference.
Further, the BUFFER circuits have multiple, and the signal for the main control chip to be exported inputs after filtering
The first numerical-control attenuator, the second numerical-control attenuator, the first digital phase shifter and the second digital phase shifter of the radio frequency circuit board.
Operation principle：
BUFFER circuits have multiple, each BUFFER circuit only has two input terminals and two output terminals, therefore, master control
Control signal input between the first numerical-control attenuator on chip and radio frequency circuit board needs real by multiple BUFFER circuits
Existing, main control chip is connected with the control signal of the second numerical-control attenuator, the first digital phase shifter and the second digital phase shifter
It is to need multiple BUFFER circuits.
Further, the BUFFER circuits include buffer chips, the 2 feet ground connection of the buffer chips, and 5 feet connect
3.3V DC voltages, 1 foot and 3 feet receive the letter of the main control chip input respectively as first input end and the second input terminal
Number, the first end of 6 feet connection resistance R24, the second end of resistance R24 is grounded by capacitance C2, and connects the first output terminal, 4 feet
The first end of resistance R25 is connected, the second end of resistance R25 is grounded by capacitance C3, and connects the second output terminal, and described first is defeated
Outlet connects radio frequency circuit board with the second output terminal.
Operation principle：
Output plays filtering clutter to radio frequency circuit board after 6 feet and 4 feet of buffer chips connect RC filtering respectively
Effect.
Further, the SPI interface is connected with difference and turns single-ended chip, the difference turn 3 feet of single-ended chip, 5 feet,
11 feet and 13 feet are connected with the output signal of SPI interface respectively, and the difference turns the serial ports of single-ended chip and the host computer
DB15 connections, 9 pins, 10 pins and the 11 pins connection 5V DC voltages of the serial ports DB15,13 pins, 14 pins and 15 pins of serial ports DB15
Ground connection, series resistance R23 between 1 pin and 2 pins of serial ports DB15,1 pin and 2 pins are connected by resistance R9 with resistance R8 respectively
Difference turns 1 foot and 2 feet of single-ended chip, and series resistance R16 between 3 pins and 4 pins of serial ports DB15,3 pins and 4 pins pass through electricity respectively
Resistance R10 connect 6 feet and 7 feet of difference turn single-ended chip with resistance R11, series resistance R21 between 5 pins and 6 pins of serial ports DB15,
5 pins and 6 pins of serial ports DB15 connect 15 feet and 14 feet that difference turns single-ended chip, serial ports by resistance R12 with resistance R13 respectively
7 pins and 8 pins of series resistance R22 between 7 pins and 8 pins of DB15, serial ports DB15 are connected by resistance R14 with resistance R15 respectively
Difference turns 10 feet and 9 feet of single-ended chip.
Operation principle：
Control board is communicated using difference SPI interface with the serial ports DB15 of host computer, and anti-interference is good, communication speed
It hurry up.
Further, the main control chip is FPGA, and the FPGA includes being used for the BANK1 being connected with the SPI interface,
For connect after the BUFFER circuits with the first numerical-control attenuator on the radio frequency circuit board, the second numerical-control attenuator,
The BANK2 of one digital phase shifter connection and for connect after the BUFFER circuits with the second numerical control on the radio frequency circuit board
The BANK3 of phase shifter connection.
Operation principle：
Control board is communicated using difference SPI interface with host computer, and FPGA writes as control core, inside solidification
Good program file.I/O in FPGA presses group（BANK）Classification, every group can independently support different I/O standards.Pass through
The flexible configuration of software, can be adapted to different electrical standards and I/O physical characteristics, can adjust the size of driving current, can be with
Change upper and lower pull-up resistor.For the ease of managing and adapting to a variety of electric appliance standards, the I/O of FPGA is divided into several BANK, often
The interface standard of a BANK is determined that a BANK can only have a kind of VCCO, but the VCCO of difference BANK by its interface voltage VCCO
Can be different.The port of only identical electrical standard can just link together, and identical VCCO voltages are interface standards.When FPGA is received
To after PC control order, the numerical-control attenuator on radio frequency circuit board or digital phase shifter can be matched somebody with somebody according to received order
Put.Its workflow is：Receive the control command of host computer->Parsing control command->Configure the level shape of FPGA corresponding I/Os
State->The level state of FPGA corresponding I/Os be delivered to buffer chips->The level state of buffer chips be delivered to silver-jacketed wire-
>The level state of silver-jacketed wire be delivered to numerical-control attenuator or digital phase shifter->Numerical-control attenuator or digital phase shifter response->
Terminate.Here numerical-control attenuator includes the first numerical-control attenuator and the second numerical-control attenuator, and digital phase shifter here includes
First digital phase shifter and the second digital phase shifter.FPGA is selected to lead to as main control chip using difference SPI interface with host computer
Letter, anti-interference is good, fast response time, and communication speed is fast.
Further, the control board further includes the power module for powering to the radio frequency circuit board, described
Power module includes 5.5V filter circuits, 3.3V regulator circuits and 1.2V regulator circuits, is respectively used to provide to the FPGA
5.5V DC voltages, 3.3V DC voltages and 1.2V DC voltages.
Operation principle：
Power module is filtered using composing in parallel filter circuit by capacitance, 3.3V regulator circuits and 1.2V regulator circuits
Using low voltage difference voltage stabilizing chip, DC-DC regulator switch frequency interferences are avoided to reduce power consumption.
The utility model compared with prior art, has the following advantages and beneficial effect：
（1）The utility model compact, has 2 passage integrated levels high, and fast response time, high/low temperature uniformity is good,
High sensitivity, has ultra-low noise coefficient, increasing degree control function.Noise coefficient is influenced when adjusting signal amplitude little.
This product works in 1660-1730MHz and belongs to customed product, has filled up the market vacancy.
（2）L-band Signal-regulated kinase, which is mainly realized, is amplified faint input signal, and can realize two-way input letter
Number power and phase adjustment.Input signal is the signal of two-way independence, and combining is output to a common output port.System
System, which is realized, to be deteriorated the noise coefficient of input signal as far as possible small, and the power and phase-adjustable of two input signals are whole.
Brief description of the drawings
Fig. 1 is the system principle diagram of the utility model；
The main control chip in circuit board and difference turn the circuit diagram that single-ended chip is connected to Fig. 2 in order to control；
Fig. 3 is the schematic diagram that BANK2 is connected with BUFFER circuits；
Fig. 4 is the schematic diagram that BANK3 is connected with BUFFER circuits；
Fig. 5 is the circuit connection diagram that difference turns single-ended chip and serial ports DB15；
Fig. 6 is the circuit diagram of BUFFER circuits；
Fig. 7 is the circuit connection diagram of main control chip, BUFFER circuits and radio frequency circuit board；
Fig. 8 is the schematic diagram of 5.5V filter circuits；
Fig. 9 is the schematic diagram of 3.3V regulator circuits；
Figure 10 is the schematic diagram of 1.2V regulator circuits；
Wherein the first low-noise amplifiers of A1-；The second low-noise amplifiers of A2-；The 3rd low-noise amplifiers of A3-；A4-
Four low-noise amplifiers；The 5th low-noise amplifiers of A5-；The first numerical-control attenuators of B1-；The second numerical-control attenuators of B2-；C1-
One digital phase shifter；The second digital phase shifters of C2-；The first temperature compensation attenuators of D1-；D2- second temperature compensators；E- is fixed
Attenuator；F- combiners；U1B-BANK1；U1C-BANK2；U1D-BANK3；U2- difference turns single-ended chip；U3-buffer cores
Piece；DS1- the first low voltage difference voltage stabilizing chips；DS2- the second low voltage difference voltage stabilizing chips.
Embodiment
The utility model is described in further detail with reference to embodiment, but the embodiment of the utility model is not
It is limited to this.
Embodiment 1：
With reference to shown in attached drawing 1, a kind of L-band Signal-regulated kinase, including for adjust two-way input signal power and
The radio frequency circuit board of phase and the control electricity for radio frequency circuit board to be powered and output control signals to the radio frequency circuit board
Road plate, the control board communication link are connected to host computer, and the radio frequency circuit board includes first via input channel and the second tunnel
Input channel, the first via input channel are sequentially connected the first low-noise amplifier A1, the second low-noise amplifier A2, first
Numerical-control attenuator B1, the first digital phase shifter C1 and the first temperature compensation attenuator D1, second tunnel input channel connect successively
Connect the 3rd low-noise amplifier A3, the 4th low-noise amplifier A4, the second numerical-control attenuator B2, the temperature of fixed attenuator E and second
Degree compensator D2, the first temperature compensator D1 are connected the defeated of combiner F with the output terminal of the second temperature compensator D2
Enter end, the output terminal of the combiner F is connected with the second digital phase shifter C2, and the second digital phase shifter C2 connections the 5th are low
Noise amplifier A5, the output terminal of the 5th low-noise amplifier A5 connection radio frequency circuit boards.
Operation principle：
L-band Signal-regulated kinase includes the radio frequency circuit board and control board of two input channels, control circuit
Power module is provided with plate, for radio frequency circuit board and power itself, being provided with control board and communicating with host computer
Interface, for receiving the instruction of host computer, and by the control signal of instruction morphing radio frequency circuit board in pairs.L-band is believed all the way
Number inputted from the first via input channel of radio frequency circuit board, by the first low-noise amplifier A1 and the second low-noise amplifier A2
After carrying out two-stage signal amplification, the first numerical-control attenuator B1 of input inputs the first digital phase shifter C1 progress after carrying out power attenuation
The adjustment of phase, then inputs the first temperature compensation attenuator D1, increases by the first temperature compensation attenuator before combiner F again
The reason for D1, is：The main heating source of radio frequency circuit board avoids reducing power amplification since temperature raises in end；For preceding
Level and isolating between rear class, reduce influencing each other between prime and rear class.Another way L-band signal is logical from the input of the second tunnel
Road input declines after the 3rd low-noise amplifier A3 and the amplification of the 4th low-noise amplifier A4 two-stage signals by the second numerical control
After subtracting device B2 and fixed attenuator E progress power attenuations, after input second temperature compensator D2 is isolated, mended with the first temperature
The output signal for repaying attenuator D1 inputs combiner F together, and combiner F is exported to the second digital phase shifter C2 after signal is converged
Into after horizontal phasing control, exported after the 5th low-noise amplifier A5 is amplified by output terminal.First numerical control therein declines
Subtract device B1, the second numerical-control attenuator B2, the first digital phase shifter C1 and the second digital phase shifter C2 to the signal of input into
When row decay, phase shift, the control signal of control board input is received, the amplitude of size and phase shift to decay is controlled
System.Control board is communicated to connect with host computer, therefore control panel can be sent in host computer and instructed, by control board control
The first numerical-control attenuator B1, the second numerical-control attenuator B2, the first digital phase shifter C1 and the second number in radio frequency circuit board processed
Control phase shifter C2.Phase shifter is realized using radio frequency circuit board, radio frequency circuit board using low noise amplification, multiple power levels decay and
Overcome by the way of temperature compensation attenuator isolates prime with rear class and pass realization is increased using microstrip line in the prior art
The problem of noise coefficient of phase shifter is big, radio frequency circuit board are inputted using two paths of signals, overcome the product group of single channel input
Volume is larger when closing use is unfavorable for the problem of cabinet connects up.The 4th low noise A4 models of first low-noise amplifier A1- are
BGU8052, the first numerical-control attenuator B1 and the second numerical-control attenuator B2 models PE43711A-Z, the first digital phase shifter C1 and
Second digital phase shifter C2 models MAPS-010163-TR0500, the first temperature compensation attenuator D1 and second temperature compensation decline
Subtracting device D2 model TCA0602N9W3, fixed attenuator E is resistance-type π type attenuators, combiner F model SBB-2-18,
Five low-noise amplifier A5 models ABA-54563-TR1G.
Embodiment 2：
On the basis of embodiment 1, with reference to shown in attached drawing 1-4, Fig. 6 and Fig. 7, the control board includes master control core
Piece, the main control chip are connected with BUFFER circuits and the SPI interface for communicating with the host computer, the BUFFER circuits
It is connected with radio frequency circuit board using power cord.
Operation principle：
The main control chip of control board is connected with SPI interface and BUFFER circuits, is respectively used to and host computer and radio frequency
Circuit board connects.Control board is communicated by SPI interface with host computer, receives the instruction of host computer, and passes through main control chip
I/O port export to BUFFER circuits, BUFFER circuits avoid clutter from entering radio frequency circuit board, play the work of filtering clutter
With.BUFFER electricity passes through the first numerical-control attenuator B1 of power cord and radio frequency circuit board, the second numerical-control attenuator B2, all power supplys
Line has the filtering of π types, and additional electromagnetic compatibility wave filter is connected on the chip on radio frequency circuit board again after strengthening filtering.Control circuit
Exclusion, row hold collocation and use on the control line of plate, further increase anti-interference.
Further, the BUFFER circuits have multiple, and the signal for the main control chip to be exported inputs after filtering
The first numerical-control attenuator B1, the second numerical-control attenuator B2, the first digital phase shifter C1 and the second numerical control of the radio frequency circuit board
Phase shifter C2.
Operation principle：
BUFFER circuits have multiple, each BUFFER circuit only has two input terminals and two output terminals, therefore, master control
Control signal input between the first numerical-control attenuator B1 on chip and radio frequency circuit board is needed by multiple BUFFER circuits
Realize, the control letter of main control chip and the second numerical-control attenuator B2, the first digital phase shifter C1 and the second digital phase shifter C2
Number connection is also to need multiple BUFFER circuits.
Further, the BUFFER circuits include buffer chips U3, the 2 feet ground connection of the buffer chips, and 5 feet connect
3.3V DC voltages, 1 foot and 3 feet receive the letter of the main control chip input respectively as first input end and the second input terminal
Number, the first end of 6 feet connection resistance R24, the second end of resistance R24 is grounded by capacitance C2, and connects the first output terminal, 4 feet
The first end of resistance R25 is connected, the second end of resistance R25 is grounded by capacitance C3, and connects the second output terminal, and described first is defeated
Outlet connects radio frequency circuit board with the second output terminal.
Operation principle：
Output plays filtering clutter to radio frequency circuit board after 6 feet and 4 feet of buffer chips U3 connect RC filtering respectively
Effect.
Embodiment 3：
On the basis of embodiment 2, with reference to shown in attached drawing 1, Fig. 2 and Fig. 5, the SPI interface is connected with difference and turns single-ended
Chip U2,3 feet, 5 feet, 11 feet and 13 feet that the difference turns single-ended chip U2 are connected with the output signal of SPI interface respectively, institute
State the single-ended chip U2 of difference turn to be connected with the serial ports DB15 of the host computer, 9 pins, 10 pins and the connection of 11 pins of the serial ports DB15
5V DC voltages, 13 pins, 14 pins and the 15 pins ground connection of serial ports DB15, series resistance R23 between 1 pin and 2 pins of serial ports DB15, institute
State 1 pin and 2 pins and connect 1 foot and 2 feet that difference turns single-ended chip U2,3 pins of serial ports DB15 with resistance R8 by resistance R9 respectively
And 4 series resistance R16 between pin, 3 pins and 4 pins connect difference turns single-ended chip U2 6 by resistance R10 with resistance R11 respectively
Foot and 7 feet, 5 pins and 6 pins of series resistance R21 between 5 pins and 6 pins of serial ports DB15, serial ports DB15 respectively by resistance R12 and
Resistance R13 connections difference turns 15 feet and 14 feet of single-ended chip U2, series resistance R22 between 7 pins and 8 pins of serial ports DB15, string
7 pins and 8 pins of mouth DB15 connect 10 feet and 9 feet that difference turns single-ended chip U2 by resistance R14 with resistance R15 respectively.
Operation principle：
Control board is communicated using difference SPI interface with the serial ports DB15 of host computer, and anti-interference is good, communication speed
It hurry up.
Further, the main control chip is FPGA, and the FPGA includes being used for what is be connected with the SPI interface
BANK1U1B, for connect after the BUFFER circuits with the first numerical-control attenuator B1 on the radio frequency circuit board, the second number
Control attenuator B2, the first digital phase shifter C1 connections BANK2U1C and for connect after the BUFFER circuits with the radio frequency
The BANK3U1D of the second digital phase shifter C2 connections on circuit board.
Operation principle：
Control board is communicated using difference SPI interface with host computer, and FPGA writes as control core, inside solidification
Good program file.For I/O in FPGA by group BANK classification, every group can independently support different I/O standards.By soft
The flexible configuration of part, can be adapted to different electrical standards and I/O physical characteristics, can adjust the size of driving current, Ke Yigai
Become upper and lower pull-up resistor.For the ease of managing and adapting to a variety of electric appliance standards, the I/O of FPGA is divided into several BANK, each
The interface standard of BANK is determined that a BANK can only have a kind of VCCO, but the VCCO of difference BANK can by its interface voltage VCCO
With difference.The port of only identical electrical standard can just link together, and identical VCCO voltages are interface standards.When FPGA is received
After PC control order, the numerical-control attenuator on radio frequency circuit board or digital phase shifter can be configured according to received order
It is good.Its workflow is：Receive the control command of host computer->Parsing control command->The level state of configuration FPGA corresponding I/Os-
>The level state of FPGA corresponding I/Os be delivered to buffer chips->The level state of buffer chips be delivered to silver-jacketed wire->Plating
The level state of silver wire be delivered to numerical-control attenuator or digital phase shifter->Numerical-control attenuator or digital phase shifter response->Knot
Beam.Here numerical-control attenuator includes the first numerical-control attenuator B1 and the second numerical-control attenuator B2, digital phase shifter bag here
Include the first digital phase shifter C1 and the second digital phase shifter C2.FPGA is selected as main control chip, using difference SPI interface with it is upper
Position machine communication, anti-interference is good, fast response time, and communication speed is fast.
Embodiment 4：
On the basis of embodiment 3, with reference to shown in attached drawing 1-10, the control board is further included for the radio frequency
The power module of circuit board power supply, the power module include 5.5V filter circuits, 3.3V regulator circuits and 1.2V regulator circuits,
It is respectively used to provide 5.5V DC voltages, 3.3V DC voltages and 1.2V DC voltages to the FPGA.
Operation principle：
Power module is filtered using composing in parallel filter circuit by capacitance, 3.3V regulator circuits and 1.2V regulator circuits
Using low voltage difference voltage stabilizing chip, DC-DC regulator switch frequency interferences are avoided to reduce power consumption.It is low that 3.3V regulator circuits include first
The connection of pressure difference voltage stabilizing chip DS1,5.5V voltage inputs the 4 of the first low voltage difference voltage stabilizing chip DS1 after being filtered by capacitance C4, capacitance C5
Foot and 8 feet, 0 foot of the first low voltage difference voltage stabilizing chip DS1 and 3 feet ground connection, 1 foot are grounded after capacitance C6.Between 5 feet and 6 feet
It is grounded after series resistance R26,6 foot series resistance R27, resistance R28, the resistance value of resistance R26, resistance R27 and resistance R28 should meet
The voltage of 6 feet of first low voltage difference voltage stabilizing chip DS1 is 1V, and 5 feet of the first low voltage difference voltage stabilizing chip DS1 are also associated with inductance L1
With the LC filter circuits of capacitance C8 compositions, the node voltage between inductance L1 and capacitance C8 is 3.3V DC voltages.1.2V voltage stabilizing
Circuit includes the second low voltage difference voltage stabilizing chip DS2, and 8 feet of the second low voltage difference voltage stabilizing chip DS2 meet 5.5V voltages, 4 feet and 5.5V
Increase the high current E1 of single circuit type between voltage, using NFM21PC475B1A3D, the high current E1 connections of single circuit type
Input 4 feet of the second low voltage difference voltage stabilizing chip DS2 after being filtered by capacitance C9, capacitance C10, the 0 of the second low voltage difference voltage stabilizing chip DS2
Foot and 3 feet ground connection, 1 foot are grounded after capacitance C11.Series resistance R29 between 5 feet and 6 feet, 6 foot series resistance R30, resistance
It is grounded after R31, the resistance value of resistance R29, resistance R30 and resistance R31 should meet the electricity of 6 feet of the second low voltage difference voltage stabilizing chip DS2
Press and be also associated with the LC filter circuits of inductance L2 and capacitance C13 compositions, inductance for 1V, 5 feet of the second low voltage difference voltage stabilizing chip DS2
Node voltage between L2 and capacitance C13 is 1.2V DC voltages.
The above, is only the preferred embodiment of the utility model, and limit in any form is not done to the utility model
System, every any simple modification made according to the technical essence of the utility model to above example, equivalent variations, each falls within
Within the scope of protection of the utility model.
Claims (7)
1. a kind of L-band Signal-regulated kinase, it is characterised in that including the power and phase for adjusting two-way input signal
Radio frequency circuit board and for the control board of radio frequency circuit board, institute to be powered and output control signals to the radio frequency circuit board
State control board communication link and be connected to host computer, the radio frequency circuit board includes first via input channel and the input of the second tunnel is logical
Road, the first via input channel are sequentially connected the first low-noise amplifier（A1）, the second low-noise amplifier（A2）, first number
Control attenuator（B1）, the first digital phase shifter（C1）With the first temperature compensation attenuator（D1）, second tunnel input channel according to
The 3rd low-noise amplifier of secondary connection（A3）, the 4th low-noise amplifier（A4）, the second numerical-control attenuator（B2）, fixed attenuator
（E）With second temperature compensator（D2）, first temperature compensator（D1）With the second temperature compensator（D2）Output
End connection combiner（F）Input terminal, the combiner（F）Output terminal be connected with the second digital phase shifter（C2）, described
Two digital phase shifters（C2）Connect the 5th low-noise amplifier（A5）, the 5th low-noise amplifier（A5）Connect radio circuit
The output terminal of plate.
2. a kind of L-band Signal-regulated kinase according to claim 1, it is characterised in that the control board includes
Main control chip, the main control chip is connected with BUFFER circuits and the SPI interface for communicating with the host computer, described
BUFFER circuits are connected with radio frequency circuit board using power cord.
3. a kind of L-band Signal-regulated kinase according to claim 2, it is characterised in that the BUFFER circuits have more
A, the signal for the main control chip to be exported inputs the first numerical-control attenuator of the radio frequency circuit board after filtering（B1）、
Second numerical-control attenuator（B2）, the first digital phase shifter（C1）With the second digital phase shifter（C2）.
4. a kind of L-band Signal-regulated kinase according to claim 3, it is characterised in that the BUFFER circuits include
Buffer chips（U3）, the 2 feet ground connection of the buffer chips, 5 feet connect 3.3V DC voltages, and 1 foot and 3 feet are respectively as first
Input terminal and the second input terminal receive the signal of the main control chip input, and 6 feet connect the first end of resistance R24, resistance R24's
Second end is grounded by capacitance C2, and connects the first output terminal, the first end of 4 feet connection resistance R25, the second end of resistance R25
It is grounded by capacitance C3, and connects the second output terminal, first output terminal and the second output terminal connects radio frequency circuit board.
A kind of 5. L-band Signal-regulated kinase according to any one in claim 2-4, it is characterised in that the SPI
Interface is connected with difference and turns single-ended chip（U2）, the single-ended chip of the difference turn（U2）3 feet, 5 feet, 11 feet and 13 feet respectively with
The output signal connection of SPI interface, the difference turn single-ended chip（U2）It is connected with the serial ports DB15 of the host computer, the string
9 pins, 10 pins and the 11 pins connection 5V DC voltages of mouth DB15,13 pins, 14 pins and the 15 pins ground connection of serial ports DB15, serial ports DB15's
Series resistance R23 between 1 pin and 2 pins, 1 pin and 2 pins are connected difference with resistance R8 by resistance R9 and turn single-ended chip respectively
（U2）1 foot and 2 feet, series resistance R16 between 3 pins and 4 pins of serial ports DB15,3 pins and 4 pins pass through resistance R10 and electricity respectively
Hinder R11 connections difference and turn single-ended chip（U2）6 feet and 7 feet, series resistance R21 between 5 pins and 6 pins of serial ports DB15, serial ports
5 pins and 6 pins of DB15 are connected difference with resistance R13 by resistance R12 and turn single-ended chip respectively（U2）15 feet and 14 feet, serial ports
7 pins and 8 pins of series resistance R22 between 7 pins and 8 pins of DB15, serial ports DB15 are connected by resistance R14 with resistance R15 respectively
Difference turns single-ended chip（U2）10 feet and 9 feet.
A kind of 6. L-band Signal-regulated kinase according to claim 5, it is characterised in that the main control chip is FPGA,
The FPGA includes being used for the BANK1 being connected with the SPI interface（U1B）, for connect after the BUFFER circuits with it is described
The first numerical-control attenuator on radio frequency circuit board（B1）, the second numerical-control attenuator（B2）, the first digital phase shifter（C1）Connection
BANK2（U1C）With for connect after the BUFFER circuits with the second digital phase shifter on the radio frequency circuit board（C2）Even
The BANK3 connect（U1D）.
7. a kind of L-band Signal-regulated kinase according to claim 6, it is characterised in that the control board is also wrapped
The power module for powering to the radio frequency circuit board is included, the power module includes 5.5V filter circuits, 3.3V voltage stabilizings electricity
Road and 1.2V regulator circuits, are respectively used to provide 5.5V DC voltages, 3.3V DC voltages and 1.2V direct currents to the FPGA
Pressure.
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| CN201721165623.XU CN207369002U (en) | 2017-09-12 | 2017-09-12 | A kind of L-band Signal-regulated kinase |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109150228A (en) * | 2018-08-17 | 2019-01-04 | 北方电子研究院安徽有限公司 | A kind of limited range enlargement and monitor signal output control module |
| CN111786695A (en) * | 2020-06-12 | 2020-10-16 | 云南电网有限责任公司电力科学研究院 | 5G wireless industrial chip applied to strong electric field environment |
| CN113541718A (en) * | 2021-06-15 | 2021-10-22 | 中国电子科技集团公司第十三研究所 | Four-channel multifunctional chip |
| CN115356700A (en) * | 2022-10-19 | 2022-11-18 | 南京冉思电子科技有限公司 | Radar active calibrator |
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2017
- 2017-09-12 CN CN201721165623.XU patent/CN207369002U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109150228A (en) * | 2018-08-17 | 2019-01-04 | 北方电子研究院安徽有限公司 | A kind of limited range enlargement and monitor signal output control module |
| CN109150228B (en) * | 2018-08-17 | 2020-09-01 | 北方电子研究院安徽有限公司 | Amplitude limiting amplification and output signal monitoring control module |
| CN111786695A (en) * | 2020-06-12 | 2020-10-16 | 云南电网有限责任公司电力科学研究院 | 5G wireless industrial chip applied to strong electric field environment |
| CN113541718A (en) * | 2021-06-15 | 2021-10-22 | 中国电子科技集团公司第十三研究所 | Four-channel multifunctional chip |
| CN113541718B (en) * | 2021-06-15 | 2022-09-13 | 中国电子科技集团公司第十三研究所 | Four-channel multifunctional chip |
| CN115356700A (en) * | 2022-10-19 | 2022-11-18 | 南京冉思电子科技有限公司 | Radar active calibrator |
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