CN207302050U - Charge pump artificial circuit for flash memory - Google Patents
Charge pump artificial circuit for flash memory Download PDFInfo
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- CN207302050U CN207302050U CN201721055898.8U CN201721055898U CN207302050U CN 207302050 U CN207302050 U CN 207302050U CN 201721055898 U CN201721055898 U CN 201721055898U CN 207302050 U CN207302050 U CN 207302050U
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- charge pump
- switch pipe
- flash memory
- circuit
- artificial circuit
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Abstract
This application discloses a kind of charge pump artificial circuit for flash memory.The charge pump artificial circuit includes：Level shifter, for producing control signal according to enable signal and switching signal；And transmission gate, for supply voltage to be converted into output voltage under the control of said control signal, wherein, the transmission gate includes first switch pipe, resistance and the second switch pipe being sequentially connected in series between its input terminal and output terminal, and it is connected to the capacitance between the intermediate node and ground of the resistance and the second switch pipe, the input terminal receives the supply voltage, the output terminal provides the control terminal reception control signal of the output voltage, the first switch pipe and the second switch pipe.The charge pump artificial circuit reduces the quantity of switching tube, so that the system resource during reducing circuit simulation takes, and improves simulation velocity.
Description
Technical field
Circuit simulation is the utility model is related to, more particularly, to the charge pump artificial circuit for flash memory.
Background technology
Flash memory is non-volatile memory of long-life a kind of, also can be muchly under conditions of the supply of no electric current
Data are kept, its storage characteristics is equivalent to hard disk.It is in units of fixed block rather than using single byte to be single that data, which are deleted,
Position, block size are generally 256KB to 20MB.Flash memory is the mutation of Electrical Erasable read-only storage, flash memory with erasable
Read unlike memory, erasable read-only memory is deleted and rewritten in byte-level, and the major part of flash memory
Chip needs to wipe by block.Because it remains to preserve data when powering off, flash memory is usually used to preservation configuration information, such as in electricity
Preservation data etc. in the base program of brain, personal digital assistant, digital camera.
The physical mechanism of flush memory device actual storage operation requires circuit to provide the work electricity far above power input voltage
Pressure, its physical mechanism operated mainly include two kinds：Thermoelectron injects and FN tunneling effects, both operations are typically necessary
Very high voltage goes to complete.Charge pump circuit is essential composition portion in flash memory system as the circuit for producing high voltage in piece
Point.Charge pump circuit is a kind of can to pass through electricity in the dc-dc that on piece integrates by what capacitance and switch arrays formed
Hold potential of the inner couplings effect generation than outer power voltage higher.
Flash memory design verification process is long, emulation amount is big, takes substantial amounts of computer resource.Analyze simulation process to find, electricity
Lotus pump circuit occupies substantial amounts of computing resource.And several charge pumps have been used in flash memory circuit, although charge pump circuit structure is simple
Single, the working frequency of charge pump is very high generally in 10MHz to 1GHz, when the global circuit to flash memory emulates, once have
The unlatching of charge pump, charge pump mould, which takes substantial amounts of computing resource, declines simulation velocity, wastes substantial amounts of computer resource.
Therefore, it is desirable to the artificial circuit and emulation mode of the charge pump of flash memory are further modified to, to reduce calculation amount
With saving computer resource.
Utility model content
The utility model embodiment provides a kind of charge pump artificial circuit for flash memory, of the prior art for solving
Problem, realizes the emulation to flash memory.One side according to the present utility model, there is provided a kind of charge pump for flash memory emulates electricity
Road, including：Level shifter, for producing control signal according to enable signal and switching signal；And transmission gate, for
Supply voltage is converted into output voltage under the control of the control signal, wherein, the transmission gate includes being sequentially connected in series
First switch pipe, resistance and second switch pipe between its input terminal and output terminal, and it is connected to the resistance and described
Capacitance between the intermediate node and ground of second switch pipe, the input terminal receive the supply voltage, and the output terminal provides
The control terminal of the output voltage, the first switch pipe and the second switch pipe receives the control signal.
Preferably, the capacitance is used for the equivalent capacity for simulating the charge pump, and the resistance is used to simulate the electric charge
The equivalent resistance of pump.
Preferably, it is brilliant for p-type MOS to provide positive voltage, the first switch pipe and the second switch pipe for the charge pump
Body pipe.
Preferably, it is brilliant for N-type MOS to provide negative voltage, the first switch pipe and the second switch pipe for the charge pump
Body pipe.
Another aspect according to the present utility model, there is provided a kind of emulation mode of flash memory circuit, the flash memory circuit include
Charge pump to provide read-write voltage, the described method includes：In flash memory circuit, substituted using above-mentioned charge pump artificial circuit real
Border charge pump circuit, has obtained flash memory artificial circuit；The electricity of the charge pump artificial circuit is set according to actual charge pump circuit
Road parameter；The flash memory artificial circuit is emulated, to obtain the circuit parameter needed for the flash memory circuit.
Preferably, the flash memory circuit includes charge pump to provide read-write voltage, the described method includes：The charge pump is imitated
The circuit parameter of true circuit includes enable signal, switching signal, supply voltage, the numerical value and level state of output voltage, and
The numerical value of the resistance and the capacitance.
The charge pump artificial circuit for flash memory that the utility model embodiment provides, the charge pump artificial circuit include：
Level shifter, for producing control signal according to enable signal and switching signal；And transmission gate, in the control
Supply voltage is converted into output voltage under the control of signal, wherein, the transmission gate includes being sequentially connected in series in its input
First switch pipe, resistance and second switch pipe between end and output terminal, and it is connected to the resistance and the second switch
Capacitance between the intermediate node and ground of pipe, the input terminal receive the supply voltage, and the output terminal provides the output
The control terminal of voltage, the first switch pipe and the second switch pipe receives the control signal.The emulation mode includes：Step
Rapid 1, in flash memory circuit, actual charge pump circuit is substituted using above-mentioned charge pump artificial circuit, obtains flash memory artificial circuit；
Step 2, the circuit parameter of the charge pump artificial circuit is set according to actual charge pump circuit；Step 3, the flash memory is emulated
Circuit is emulated, to obtain the circuit parameter needed for the flash memory circuit.The charge pump artificial circuit reduces switching tube
Quantity, so that the system resource during reducing circuit simulation takes, and improves simulation velocity.
Compared with the charge pump artificial circuit of the prior art, the charge pump artificial circuit of the utility model utilizes passive element
The equivalent capacity and equivalent resistance of charge simulation pump, and reduce the quantity of the active component in artificial circuit (MOS transistor).
Therefore, which reduces the emulation amount of switching signal, reduces flash memory circuit in simulation process to computing resource
Occupancy.
Brief description of the drawings
, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution of the prior art
Attached drawing is briefly described needed in description, it is clear that drawings in the following description are some of the utility model
Embodiment, is below in conjunction with the accompanying drawings described in further detail the utility model with embodiment：
Fig. 1 shows existing DICKSON charge pumps entity circuit diagram；
Fig. 2 shows the electrical block diagram of existing charge pump artificial circuit；
Fig. 3 shows to be shown according to the circuit structure of the charge pump artificial circuit for flash memory of the utility model first embodiment
It is intended to；
Fig. 4 shows the flow chart of the flash memory circuit emulation mode according to the utility model second embodiment.
Embodiment
It is new below in conjunction with this practicality to make the purpose, technical scheme and advantage of the utility model embodiment apparent
Attached drawing in type embodiment, the technical scheme in the utility model embodiment is clearly and completely described, described reality
It is the utility model part of the embodiment to apply example, instead of all the embodiments.Based on the embodiment in the utility model, ability
Domain those of ordinary skill is not making all other embodiments obtained of creative work premise, and it is new to belong to this practicality
The protection domain of type.
Fig. 1 shows existing DICKSON charge pumps entity circuit diagram.The input terminal of the charge pump receives supply voltage Vd,
Output terminal provides output voltage Vout.Further, the charge pump include clock generation circuit 11, multiple switch pipe M0 to Mn and
Multiple capacitance C1 to Cn.The clock generation circuit 11 produces non-overlapped the first clock signal clk 1 and second clock signal
CLK2.Multiple switch pipe M0 to Mn is sequentially connected in series between input terminal and output terminal, and its grid is connected with its source electrode.
Multiple capacitance C1 to Cn are connected between the drain electrode of corresponding switching tube and the output terminal of the clock generation circuit 11.Institute
State multiple switch pipe M0 to Mn and the multiple capacitance C1 to Cn and form multiple voltage levels, and the capacitance alternating of neighboring voltage level
Receive the first clock signal clk 1 and second clock signal CLK2.
During operation, the charge pump within a clock cycle, when the clock signal of one of phase is from high level
After jumping to low level, the clock signal of another phase just can be high level from low transition, so that charge pump pump electricity
Electric charge in appearance fully can be transferred to rear stage from previous stage, in this way, under the action of two phase clock signal, electric charge is continuous
From power delivery to output stage, raise output voltage.
Fig. 2 shows the electrical block diagram of existing charge pump artificial circuit.The input terminal of the charge pump artificial circuit
Voltage VNEG1, VNEG2 that power supply storehouse provides are received, output terminal provides output voltage VNEG.Further, which emulates
Circuit includes level shifter 21 and transmission gate 22.The level shifter 21 is used to produce control signal pen, pent.
The transmission gate 22 includes switching tube M11 to M13 and M21 to M23.
During operation, two MOS transistor transmission gates in parallel are controlled using the control signal pen and pent of transmission gate
The output VNEG of transmission gate is equal to VNEG1 or VNEG2 or floating, finally realizes the change of output terminal level.
The charge pump artificial circuit has used 6 MOS transistors, and during circuit simulation, there are system resource occupancy is big
The problem of.
Fig. 3 shows to be shown according to the circuit structure of the charge pump artificial circuit for flash memory of the utility model first embodiment
It is intended to.The input terminal of the charge pump artificial circuit receives the output voltage Vpump during pump zero loads in primary circuit, and output terminal carries
For output voltage Vout.Further, which includes level shifter 101 and transmission gate 102.The electricity
Lotus pump carry circuit 101 is used to produce control signal by controlling switch signal Vsw according to enable signal EN.The transmission gate
102 include first switch pipe M1, second switch pipe M2, the equivalent capacity Cpump of charge pump and its equivalent resistance Rpump.First
Switching tube M1, resistance Rpump and second switch pipe M2 are sequentially connected in series between its input terminal and output terminal, capacitance Cpump
It is connected between the intermediate node and ground of resistance Rpump and second switch pipe M2.
During operation, level shifter produces control signal, control by enable signal EN controlling switch signals Vsw
The conducting and cut-off of switching tube, further realize the change of output terminal level.
Preferably, the charge pump provides positive voltage, the first switch pipe and the second switch pipe as p-type MOS, right
The enable signal EN answered is effective when being logic low, Vout output HIGH voltages.
Preferably, charge pump described in transistor provides negative voltage, and the first switch pipe and the second switch pipe are N-type
MOS transistor.Switching tube M1, M2 are opened when EN is high level.Vout represents output voltage, and Vout points are in outstanding when M2 is not turned on
Floating state.
Fig. 4 shows the flow chart of the flash memory circuit emulation mode according to the utility model second embodiment.The flash memory circuit
Emulation mode include step S01, S02 and S03.Step S01 substitutes actual charge pump circuit for charge pump artificial circuit, obtains
Flash memory artificial circuit.Step S02 is the circuit parameter that the charge pump artificial circuit is set according to actual charge pump circuit.Step
S03 obtains the circuit parameter needed for the flash memory circuit to be emulated to the flash memory artificial circuit.
The artificial circuit includes level shifter and transmission gate, and level shifter is opened by enable signal EN controls
OFF signal Vsw produces control signal, and the working status of controlling transmission door, further realizes the change of output terminal level.
The circuit parameter of the charge pump artificial circuit includes enable signal, switching signal, supply voltage, output voltage
Numerical value and level state, and the numerical value of the resistance and the capacitance.Preferably, flash memories emulation is required by electricity
The physical parameter that lotus pump provides, obtains from the charge pump simulation model of the utility model.
Finally it should be noted that：Various embodiments above is only illustrating the technical solution of the utility model, rather than to it
Limitation；This specification is chosen and specifically describes these embodiments, is principle and reality in order to preferably explain the utility model
Using so that skilled artisan can be well using the utility model and on the basis of the utility model
Modification uses.Although the utility model is described in detail with reference to foregoing embodiments, the ordinary skill people of this area
Member should be understood：It can still modify the technical solution described in foregoing embodiments, either to its all or
Some technical characteristics carry out equivalent substitution；And these modifications or replacement, the essence of appropriate technical solution is departed from this reality
With the scope of new each embodiment technical solution.
Claims (4)
- A kind of 1. charge pump artificial circuit for flash memory, it is characterised in that including：Level shifter, for producing control signal according to enable signal and switching signal；AndTransmission gate, for supply voltage to be converted into output voltage under the control of said control signal,Wherein, the transmission gate include being sequentially connected in series first switch pipe between its input terminal and output terminal, resistance and Second switch pipe, and the capacitance being connected between the intermediate node and ground of the resistance and the second switch pipe,The input terminal receives the supply voltage, and the output terminal provides the output voltage, the first switch pipe and institute The control terminal for stating second switch pipe receives the control signal.
- 2. a kind of charge pump artificial circuit for flash memory according to claim 1, it is characterised in that the capacitance is used for The equivalent capacity of the charge pump is simulated, the resistance is used for the equivalent resistance for simulating the charge pump.
- 3. a kind of charge pump artificial circuit for flash memory according to claim 1, it is characterised in that the charge pump carries For positive voltage, the first switch pipe and the second switch pipe are N-type MOS transistor.
- 4. a kind of charge pump artificial circuit for flash memory according to claim 1, it is characterised in that the charge pump carries For negative voltage, the first switch pipe and the second switch pipe are N-type MOS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721055898.8U CN207302050U (en) | 2017-08-22 | 2017-08-22 | Charge pump artificial circuit for flash memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721055898.8U CN207302050U (en) | 2017-08-22 | 2017-08-22 | Charge pump artificial circuit for flash memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207302050U true CN207302050U (en) | 2018-05-01 |
Family
ID=62445193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721055898.8U Active CN207302050U (en) | 2017-08-22 | 2017-08-22 | Charge pump artificial circuit for flash memory |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207302050U (en) |
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2017
- 2017-08-22 CN CN201721055898.8U patent/CN207302050U/en active Active
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