CN207165216U - Drive circuit board and display device - Google Patents
Drive circuit board and display device Download PDFInfo
- Publication number
- CN207165216U CN207165216U CN201720729599.1U CN201720729599U CN207165216U CN 207165216 U CN207165216 U CN 207165216U CN 201720729599 U CN201720729599 U CN 201720729599U CN 207165216 U CN207165216 U CN 207165216U
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- Prior art keywords
- protective layer
- test circuit
- drive circuit
- substrate
- circuit board
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Abstract
The utility model discloses a kind of drive circuit board and display device.The drive circuit board includes substrate, is arranged at the test circuit and two connection units of the substrate surface.Described two connection units are respectively arranged at the both sides of the test circuit.The drive circuit board also includes the protective layer for being arranged at the test circuit surface.Pass through the purpose for setting protective layer to reach to avoid the test circuit circuit to be corroded or damage.
Description
Technical field
Display field is the utility model is related to, more particularly to a kind of drive circuit board and display device.
Background technology
The substrate non-display area of the screen body of display device is provided with installation circuit.Installation circuit generally includes to be oppositely arranged
Input pad and output pad, input pad and output pad between be provided with exposed test circuit.The input of IC chip is drawn
Pin and output pin correspond to respectively the input pad and it is described output pad connection so that the IC chip with it is described
Substrate is electrically connected.
In the prior art, test circuit is easily damaged, and is particularly susceptible by electrostatic breakdown.The test circuit is damaged
Afterwards, can cause mistakenly to judge whether screen body is good.This for shield body production be very unfavorable.
Utility model content
Based on this, it is necessary to for the easy impaired problem of test circuit of circuit substrate, there is provided a kind of drive circuit
Plate and display device.
A kind of drive circuit board, it is characterised in that including：
Substrate；With
The test circuit being arranged on the substrate；
Cover type is arranged at the protective layer on the test circuit surface.
According to drive circuit board of the present utility model, test circuit is covered by protective layer.This way it is possible to avoid electrostatic is driving
There is accumulation of static electricity on dynamic circuit, and then the thin film transistor (TFT) for avoiding test circuit is breakdown.This is allowed at test circuit
In intact state, and then the harmful effect as caused by the damage of test circuit to screen body examination examination knot is avoided, this contributes to
Shield the production of body.
In one of the embodiments, the protective layer is made up of organic material.
The viscous characteristics that protective layer has made of organic material are advantageous to the protective layer and cover and be fixed on described
The surface of test circuit.The strength characteristics that the organic material has can avoid the test circuit from being broken by external stress
It is bad.
In one of the embodiments, the surface of the remote substrate of the protective layer has rough region.
The rough region can increase area when IC chip is pasted with the protective layer while can strengthen
Adhesiveness between the IC chip and the protective layer.
In one of the embodiments, the rough region is ripple, multiple pits, multiple raised, interlaced ditches
The combination of any one or more in gully and grid.
The firmness that area when the fit system of various structures can flexibly increase protective layer bonding is pasted with strengthening.
The pit, the described raised or ripple can strengthen the adhesiveness between the IC chip and the protective layer.
In one of the embodiments, the core that the rough region is in the protective layer is flat region, surrounding
Part is the rough region.
The IC chip uses more when being pasted on the protective layer in the surrounding of the protective layer
Conducting resinl, and a small amount of conducting resinl is used in the central area of protective layer, securing integrated circuit chip well is not only able to, and
And it can avoid excessively being pressed down against the central area of the corresponding grid of protective layer.
In one of the embodiments, also there is viewing area thin film transistor (TFT) array on the substrate, the protective layer with
Planarization layer on the viewing area thin film transistor (TFT) array is integrally formed.
Protective layer is integrally formed with the planarization layer on the viewing area thin film transistor (TFT) array can reduce process, improve
Operating efficiency.
In one of the embodiments, the protective layer is made up of inorganic material.
Inorganic material has certain intensity, has certain wear-resisting and compressive property.
In one of the embodiments, also there is connection unit, the connection unit and the test electricity on the substrate
Road is adjacent.The test circuit can send test signal by the connection unit to screen body.
In one of the embodiments, the connection unit includes two to be arranged in parallel, and at the test circuit
Between two connection units；Preferably, the test circuit and the connection unit are in the non-display area of the substrate,
In any side of the test circuit, the distance at the non-display area edge of the substrate to the connection unit side, with institute
It is equal to state distance of the opposite side of connection unit to the protective layer close to the side of the connection unit.
The connection unit, the protective layer disposed at equal distance can keep the uniformity of the substrate stress, can keep away
Exempt from the problem of stress is unbalance during IC chip crimping.
A kind of display device, including：
Drive circuit board, the drive circuit board include：Substrate；It is arranged at the test electricity of the non-display area of the substrate
Road；Cover type is arranged at the protective layer on the test circuit surface；It is arranged at the viewing area film of the viewing area of the substrate
Transistor array；The test circuit electrically connects with the viewing area thin film transistor (TFT) array of the viewing area.
Due to the protective layer on the test circuit surface, therefore the test circuit has reliable service behaviour, and
And the use for influenceing display device will not be damaged because of test circuit in display device normal use, the display device has
The longer life-span.
Brief description of the drawings
Fig. 1 is the drive circuit board schematic cross-section that the utility model embodiment provides；
Fig. 2 is protective layer and the signal of connection unit position relationship in the drive circuit board that the utility model embodiment provides
Figure；
Fig. 3 is the protective layer structural representation that the utility model embodiment provides；
Fig. 4 is the protective layer another kind structural representation that the utility model embodiment provides；
Fig. 5 is the protective layer ripple struction schematic diagram that the utility model embodiment provides；
Fig. 6 is the display device structure schematic diagram that the utility model embodiment provides.
Main element symbol description
Drive circuit board 10, data drive circuit 20, display device 30, scan drive circuit 40, substrate 100, test electricity
Road 200, connection unit 210, thin film transistor (TFT) 230, source electrode 231, drain electrode 232, grid 233, protective layer 300, flat region 301,
Viewing area thin film transistor (TFT) array 410, viewing area 500, non-display area 600, the edge 601,602 of non-display area 600.
Embodiment
In order that the technical solution of the utility model and technique effect are more clearly understood, below in conjunction with accompanying drawing to this practicality
New specific embodiment is described.It should be appreciated that specific embodiment described herein is only explaining that this practicality is new
Type, it is not used to limit the utility model.
Fig. 1 is referred to, the utility model provides a kind of drive circuit board 10.The drive circuit board 10 include substrate 100,
The test circuit 200 and cover type being arranged on the substrate 100 are arranged at the protection on the surface of test circuit 200
Layer 300.The substrate includes viewing area 500 and non-display area 600, and the test circuit 200 is arranged at the non-display area
600。
The substrate 100 can be glass substrate, can also be flexible plastic base, or be with some strength
Substrate made of other organic materials.
In one of the embodiments, the drive circuit board 10 also includes being arranged on the surface of substrate 100 being in
Two connection units 210 of non-display area 600.Described two connection units 210 are respectively arranged at the two of the test circuit 200
Side, and it is adjacent with the test circuit 200.In use, two connection units 210 respectively as screen body input pad and
Output pad.
In one embodiment, IC chip (not shown) can be electrically connected to by input pin and output pin
On input pad and output pad, and the IC chip may be at the top of the test circuit 200.So described collection
Communicated into circuit chip by input pad, output pad, input pin and output pin with drive circuit board 10 and control display to fill
Put 30.In one embodiment, coated with conduction also between corresponding input pad, output pad, input pin and output pin
Glue, electrical connection between realization and is fixed on the top of test circuit 200 by IC chip.The integrated circuit
The specific work process of chip is well known to the skilled artisan in the art, is repeated no more here.
In one of the embodiments, described two connection units 210 are symmetrically disposed in the two of the test circuit 200
Side.The connection unit 210 be symmetrical arranged in the both sides of test circuit 200 when can crimp the IC chip by
Dynamic balance, it is ensured that chip crimps effect, so as to strengthen the service life of the substrate 100.In a further advantageous embodiment, such as
Shown in Fig. 2, distance a, d at the edge 601,602 of the non-display area 600 to the corresponding side of connection unit 210 and two
Respective edges distance b, c of the connection unit 210 to the protective layer 300 is all equal, i.e. a=b=c=d.It is described non-aobvious
The edge 601,602 for showing area 600 can be the border of organic glue-line, preferably together be formed with the protective layer 300.It can manage
Solution, the connection unit 210, the disposed at equal distance of the test circuit 200 can keep the uniformity of the stress of substrate 100,
The substrate 100 can more effectively be avoided because discontinuity causes to damage.
Whether the test circuit 200 shows well for test panel body.The test circuit 200 can be to test panel
Whether the communication line and/or screen body image vegetarian refreshments of body damage.The test circuit 200 can include thin film transistor (TFT) 230 and
Interlock circuit, the thin film transistor (TFT) 230 include source electrode 231, drain electrode 232 and grid 233.Can by the test circuit 200
With to screen body input test signal.The test circuit 200 can include test cell.The test cell can be by multiple
Signalling channel is connected with the thin film transistor (TFT) 230.The application method of the test circuit 200 is as follows：The test cell to
The grid 233 provides gate-on voltage to cause the source electrode 231 and the conducting of drain electrode 232, the thin film transistor (TFT)
230 open.Next, the test cell can be tested by the thin film transistor (TFT) 230 to screen body input test signal
Whether the communication line and screen body display pixel for shielding body damage.
In order to ensure that thin film transistor (TFT) 230 in test circuit 200 and conducting wire are intact, in the test electricity that completes
After road 200, the protective layer 300 is formed in test circuit 200 cover type.The protective layer 300 is described to protect
Test circuit 200.For example, the protective layer 200 can by test circuit 200 with external environment is insulated keeps apart, so as to keep away
Exempt to produce accumulation of static electricity at the thin film transistor (TFT) 230 of the test circuit 200, and then avoid the quilt of thin film transistor (TFT) 230
Electrostatic breakdown, and cause the test circuit 200 to be damaged, this can make troubles to follow-up work.For example, the thin film transistor (TFT)
230 it is breakdown after can poorly influence shield body test result and can judge by accident screen body it is whether good.And then in subsequent step
In, it is necessary to more complicated reinspection step, with from being mistaken for finding out good screen in bad screen.In addition, the protective layer 300 can be with
Test circuit 200 is protected to avoid it from surprisingly being corroded, to ensure that test circuit 200 being capable of normal work during test.
In one embodiment, the protective layer 300 can be made up of organic material or inorganic material.It is preferable at one
In embodiment, the protective layer 300 can be made up of the planarization layer identical material with the viewing area 500.At another
In embodiment, the protective layer 300 can be SiOXFilm or SiNXFilm.In the situation that the protective layer 300 is formed by organic material
Under, the protective layer 300 can also have certain shock-absorbing capacity, can so avoid coming from the surface of test circuit 200
Or the IC chip on the protective layer 300 causes to damage because pressure is excessive to the test circuit 200.One
In individual embodiment, the thickness of the protective layer 300 is 1.5mm-2mm.Thickness is that 1.5mm-2mm protective layer 300 is not only able to
Solve the electrostatic problem of test circuit 200, and there is enough shock-absorbing capacities.
Preferably, conducting resinl is set further to fix the integrated electricity between protective layer 300 and IC chip
Road chip.In the preferred embodiment shown in Fig. 3, the surface of the remote substrate 100 of protective layer 300 has rough region.
For example, in the case where the protective layer 300 is organic matter, rough region or grid can be formed by way of photoetching；
In the case that the protective layer 300 is inorganic matter, rough region can be formed by way of etching the protective layer 300.Another
In one embodiment, the rough region can be densely arranged pit, projection, interlaced gully, ripple and its
Any of various combinations.In fact, rough region may be configured to any appropriate other patterns.It has been found that
By this structure, in the assembling process of the IC chip, can make the lower surface of the IC chip with
The rough region fitting of the protective layer 300 is pasted together.So, the rough region can increase the integrated circuit
Chip and the adhesion of protective layer 300, so that IC chip is rigidly joined together with protective layer 300.
The position of the rough region can be adjusted according to the different stress-bearing capabilities of the diverse location of test circuit 200
It is whole.For example, the rough region can be protective layer 300 whole surface or protective layer 300 surface part area
Domain.Preferably, the rough region can be arranged on the surrounding of the protective layer 300.Fig. 4 is referred to, wherein an implementation
In example, the core of the protective layer 300 is flat region 301, and peripheral part is the rough region.It is found by the applicant that：Institute
IC chip is stated when being pasted on 300 surface of protective layer, is used in the surrounding of the protective layer 300 more conductive
Glue, and a small amount of conducting resinl is used in the flat region 301 of protective layer 300, it is not only able to fix the integrated electricity well
Road chip, and can avoid excessively being pressed down against the central area of grid 233 corresponding to the protective layer 300.Thus, just subtract
The usage amount of conducting resinl is lacked, and thin film transistor (TFT) 230 has been played a protective role.
In the embodiment shown in fig. 5, the rough region of the outer surface of protective layer 300 is ripple.In the guarantor
In the case that sheath 300 is organic material, the rough region of corrugated form is preferable, and this is due to the structure of the ripple
Making can be with shallower, it is possible to reduce the usage amount of conducting resinl and reaches and firmly pastes the IC chip and the protection
The purpose of layer 300.
In one embodiment, the test circuit 200 electrically connects with the circuit of the viewing area 500.The test electricity
The protective layer 300 of the surface of road 200 covering can avoid the test circuit 200 from being corroded or damage.The drive circuit
During plate 10 makes, there are other manufacturing processes after the test circuit 200 is made.The protective layer 300 can be kept away
Exempt from test circuit 200 described in process is made to be scratched other or by other chemical reagent corroded.Therefore the test circuit
200 breaking phenomena would not occur, and then bad erroneous judgement will not be caused because of the damage of test circuit when shielding body examination examination.
The protective layer 300 can be formed in the following manner：
When the protective layer 300 is made with the planarization layer of the viewing area 500 for identical material, the protective layer
300 forming process can be：Planarization layer is laid on the viewing area 500 and the non-display area 600；Then by described in
The part of corresponding two connection units 210 of planarization layer leads to overetched mode and removed.So, the test circuit 200
The planarization layer of top be formed protective layer 300.It is understood that the rough region on the protective layer 300
Overetched mode can also be led to be formed.
When the protective layer 300 is inorganic material, the inorganic material film layer in the test circuit 200 can be passed through
And formed.
The utility model also provides a kind of display device 30, as shown in Figure 6.The display device 30 includes data-driven electricity
Road 20, scan drive circuit 40, the viewing area film electrically connected with the data drive circuit 20, the scan drive circuit 40
Transistor array 410.The viewing area thin film transistor (TFT) array 410 is in viewing area 500.The data drive circuit 20,
The scan drive circuit 40 can control the work of the viewing area thin film transistor (TFT) array 410.The He of test circuit 200
The connection unit 210 is in the non-display area 600.
Embodiment described above only expresses several embodiments of the present utility model, and its description is more specific and detailed,
But therefore it can not be interpreted as the limitation to the utility model patent scope.It should be pointed out that for the common of this area
For technical staff, without departing from the concept of the premise utility, various modifications and improvements can be made, these all belong to
In the scope of protection of the utility model.Therefore, the protection domain of the utility model patent should be determined by the appended claims.
Claims (9)
- A kind of 1. drive circuit board, it is characterised in that including：Substrate (100)；The test circuit (200) being arranged on the substrate (100)；WithCover type is arranged at the protective layer (300) on the test circuit (200) surface.
- 2. drive circuit board as claimed in claim 1, it is characterised in that the remote substrate of the protective layer (300) (100) surface has rough region.
- 3. drive circuit board as claimed in claim 2, it is characterised in that the rough region is ripple, multiple pits, multiple The combination of any one or more in raised, interlaced gully and grid.
- 4. drive circuit board as claimed in claim 2 or claim 3, it is characterised in that the rough region is in the protective layer (300) core is flat region (301), and peripheral part is the rough region.
- 5. the drive circuit board as any one of Claim 1-3, it is characterised in that also have on the substrate (100) On viewing area thin film transistor (TFT) array (410), the protective layer (300) and the viewing area thin film transistor (TFT) array (410) Planarization layer is integrally formed.
- 6. the drive circuit board as any one of Claim 1-3, it is characterised in that also have on the substrate (100) Connection unit (210), the connection unit (210) are adjacent with the test circuit (200).
- 7. drive circuit board as claimed in claim 6, it is characterised in that the connection unit (210) includes what is be arranged in parallel Two, and the test circuit (200) is between two connection units (210).
- 8. drive circuit board as claimed in claim 7, it is characterised in that the test circuit (200) and the connection unit (210) in the non-display area (600) in the substrate (100), in any side of the test circuit (200), the base Non-display area (600) edge of plate (100) to the connection unit (210) side distance, with the connection unit (210) Distance of the opposite side to the protective layer (300) close to the side of the connection unit (210) is equal.
- 9. a kind of display device, including：Drive circuit board, the drive circuit board include：Substrate (100)；It is arranged at the non-display area of the substrate (100) (600) test circuit (200)；Cover type is arranged at the protective layer (300) on the test circuit (200) surface；It is arranged at The viewing area thin film transistor (TFT) array (410) of the viewing area (500) of the substrate (100)；The test circuit (200) electrically connects with the viewing area thin film transistor (TFT) array (410).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720729599.1U CN207165216U (en) | 2017-06-20 | 2017-06-20 | Drive circuit board and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720729599.1U CN207165216U (en) | 2017-06-20 | 2017-06-20 | Drive circuit board and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207165216U true CN207165216U (en) | 2018-03-30 |
Family
ID=61711432
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720729599.1U Active CN207165216U (en) | 2017-06-20 | 2017-06-20 | Drive circuit board and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207165216U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018233374A1 (en) * | 2017-06-20 | 2018-12-27 | 昆山国显光电有限公司 | Driver circuit board and display device |
| CN111833742A (en) * | 2020-06-30 | 2020-10-27 | 合肥维信诺科技有限公司 | Display device |
-
2017
- 2017-06-20 CN CN201720729599.1U patent/CN207165216U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018233374A1 (en) * | 2017-06-20 | 2018-12-27 | 昆山国显光电有限公司 | Driver circuit board and display device |
| CN109102772A (en) * | 2017-06-20 | 2018-12-28 | 昆山国显光电有限公司 | Drive circuit board and display device |
| CN109102772B (en) * | 2017-06-20 | 2023-11-21 | 昆山国显光电有限公司 | Driving circuit board and display device |
| CN111833742A (en) * | 2020-06-30 | 2020-10-27 | 合肥维信诺科技有限公司 | Display device |
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