CN207150186U - A kind of interacted system of optical fiber wisdom cell micro-capacitance sensor - Google Patents
A kind of interacted system of optical fiber wisdom cell micro-capacitance sensor Download PDFInfo
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- CN207150186U CN207150186U CN201720875140.2U CN201720875140U CN207150186U CN 207150186 U CN207150186 U CN 207150186U CN 201720875140 U CN201720875140 U CN 201720875140U CN 207150186 U CN207150186 U CN 207150186U
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Abstract
This application discloses a kind of interacted system of optical fiber wisdom cell micro-capacitance sensor, it is related to micro-capacitance sensor technical field, to solve the problems, such as stability difference between multiple micro-capacitance sensors.The system includes：First micro-capacitance sensor, the second micro-capacitance sensor, breaker, outer net and load；The output end of first micro-capacitance sensor and the input of breaker connect；The output end of breaker is connected with outer net；The output end of first micro-capacitance sensor is connected with the output end of the second micro-capacitance sensor；The output end of second micro-capacitance sensor connects with load；First micro-capacitance sensor includes：The micro- source of first direct current, the first inverter and the first filter circuit；The micro- source of first direct current is connected with the input of the first inverter；The output end of first inverter is connected with the input of the first filter circuit；The output end of first filter circuit and the input of breaker connect.By the way that optical fiber wisdom cell micro-capacitance sensor reliability of operation and steady-state behaviour can be ensured using the system.
Description
Technical field
The application is related to micro-capacitance sensor technical field, more particularly to a kind of interacted system of optical fiber wisdom cell micro-capacitance sensor.
Background technology
With power optical fiber to family key problem in technology technology obtain important breakthrough, optical fiber composite low-voltage cable can collect optical cable,
Electric power transmission cable supports a variety of transmission technologys in one.The communication link provided by optical fiber to table in which way with user
Two-way interaction is established, turns into optical fiber to the key point of table construction.
With the continuous increase of environment and Pressure on Energy, optical fiber wisdom cell micro-capacitance sensor technology is increasingly paid attention to.And show
There are multiple optical fiber wisdom cell micro-capacitance sensor control structures in technology typically to use distributed AC servo system.It is each in distributed AC servo system
Micro battery uses identical control program, and the status of each micro battery is identical.All controlled using PQ when grid-connected, power output；
In isolated island, all controlled using VF, the support of voltage and frequency is provided to optical fiber wisdom cell micro-capacitance sensor.This control mode phase
Than for master ＆ slave control, once some website breaks down, also other websites can provide the support of voltage and frequency,
Redundancy is higher, and reliability has obtained larger guarantee.
For distributed AC servo system in order to control multiple micro batteries to make system stable, the droop control of commonplace use.Its
Middle frequency-active is sagging and amplitude-it is idle it is sagging be more commonly used mode, the sagging coefficient of appropriate control can be in micro battery
Between realize rational power contribution.In the prior art, it is proposed that the droop control scheme of similar PID structures, can be directed to down
Control dynamic property of hanging down is bad, improves dynamic characteristic and steady-state behaviour.Droop control scheme can bring frequency loss, specific control
Scheme processed is different, and frequency departure varies, and the lower a small range rapid fluctuations of frequency federation at steady state.
Utility model content
This application provides a kind of interacted system of optical fiber wisdom cell micro-capacitance sensor, to solve stabilization between multiple micro-capacitance sensors
The problem of property difference.
This application provides a kind of interacted system of optical fiber wisdom cell micro-capacitance sensor, the system includes：First micro-capacitance sensor,
Two micro-capacitance sensors, breaker, outer net and load；
The output end of first micro-capacitance sensor is connected with the input of the breaker；
The output end of the breaker is connected with the outer net；
The output end of first micro-capacitance sensor is connected with the output end of second micro-capacitance sensor；
The output end of second micro-capacitance sensor connects with the load；
First micro-capacitance sensor includes：The micro- source of first direct current, the first inverter and the first filter circuit；
The micro- source of first direct current is connected with the input of first inverter；
The output end of first inverter is connected with the input of first filter circuit；
The output end of first filter circuit is connected with the input of the breaker；
Second micro-capacitance sensor includes：The micro- source of second direct current, the second inverter and the second filter circuit；
The micro- source of second direct current is connected with the input of second inverter；
The output end of second inverter is connected with the input of second filter circuit；
The output end of second filter circuit is connected with the input of the breaker.
Preferably, first micro-capacitance sensor also includes the first mu balanced circuit；
The input of first mu balanced circuit is connected with the output end in the micro- source of the first direct current；
The output end of first mu balanced circuit is connected with the input of first inverter.
Preferably, second micro-capacitance sensor also includes the second mu balanced circuit；
The input of second mu balanced circuit is connected with the output end in the micro- source of the second direct current；
The output end of second mu balanced circuit is connected with the input of second inverter.
Preferably, the three-phase alternating current of first inverter output, including the first phase output terminal, the second phase output terminal and
Third phase output end.
Preferably, first filter circuit includes：First inverter side inductance, the first inverter side dead resistance, the
One filter capacitor, the first outer net side inductance, the first outer net side dead resistance, the second inverter side inductance, the second inverter side are posted
Raw resistance, the second filter capacitor, the second outer net side inductance, the second outer net side dead resistance, the 3rd inverter side inductance, the 3rd is inverse
Become device side dead resistance, the 3rd filter capacitor, the 3rd outer net side inductance, the 3rd outer net side dead resistance；
First phase output terminal is connected with one end of the first inverter side inductance；
The other end of the first inverter side inductance is connected with one end of the first inverter side dead resistance；
The other end of the first inverter side dead resistance is connected with one end of the described first outer net side inductance；
The other end of the first outer net side inductance is connected with one end of the described first outer net side dead resistance；
The other end of the first outer net side dead resistance is connected with the input of the breaker；
Second phase output terminal is connected with one end of the second inverter side inductance；
The other end of the second inverter side inductance is connected with one end of the second inverter side dead resistance；
The other end of the second inverter side dead resistance is connected with one end of the described second outer net side inductance；
The other end of the second outer net side inductance is connected with one end of the described second outer net side dead resistance；
The other end of the second outer net side dead resistance is connected with the input of the breaker；
The third phase output end is connected with one end of the 3rd inverter side inductance；
The other end of the 3rd inverter side inductance is connected with one end of the 3rd inverter side dead resistance；
The other end of the 3rd inverter side dead resistance is connected with one end of the described 3rd outer net side inductance；
The other end of the 3rd outer net side inductance is connected with one end of the described 3rd outer net side dead resistance；
The other end of the 3rd outer net side dead resistance is connected with the input of the breaker；
The other end of the first inverter side dead resistance is connected with one end of first filter capacitor；
The other end of first filter capacitor is connected with one end of second filter capacitor；
The other end of second filter capacitor is connected with the other end of the second inverter side dead resistance；
The one end of the other end of first filter capacitor also with the 3rd filter capacitor is connected；
The other end of the 3rd inverter side dead resistance is connected with the other end of the 3rd filter capacitor.
Preferably, the three-phase alternating current of second inverter output, including the 4th phase output terminal, the 5th phase output terminal and
6th phase output terminal.
Preferably, second filter circuit includes：4th inverter side inductance, the parasitic electricity of the 4th inverter side
Resistance, the 4th filter capacitor, the 4th outer net side inductance, the 4th outer net side dead resistance, the 5th inverter side inductance, the 5th inverter
Side dead resistance, the 5th filter capacitor, the 5th outer net side inductance, the 5th outer net side dead resistance, the 6th inverter side inductance, the
Six inverter side dead resistances, the 6th filter capacitor, the 6th outer net side inductance, the 6th outer net side dead resistance；
4th phase output terminal is connected with one end of the 4th inverter side inductance；
The other end of the 4th inverter side inductance is connected with one end of the 4th inverter side dead resistance；
The other end of the 4th inverter side dead resistance is connected with one end of the described 4th outer net side inductance；
The other end of the 4th outer net side inductance is connected with one end of the described 4th outer net side dead resistance；
The other end of the 4th outer net side dead resistance is connected with the input of the breaker；
5th phase output terminal is connected with one end of the 5th inverter side inductance；
The other end of the 5th inverter side inductance is connected with one end of the 5th inverter side dead resistance；
The other end of the 5th inverter side dead resistance is connected with one end of the described 5th outer net side inductance；
The other end of the 5th outer net side inductance is connected with one end of the described 5th outer net side dead resistance；
The other end of the 5th outer net side dead resistance is connected with the input of the breaker；
6th phase output terminal is connected with one end of the 6th inverter side inductance；
The other end of the 6th inverter side inductance is connected with one end of the 6th inverter side dead resistance；
The other end of the 6th inverter side dead resistance is connected with one end of the described 6th outer net side inductance；
The other end of the 6th outer net side inductance is connected with one end of the described 6th outer net side dead resistance；
The other end of the 6th outer net side dead resistance is connected with the input of the breaker；
The other end of the 4th inverter side dead resistance is connected with one end of the 4th filter capacitor；
The other end of 4th filter capacitor is connected with one end of the 5th filter capacitor；
The other end of 5th filter capacitor is connected with the other end of the 5th inverter side dead resistance；
The one end of the other end of 4th filter capacitor also with the 6th filter capacitor is connected；
The other end of the 6th inverter side dead resistance is connected with the other end of the 6th filter capacitor.
A kind of interacted system for optical fiber wisdom cell micro-capacitance sensor that the application provides, can ensure the micro- electricity of relation wisdom cell
Net has faster dynamic property, each optical fiber wisdom cell power network is provided voltage and frequency branch in islet operation
Support, and less frequency fluctuation and the loss of voltage are able to maintain that, while without directly mutual between each optical fiber wisdom cell
Join information to exchange, reduce installation cost, and be easy to construct.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme of the application, letter will be made to the required accompanying drawing used in embodiment below
Singly introduce, it should be apparent that, for those of ordinary skills, without having to pay creative labor,
Other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of interacted system structural representation of optical fiber wisdom cell micro-capacitance sensor of the application；
Fig. 2 is a kind of structural representation for first micro-capacitance sensor that the application provides；
Fig. 3 is a kind of structural representation for second micro-capacitance sensor that the application provides；
Fig. 4 is another optical fiber wisdom cell micro-capacitance sensor interacted system structural representation that the application provides.
Brief description of the drawings：The micro-capacitance sensors of 11- first, the micro-capacitance sensors of 12- second, 13- breakers, 14- outer nets, 15- loads, 21- the
The micro- source of one direct current, the inverters of 22- first, the phase output terminals of 221- first, the phase output terminals of 222- second, 223- third phase output ends,
The filter circuits of 23- first, the mu balanced circuits of 24- first, the micro- source of the direct currents of 31- second, the inverters of 32- second, the output of the phases of 321- the 4th
End, the phase output terminals of 322- the 5th, the phase output terminals of 323- the 6th, the filter circuits of 33- second, the mu balanced circuits of 34- second, 401- first
Inverter side inductance, 402- the first inverter side dead resistances, the filter capacitors of 403- first, the outer net side inductance of 404- first,
The outer net side dead resistances of 405- first, 406- the second inverter side inductance, 407- the second inverter side dead resistances, 408- second
Filter capacitor, the outer net side inductance of 409- second, the outer net side dead resistances of 410- second, the inverter side inductance of 411- the 3rd, 412-
3rd inverter side dead resistance, the filter capacitors of 413- the 3rd, the 3rd outer net side inductance of 414-, the parasitic electricity of the 3rd outer net sides of 415-
Hinder, the inverter side inductance of 416- the 4th, the inverter side dead resistances of 417- the 4th, the filter capacitors of 418- the 4th, outside 419- the 4th
Net side inductance, the 4th outer net side dead resistances of 420-, the inverter side inductance of 421- the 5th, the parasitic electricity of the inverter sides of 422- the 5th
Resistance, the filter capacitors of 423- the 5th, the 5th outer net side inductance of 424-, the 5th outer net side dead resistances of 425-, the inverters of 426- the 6th
Side inductance, the inverter side dead resistances of 427- the 6th, the filter capacitors of 428- the 6th, the 6th outer net side inductance of 429-, 430- the 6th
Outer net side dead resistance.
Embodiment
Referring to Fig. 1, a kind of interacted system structural representation of the optical fiber wisdom cell micro-capacitance sensor provided for the application.Referring to
Fig. 2 is a kind of structural representation for first micro-capacitance sensor that the application provides, and Fig. 3 is a kind of second micro-capacitance sensor that the application provides
Structural representation, Fig. 4 are another optical fiber wisdom cell micro-capacitance sensor interacted system structural representation that the application provides.
The interacted system for a kind of optical fiber wisdom cell micro-capacitance sensor that the application provides, as illustrated, the system includes：First
Micro-capacitance sensor 11, the second micro-capacitance sensor 12, breaker 13, outer net 14 and load 15；
The output end of first micro-capacitance sensor 11 is connected with the input of the breaker 13；
The output end of the breaker 13 is connected with the outer net 14；
The output end of first micro-capacitance sensor 11 is connected with the output end of second micro-capacitance sensor 12；
The output end of second micro-capacitance sensor 12 is connected with the load 15；
First micro-capacitance sensor 11 includes：The micro- source 21 of first direct current, the first inverter 22 and the first filter circuit 23；
The micro- source 21 of first direct current is connected with the input of first inverter 22；
The output end of first inverter 22 is connected with the input of first filter circuit 23；
The output end of first filter circuit 23 is connected with the input of the breaker 13；
Second micro-capacitance sensor 12 includes：The micro- source 31 of second direct current, the second inverter 32 and the second filter circuit 33；
The micro- source 31 of second direct current is connected with the input of second inverter 32；
The output end of second inverter 32 is connected with the input of second filter circuit 33；
The output end of second filter circuit 33 is connected with the input of the breaker 13.
First micro-capacitance sensor 11 and the second micro-capacitance sensor 12, it is the micro-capacitance sensor for belonging to different optical fiber wisdom cells, both essence
It is upper identical, here first, second be intended merely to conveniently distinguish, describe micro- electricity during only two micro-capacitance sensors in this application
Net is internal to be set, and the interconnection situation between micro-capacitance sensor, in this application the optical fiber wisdom cell pair to that can be included in system
The quantity for the micro-capacitance sensor answered is not done restriction and limited.The output end of first micro-capacitance sensor 11 connects with the output end of the second micro-capacitance sensor 12,
Both common output ends are connected with load 15, and both common output ends are also connected by breaker 13 with outer net 14.First
The micro-capacitance sensor 12 of micro-capacitance sensor 11 and second, it is single controlled end for outer net 14.For the first micro-capacitance sensor 11, first
The micro- source 21 of direct current, for providing DC voltage.First inverter 22 is used to DC voltage being transformed into alternating voltage.First filtering
Circuit 23 is used to suppress Inverter Dead-time effect and closed-loop system bandwidth to dead time effect.Second micro-capacitance sensor 12 and the first micro-capacitance sensor
11 is similar, and its function of including is also similar, is repeated no more here.The micro- micro- source 31 of the direct current of source 21 and second of first direct current,
Independent stable operation in micro-capacitance sensor, and cause coordinated operation between each micro- source of direct current.
It is to be incorporated into the power networks that the switch of breaker 13, which can control the operational mode of the first microgrid and the second microgrid, or isolated island
Operation.When breaker 13 changes operational mode, it is not necessary to inform the first micro-capacitance sensor 11, second micro-capacitance sensor 12 according to detecting
Local electricity can speculate the running status of itself, so not needing interconnection line to be communicated.
Under simultaneously net state, there are the voltage of the offer of outer net 14 and the support of frequency, therefore the first micro-capacitance sensor 11 and second is micro-
12, power network, which needs to export, specifies power.For and net state under, first in the first micro-capacitance sensor 11 and the second micro-capacitance sensor 12
The control of the inverter 32 of inverter 22 and second, indirect power control method is used in the application, that is, control output current to control
Power output processed；It is inverse to the first inverter 22 and second when the control for output current is advantageous to malfunction generation in addition
Become the protection of device 32, prevent excessively stream.Realized in the application using output current outer shroud capacitive current inner ring double loop control
The accurate output of grid-connected current, compensated for output current outer shroud using PI, eliminate stable state static difference and improve dynamic property.For electricity
Capacitance current inner ring, adoption rate controller, strengthening system damping, make system stable.
Preferably, first micro-capacitance sensor 11 also includes the first mu balanced circuit 24；
The input of first mu balanced circuit 24 is connected with the output end in the micro- source 21 of first direct current；
The output end of first mu balanced circuit 24 is connected with the input of first inverter 22.
In order to improve the stability of micro-capacitance sensor, in the first micro-capacitance sensor 11, the output end in the micro- source 21 of the first direct current, addition
First mu balanced circuit 24, stablize the output voltage in the micro- source 21 of the first direct current.Common direct current regulation circuit includes：Voltage-regulator diode
Mu balanced circuit, series connection adjustment pipe mu balanced circuit, switching mode mu balanced circuit and three end integrated stable voltage circuits.In the embodiment of the present application
The type of the direct current regulation circuit of use is not limited.
Preferably, second micro-capacitance sensor 12 also includes the second mu balanced circuit 34；
The input of second mu balanced circuit 34 is connected with the output end in the micro- source 31 of second direct current；
The output end of second mu balanced circuit 34 is connected with the input of second inverter 32.
It is similar with the first mu balanced circuit 24, for the purposes of improving the stability of micro-capacitance sensor, in the second micro-capacitance sensor 12, the
The output end in the micro- source 31 of two direct currents, the second mu balanced circuit 34 is added, stablize the output voltage in the micro- source 31 of the second direct current.
Preferably, the three-phase alternating current that first inverter 22 exports, including the first phase output terminal 221, second are mutually defeated
Go out end 222 and third phase output end 223.
Because domestic power grid can be drawn from industrial electrical network, so outer net 14 in this application refers to industrial electrical network.
Industrial electrical network is three-phase electricity, and what it is in the output of the first inverter 22 is also three-phase alternating current, and each phase of three-phase alternating current is all identical,
For the ease of distinguishing the three-phase alternating current for exporting the first inverter 22, it is mutually defeated to be respectively designated as the first phase output terminal 221, second
Go out end 222 and third phase output end 223.
Preferably, first filter circuit 23 includes：First inverter side inductance 401, the parasitic electricity of the first inverter side
Resistance 402, the first filter capacitor 403, the first outer net side inductance 404, the first outer net side dead resistance 405, the second inverter side electricity
Sense 406, the second inverter side dead resistance 407, the second filter capacitor 408, the second outer net side inductance 409, the second outer net side are posted
Raw resistance 410, the 3rd inverter side inductance 411, the 3rd inverter side dead resistance 412, the 3rd filter capacitor 413, outside the 3rd
Net side inductance 414, the 3rd outer net side dead resistance 415；
First phase output terminal 221 is connected with one end of the first inverter side inductance 401；
The other end of the first inverter side inductance 401 and one end of the first inverter side dead resistance 402 connect
Connect；
The other end of the first inverter side dead resistance 402 is connected with one end of the described first outer net side inductance 404；
The other end of the first outer net side inductance 404 is connected with one end of the described first outer net side dead resistance 405；
The other end of the first outer net side dead resistance 405 is connected with the input of the breaker 13；
Second phase output terminal 222 is connected with one end of the second inverter side inductance 406；
The other end of the second inverter side inductance 406 and one end of the second inverter side dead resistance 407 connect
Connect；
The other end of the second inverter side dead resistance 407 is connected with one end of the described second outer net side inductance 409；
The other end of the second outer net side inductance 409 is connected with one end of the described second outer net side dead resistance 410；
The other end of the second outer net side dead resistance 410 is connected with the input of the breaker 13；
The third phase output end 223 is connected with one end of the 3rd inverter side inductance 411；
The other end of the 3rd inverter side inductance 411 connects with one end of the 3rd inverter side dead resistance 412
Connect；
The other end of the 3rd inverter side dead resistance 412 is connected with one end of the described 3rd outer net side inductance 414；
The other end of the 3rd outer net side inductance 414 is connected with one end of the described 3rd outer net side dead resistance 415；
The other end of the 3rd outer net side dead resistance 415 is connected with the input of the breaker 13；
The other end of the first inverter side dead resistance 402 is connected with one end of first filter capacitor 403；
The other end of first filter capacitor 403 is connected with one end of second filter capacitor 408；
The other end of second filter capacitor 408 is connected with the other end of the second inverter side dead resistance 407；
The one end of the other end of first filter capacitor 403 also with the 3rd filter capacitor 413 is connected；
The other end of the 3rd inverter side dead resistance 412 is connected with the other end of the 3rd filter capacitor 413.
LCL filter circuits are used in this application, and each phase in the three-phase alternating current of the first inverter 22 output is all
It is filtered.When the first micro-capacitance sensor 11 is grid-connected with outer net 14, the first filter circuit 23 will switch caused by first inverter 22
Pulse voltage, electric current are transformed into continuous analog quantity.First filter circuit 23 can suppress undue fluctuation and the wave of output current
Impact is gushed, filters out high frequency electric caused by switch motion, the power output of the first inverter 22 is controlled, makes the first inverter 22
Obtain certain damping characteristic.
Preferably, the three-phase alternating current that second inverter 32 exports, including the 4th phase output terminal the 321, the 5th are mutually defeated
Go out the phase output terminal 323 of end 322 and the 6th.
Because domestic power grid can be drawn from industrial electrical network, so outer net 14 in this application refers to industrial electrical network.
Industrial electrical network is three-phase electricity, and what it is in the output of the second inverter 32 is also three-phase alternating current, and each phase of three-phase alternating current is all identical,
For the ease of distinguishing the three-phase alternating current for exporting the second inverter 32, it is mutually defeated to be respectively designated as the 4th phase output terminal the 321, the 5th
Go out the phase output terminal 323 of end 322 and the 6th.
Preferably, second filter circuit 33 includes：4th inverter side inductance 416, the 4th inverter side are posted
Raw resistance 417, the 4th filter capacitor 418, the 4th outer net side inductance 419, the 4th outer net side dead resistance 420, the 5th inverter
Side inductance 421, the 5th inverter side dead resistance 422, the 5th filter capacitor 423, the 5th outer net side inductance 424, the 5th outer net
Side dead resistance 425, the 6th inverter side inductance 426, the 6th inverter side dead resistance 427, the 6th filter capacitor 428, the
Six outer net side inductance 429, the 6th outer net side dead resistance 430；
4th phase output terminal 321 is connected with one end of the 4th inverter side inductance 416；
The other end of the 4th inverter side inductance 416 connects with one end of the 4th inverter side dead resistance 417
Connect；
The other end of the 4th inverter side dead resistance 417 is connected with one end of the described 4th outer net side inductance 419；
The other end of the 4th outer net side inductance 419 is connected with one end of the described 4th outer net side dead resistance 420；
The other end of the 4th outer net side dead resistance 420 is connected with the input of the breaker 13；
5th phase output terminal 322 is connected with one end of the 5th inverter side inductance 421；
The other end of the 5th inverter side inductance 421 connects with one end of the 5th inverter side dead resistance 422
Connect；
The other end of the 5th inverter side dead resistance 422 is connected with one end of the described 5th outer net side inductance 424；
The other end of the 5th outer net side inductance 424 is connected with one end of the described 5th outer net side dead resistance 425；
The other end of the 5th outer net side dead resistance 425 is connected with the input of the breaker 13；
6th phase output terminal 323 is connected with one end of the 6th inverter side inductance 426；
The other end of the 6th inverter side inductance 426 connects with one end of the 6th inverter side dead resistance 427
Connect；
The other end of the 6th inverter side dead resistance 427 is connected with one end of the described 6th outer net side inductance 429；
The other end of the 6th outer net side inductance 429 is connected with one end of the described 6th outer net side dead resistance 430；
The other end of the 6th outer net side dead resistance 430 is connected with the input of the breaker 13；
The other end of the 4th inverter side dead resistance 417 is connected with one end of the 4th filter capacitor 418；
The other end of 4th filter capacitor 418 is connected with one end of the 5th filter capacitor 423；
The other end of 5th filter capacitor 423 is connected with the other end of the 5th inverter side dead resistance 422；
The one end of the other end of 4th filter capacitor 418 also with the 6th filter capacitor 428 is connected；
The other end of the 6th inverter side dead resistance 427 is connected with the other end of the 6th filter capacitor 428.
LCL filter circuits are used in this application, and each phase in the three-phase alternating current of the second inverter 32 output is all
It is filtered.When the second micro-capacitance sensor 12 is grid-connected with outer net 14, the second filter circuit 33 will switch caused by second inverter 32
Pulse voltage, electric current are transformed into continuous analog quantity.Second filter circuit 33 can suppress undue fluctuation and the wave of output current
Impact is gushed, filters out high frequency electric caused by switch motion, the power output of the second inverter 32 is controlled, makes the second inverter 32
Obtain certain damping characteristic.
A kind of interacted system for optical fiber wisdom cell micro-capacitance sensor that the application provides, can ensure the micro- electricity of relation wisdom cell
Net has faster dynamic property, each optical fiber wisdom cell power network is provided voltage and frequency branch in islet operation
Support, and less frequency fluctuation and the loss of voltage are able to maintain that, while without directly mutual between each optical fiber wisdom cell
Join information to exchange, reduce installation cost, and be easy to construct.
In this specification between each embodiment identical similar part mutually referring to.Above-described practicality is new
Type embodiment does not form the restriction to scope of protection of the utility model.
Claims (7)
1. a kind of interacted system of optical fiber wisdom cell micro-capacitance sensor, it is characterised in that the system includes：First micro-capacitance sensor
(11), the second micro-capacitance sensor (12), breaker (13), outer net (14) and load (15)；
The output end of first micro-capacitance sensor (11) is connected with the input of the breaker (13)；
The output end of the breaker (13) is connected with the outer net (14)；
The output end of first micro-capacitance sensor (11) is connected with the output end of second micro-capacitance sensor (12)；
The output end of second micro-capacitance sensor (12) is connected with the load (15)；
First micro-capacitance sensor (11) includes：The micro- source of first direct current (21), the first inverter (22) and the first filter circuit (23)；
The micro- source of first direct current (21) is connected with the input of first inverter (22)；
The output end of first inverter (22) is connected with the input of first filter circuit (23)；
The output end of first filter circuit (23) is connected with the input of the breaker (13)；
Second micro-capacitance sensor (12) includes：The micro- source of second direct current (31), the second inverter (32) and the second filter circuit (33)；
The micro- source of second direct current (31) is connected with the input of second inverter (32)；
The output end of second inverter (32) is connected with the input of second filter circuit (33)；
The output end of second filter circuit (33) is connected with the input of the breaker (13).
2. the system as claimed in claim 1, it is characterised in that first micro-capacitance sensor (11) also includes the first mu balanced circuit
(24)；
The input of first mu balanced circuit (24) is connected with the output end of the micro- source of the first direct current (21)；
The output end of first mu balanced circuit (24) is connected with the input of first inverter (22).
3. the system as claimed in claim 1, it is characterised in that second micro-capacitance sensor (12) also includes the second mu balanced circuit
(34)；
The input of second mu balanced circuit (34) is connected with the output end of the micro- source of the second direct current (31)；
The output end of second mu balanced circuit (34) is connected with the input of second inverter (32).
4. the system as claimed in claim 1, it is characterised in that the three-phase alternating current of the first inverter (22) output, bag
Include the first phase output terminal (221), the second phase output terminal (222) and third phase output end (223).
5. system as claimed in claim 4, it is characterised in that first filter circuit (23) includes：First inverter side
Inductance (401), the first inverter side dead resistance (402), the first filter capacitor (403), the first outer net side inductance (404), the
One outer net side dead resistance (405), the second inverter side inductance (406), the second inverter side dead resistance (407), the second filter
Ripple electric capacity (408), the second outer net side inductance (409), the second outer net side dead resistance (410), the 3rd inverter side inductance
(411), the 3rd inverter side dead resistance (412), the 3rd filter capacitor (413), the 3rd outer net side inductance (414), outside the 3rd
Net side dead resistance (415)；
First phase output terminal (221) is connected with one end of the first inverter side inductance (401)；
The other end of the first inverter side inductance (401) and one end of the first inverter side dead resistance (402) connect
Connect；
The other end of the first inverter side dead resistance (402) is connected with one end of the described first outer net side inductance (404)；
The other end of the first outer net side inductance (404) is connected with one end of the described first outer net side dead resistance (405)；
The other end of the first outer net side dead resistance (405) is connected with the input of the breaker (13)；
Second phase output terminal (222) is connected with one end of the second inverter side inductance (406)；
The other end of the second inverter side inductance (406) and one end of the second inverter side dead resistance (407) connect
Connect；
The other end of the second inverter side dead resistance (407) is connected with one end of the described second outer net side inductance (409)；
The other end of the second outer net side inductance (409) is connected with one end of the described second outer net side dead resistance (410)；
The other end of the second outer net side dead resistance (410) is connected with the input of the breaker (13)；
The third phase output end (223) is connected with one end of the 3rd inverter side inductance (411)；
The other end of the 3rd inverter side inductance (411) connects with one end of the 3rd inverter side dead resistance (412)
Connect；
The other end of the 3rd inverter side dead resistance (412) is connected with one end of the described 3rd outer net side inductance (414)；
The other end of the 3rd outer net side inductance (414) is connected with one end of the described 3rd outer net side dead resistance (415)；
The other end of the 3rd outer net side dead resistance (415) is connected with the input of the breaker (13)；
The other end of the first inverter side dead resistance (402) is connected with one end of first filter capacitor (403)；
The other end of first filter capacitor (403) is connected with one end of second filter capacitor (408)；
The other end of second filter capacitor (408) is connected with the other end of the second inverter side dead resistance (407)；
The one end of the other end of first filter capacitor (403) also with the 3rd filter capacitor (413) is connected；
The other end of the 3rd inverter side dead resistance (412) is connected with the other end of the 3rd filter capacitor (413).
6. the system as claimed in claim 1, it is characterised in that the three-phase alternating current of the second inverter (32) output, bag
Include the 4th phase output terminal (321), the 5th phase output terminal (322) and the 6th phase output terminal (323).
7. system as claimed in claim 6, it is characterised in that second filter circuit (33) includes：4th inverter side
Inductance (416), the 4th inverter side dead resistance (417), the 4th filter capacitor (418), the 4th outer net side inductance (419), the
Four outer net side dead resistances (420), the 5th inverter side inductance (421), the 5th inverter side dead resistance (422), the 5th filter
Ripple electric capacity (423), the 5th outer net side inductance (424), the 5th outer net side dead resistance (425), the 6th inverter side inductance
(426), the 6th inverter side dead resistance (427), the 6th filter capacitor (428), the 6th outer net side inductance (429), outside the 6th
Net side dead resistance (430)；
4th phase output terminal (321) is connected with one end of the 4th inverter side inductance (416)；
The other end of the 4th inverter side inductance (416) connects with one end of the 4th inverter side dead resistance (417)
Connect；
The other end of the 4th inverter side dead resistance (417) is connected with one end of the described 4th outer net side inductance (419)；
The other end of the 4th outer net side inductance (419) is connected with one end of the described 4th outer net side dead resistance (420)；
The other end of the 4th outer net side dead resistance (420) is connected with the input of the breaker (13)；
5th phase output terminal (322) is connected with one end of the 5th inverter side inductance (421)；
The other end of the 5th inverter side inductance (421) connects with one end of the 5th inverter side dead resistance (422)
Connect；
The other end of the 5th inverter side dead resistance (422) is connected with one end of the described 5th outer net side inductance (424)；
The other end of the 5th outer net side inductance (424) is connected with one end of the described 5th outer net side dead resistance (425)；
The other end of the 5th outer net side dead resistance (425) is connected with the input of the breaker (13)；
6th phase output terminal (323) is connected with one end of the 6th inverter side inductance (426)；
The other end of the 6th inverter side inductance (426) connects with one end of the 6th inverter side dead resistance (427)
Connect；
The other end of the 6th inverter side dead resistance (427) is connected with one end of the described 6th outer net side inductance (429)；
The other end of the 6th outer net side inductance (429) is connected with one end of the described 6th outer net side dead resistance (430)；
The other end of the 6th outer net side dead resistance (430) is connected with the input of the breaker (13)；
The other end of the 4th inverter side dead resistance (417) is connected with one end of the 4th filter capacitor (418)；
The other end of 4th filter capacitor (418) is connected with one end of the 5th filter capacitor (423)；
The other end of 5th filter capacitor (423) is connected with the other end of the 5th inverter side dead resistance (422)；
The one end of the other end of 4th filter capacitor (418) also with the 6th filter capacitor (428) is connected；
The other end of the 6th inverter side dead resistance (427) is connected with the other end of the 6th filter capacitor (428).
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| CN107147150A (en) * | 2017-07-19 | 2017-09-08 | 云南电网有限责任公司电力科学研究院 | A kind of interacted system of optical fiber wisdom cell micro-capacitance sensor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107147150A (en) * | 2017-07-19 | 2017-09-08 | 云南电网有限责任公司电力科学研究院 | A kind of interacted system of optical fiber wisdom cell micro-capacitance sensor |
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