CN207124614U - The master-slave flip-flop and counter chain of a kind of radiation hardening - Google Patents
The master-slave flip-flop and counter chain of a kind of radiation hardening Download PDFInfo
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- CN207124614U CN207124614U CN201721063590.8U CN201721063590U CN207124614U CN 207124614 U CN207124614 U CN 207124614U CN 201721063590 U CN201721063590 U CN 201721063590U CN 207124614 U CN207124614 U CN 207124614U
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Abstract
The utility model discloses a kind of master-slave flip-flop of radiation hardening, the master-slave flip-flop is based on CMOS and including the master flip-flop with the first backfeed loop and the slave flipflop with second feed back loop, the first filter structure is provided with first backfeed loop, the second filter structure is provided with the second feed back loop, CMOS uses polysilicon gate and a length of 5um of grid in the master-slave flip-flop.A kind of counter chain formed by the cascade of above-mentioned master-slave flip-flop is also disclosed in the utility model.Master-slave flip-flop and counter chain in the utility model, radiation hardening is carried out from domain structure, the problems such as to alleviate digital sequential logical circuit raying influence and the change of caused electrical parameter, logic error or even disabler, improve the reliability of digital sequential logical circuit, the level of the working life of raising satellite in orbit, its anti-integral dose radiation and anti-single particle effect disclosure satisfy that the needs of extraordinary application device at this stage.
Description
Technical field
It the utility model is related to microelectronics technology.More particularly, to a kind of master-slave flip-flop of radiation hardening
And counter chain.
Background technology
With the fast development of science and technology, increasing electronic component and electronic equipment are needed in radiation environment
Use.Some components in electronic equipment easily cause when the factor such as the radiation in by external environment condition and illumination is influenceed
Some electrical parameters change, and some electronic component disablers can be possibly even caused when serious, and then make electronic equipment
Cisco unity malfunction and operation.
At present, cmos circuit is widely used in the radiation environments such as satellite nuclear weapon.Cmos circuit is particularly sensitive to radiating, often
The radioresistance integral dose radiation ability for advising the not reinforced cmos circuit of technique productions is less than 1 × 104Rad (Si), if super
The damage that this dosage will result in component is crossed, causes its cisco unity malfunction.And long-life satellite along its track run when,
The total radiation dose being subject to is up to 5 × 105Rad (Si), it is clear that can not meet longevity without the cmos circuit of radiation hardening
Order the requirement under satellite and nuclear radiation environment, it is therefore necessary to which radiation hardening is carried out to cmos circuit.
Common chip can produce some effects as caused by radiation, including total dose effect and simple grain under radiation environment
Sub- effect.Also there is many high energy charged particles in space, high energy particle incides semiconductor devices or IC chip
Highdensity electron hole pair is produced when middle, these electron hole pairs can collected by the sensitive reverse biased pn junction of device, so as to
Circuit logic state is occurred to overturn or is induced parasitic structure conducting and cause device permanent damage itself.Cause spacecraft
The high energy charged particles of device single particle effect are mainly high energy proton and high-energy heavy ion.With the reduction of integrated circuit dimensions
With being thinned for oxidated layer thickness, single particle phenomenon is increasingly paid attention to by researcher, and these single particle effects include simple grain
Sub- upset, single-ion transient state, locking single particle, single event burnout, the breakdown of single-particle grid and single event function interrupt etc..
With the continuous diminution of cmos circuit size, influence of the single particle effect to integrated circuit has been increasingly becoming radiation ring
The main reason for border influences on integrated circuit, especially sequence circuit part, it is easy to by radiate influenceed and can not be normal
Work.Nucleus module in sequence circuit is master-slave flip-flop even chain of flip-flops i.e. counter chain, and its domain structure is mostly
It is densely arranged, and its internal basic logic door belongs to circuit sensitive area, the pole in radiation environment without any processing
Single-particle inversion easily occurs in it, its logic is produced mistake, therefore the radiation hardening of sequence circuit part is mainly principal and subordinate
The radiation hardening of igniter module.
Accordingly, it is desirable to provide the master-slave flip-flop and counter chain of a kind of radiation hardening.
The content of the invention
The purpose of this utility model is the master-slave flip-flop and counter chain for providing a kind of radiation hardening, from structure version
Radiation hardening is carried out on figure, is influenceed and the change of caused electrical parameter, logic mistake with alleviating digital sequential logical circuit raying
The problems such as missing even disabler, to improve the reliability of digital sequential logical circuit, improves the working life of satellite in orbit.
To reach above-mentioned purpose, the utility model uses following technical proposals：
One side of the present utility model provides a kind of master-slave flip-flop of radiation hardening, master-slave flip-flop be based on CMOS and
Including the master flip-flop with the first backfeed loop and the slave flipflop with second feed back loop, set in the first backfeed loop
There is the first filter structure, the second filter structure is provided with second feed back loop, CMOS uses polysilicon gate in master-slave flip-flop
Pole and a length of 5um of grid.
In the utility model, in order to solve influence of the single particle effect to device logic function, metal-oxide-semiconductor is suitably increased
Size simultaneously adds filter structure to solve single particle effect.Specifically, in the utility model, CMOS is used more in master-slave flip-flop
Polysilicon gate and a length of 5um of grid, channel length increase, and the opening speed of metal-oxide-semiconductor are reduced, when single-particle incidence metal-oxide-semiconductor is active
The pulsewidth of due to voltage spikes caused by area is smaller, is insufficient to allow metal-oxide-semiconductor is fully on just to recover normal, can effectively reduce simple grain
Influence caused by sub- effect.On the basis of above-mentioned, filter structure is added in single master-slave flip-flop structure, can both be used as wire
Positive feedback is formed to trigger, improves corresponding speed, it is empty more can suitably to reduce electronics caused by high energy particle incidence active area
Cave is that energy flows into filter structure rather than directly acts on metal-oxide-semiconductor, efficiently solves single particle effect to entrained energy
Caused by influence.
Preferably, master-slave flip-flop is the master-slave flip-flop based on NAND gate.
It is further preferred that master-slave flip-flop includes master flip-flop and slave flipflop, wherein
Master flip-flop, including the with the first transmission gate and the first NAND gate first transmission loop and including second with it is non-
First backfeed loop of door, the first filter structure and the second transmission gate, master flip-flop input through the first transmission gate with first and
NOT gate first input end is connected, and the first NAND gate data output end inputs as master flip-flop output end and the second NAND gate first
End is connected, and the second NAND gate output end is connected to the first NAND gate first through the first filter structure and the second transmission gate successively and inputted
End；
Slave flipflop, including the with the 3rd transmission gate and the 3rd NAND gate second transmission loop and including the 4th with it is non-
The second feed back loop of door, the second filter structure and the 4th transmission gate, slave flipflop input through the 3rd transmission gate with the 3rd and
NOT gate first input end is connected, and the 3rd NAND gate data output end inputs as slave flipflop output end and the 4th NAND gate first
End is connected, and the 4th NAND gate output end is connected to the 3rd NAND gate first through the second filter structure and the 4th transmission gate successively and inputted
End；
First, second, third and the 4th transmission gate include the first and second control terminals, wherein the first control terminal and the 3rd
NAND gate output end is connected, and the second control terminal is connected with the 4th NAND gate output end；
First the second input of NAND gate and the 4th the second input of NAND gate are defeated as clear terminal, the second NAND gate second
Enter end and the 3rd the second input of NAND gate as set end；
Data input pin of the master flip-flop input as master-slave flip-flop, master flip-flop output end and slave flipflop it is defeated
Enter end to be connected, result output end of the slave flipflop output end as master-slave flip-flop.
Preferably, master-slave flip-flop is the master-slave flip-flop based on nor gate.
It is further preferred that master-slave flip-flop includes master flip-flop and slave flipflop, wherein
Master flip-flop, including the with the first transmission gate and the first nor gate first transmission loop and including second or non-
First backfeed loop of door, the first filter structure and the second transmission gate, master flip-flop input through the first transmission gate and first or
NOT gate first input end is connected, and the first nor gate data output end inputs as master flip-flop output end and the second nor gate first
End is connected, and the second nor gate output end is connected to the first nor gate first through the first filter structure and the second transmission gate successively and inputted
End；
Slave flipflop, including the with the 3rd transmission gate and the 3rd nor gate second transmission loop and including the 4th or non-
The second feed back loop of door, the second filter structure and the 4th transmission gate, slave flipflop input through the 3rd transmission gate and the 3rd or
NOT gate first input end is connected, and the 3rd nor gate data output end inputs as slave flipflop output end and four nor gate first
End is connected, and four nor gate output end is connected to the 3rd nor gate first through the second filter structure and the 4th transmission gate successively and inputted
End；
First, second, third and the 4th transmission gate include the first and second control terminals, wherein the first control terminal and the 3rd
Nor gate output end is connected, and the second control terminal is connected with four nor gate output end；
First the second input of nor gate and the input of four nor gate second are defeated as set end, the second nor gate second
Enter end and the 3rd the second input of nor gate as clear terminal；
Data input pin of the master flip-flop input as master-slave flip-flop, master flip-flop output end and slave flipflop it is defeated
Enter end to be connected, result output end of the slave flipflop output end as master-slave flip-flop.
Preferably, master-slave flip-flop is the master-slave flip-flop based on NOT gate.
In master-slave flip-flop based on NOT gate, there is substantially phase with the above-mentioned master-slave flip-flop based on NAND gate/nor gate
Same structure, its difference are not include set end and clear terminal.
Preferably, the first filter structure and the second filter structure are RC filter structures.
In the master-slave flip-flop based on NAND gate, the second NAND gate passes through first resistor in the first filter structure and second
Defeated door and the first electric capacity are connected, first electric capacity other end ground connection；4th NAND gate is through second resistance in the second filter structure and the
Four transmission gates and the second electric capacity are connected, second electric capacity other end ground connection；
In the master-slave flip-flop based on nor gate, the second nor gate passes through first resistor in the first filter structure and second
Defeated door and the first electric capacity are connected, first electric capacity other end ground connection；Four nor gate is through second resistance in the second filter structure and the
Four transmission gates and the second electric capacity are connected, second electric capacity other end ground connection.
Preferably, the gate oxide thickness of polysilicon gate is less than 500 angstroms.
To solve integral dose radiation to the cut-in voltage even influence of device overall performance, gate oxide thickness should be thinned.
Using polysilicon as grid in the utility model, compared to more traditional aluminum gate process, gate oxide thickness may be configured as being less than
500 angstroms, and do not interfere with the overall performance of master-slave flip-flop structure.
Preferably, polysilicon gate using self-registered technology and is arranged to annular.
The polysilicon gate of master-slave flip-flop uses self-registered technology, can ensure that the length of conducting channel is accurate, simultaneously
Polysilicon gate design, which is circularized, can effectively separate source-drain electrode, efficiently reduce the electrical leakage problems of active area.
Another aspect of the present utility model provides a kind of counter chain being made up of master-slave flip-flop cascade, counter chain bag
Include N number of master-slave flip-flop, between N number of master-slave flip-flop between be separated with the first spacing.
After single master-slave flip-flop structure carries out radiation hardening, the chain of flip-flops structure formed to it is still needed in domain
Structural strengthening is carried out in placement-and-routing.Should be spaced apart when being joined end to end between master-slave flip-flop, make signal in transmission
There is certain interval, and preferably this interval is equal, ensures the time consistency per one-level trigger process signal.
Preferably, a master-slave flip-flop group is formed in N number of master-slave flip-flop per M, is spaced between master-slave flip-flop group
Have the second spacing, between M master-slave flip-flop inside master-slave flip-flop group between be separated with the 3rd spacing, the second spacing is more than the 3rd
Spacing, wherein, M, N are natural number, and its N is M integral multiple.
When chain of flip-flops is longer, it is one group preferably per level Four trigger, takes array to arrange, signal is passed through four
The level Four trigger that preset space length enters next group can be passed through after level trigger, produced when single-particle incidence metal-oxide-semiconductor active area
Raw electron hole pair will not be in moment to next level structure and part reversely PN junction generation impact, so as to reduce single particle effect
Influence.
The beneficial effects of the utility model are as follows：
In the master-slave flip-flop of radiation hardening of the present utility model, CMOS uses polysilicon gate and a length of 5um of grid,
Master-slave flip-flop inside configuration adds RC filter circuits, and trigger structure is formed and fed back, and reduces produced by under radiation condition
The influence to logic state in sequential logical circuit of electric charge or energy, can effectively solve cut-in voltage caused by total dose effect
Drift and electrical leakage problems, while coordinate RC filter circuits to successfully manage single particle effect, especially most commonly seen simple grain
Son upset effect.For the counter chain of multiple master-slave flip-flops composition, by setting the spacing between each master-slave flip-flop, make
Electron hole pair caused by single-particle incidence metal-oxide-semiconductor active area will not be in moment to next level structure and part reversely PN junction production
Raw impact, so as to reduce the influence of single particle effect.Master-slave flip-flop and counter chain in the utility model, from domain structure
Upper carry out radiation hardening, influenceed and the change of caused electrical parameter, logic error with alleviating digital sequential logical circuit raying
Or even the problems such as disabler, the reliability of digital sequential logical circuit is improved, improves the working life of satellite in orbit, it is anti-total
The level of dose and anti-single particle effect disclosure satisfy that the needs of extraordinary application device at this stage.
Brief description of the drawings
Specific embodiment of the present utility model is described in further detail below in conjunction with the accompanying drawings.
Fig. 1 shows master-slave flip-flop structural representation in the prior art.
Fig. 2 shows master-slave flip-flop structural representation in the utility model.
Fig. 3 shows counter chain structural representation in the prior art.
Fig. 4 shows the utility model Counter chain structure schematic diagram.
Embodiment
In order to illustrate more clearly of the utility model, the utility model is done into one with reference to preferred embodiments and drawings
The explanation of step.Similar part is indicated with identical reference in accompanying drawing.It will be appreciated by those skilled in the art that below
Specifically described content is illustrative and be not restrictive, and should not limit the scope of protection of the utility model with this.
The master-slave flip-flop and counter chain of the present utility model for providing a kind of radiation hardening, it is enterprising from structure domain
Row radiation hardening, with alleviate digital sequential logical circuit raying influence and caused electrical parameter change, logic error even
The problems such as disabler, to improve the reliability of digital sequential logical circuit, improve the working life of satellite in orbit.
In existing trigger, internal basic logic door belongs to circuit sensitive area, in spoke without any processing
Penetrate and single-particle inversion extremely easily occurs in environment, its logic is produced mistake.In the utility model, in order to solve single-particle effect
The influence of device logic function is tackled, the size of metal-oxide-semiconductor is suitably increased and adds filter structure to solve single particle effect.Tool
Body, in the utility model, CMOS uses polysilicon gate and a length of 5um of grid in master-slave flip-flop, channel length increase, reduces
The opening speed of metal-oxide-semiconductor, when the pulsewidth of due to voltage spikes caused by single-particle incidence metal-oxide-semiconductor active area is smaller, it is not enough to
Make metal-oxide-semiconductor is fully on just to recover normal, can effectively reduce influence caused by single particle effect.On the basis of above-mentioned, in single master
Filter structure is added in slave flipflop structure, can both be used as wire to form positive feedback to trigger, and improve corresponding speed, more may be used
Suitably to reduce the energy entrained by electron hole pair caused by high energy particle incidence active area, be energy flow into filter structure and
It is not to directly act on metal-oxide-semiconductor, efficiently solves influence caused by single particle effect.
Illustrated below by the master-slave flip-flop structure compared in prior art and the utility model：
In existing master-slave flip-flop, as shown in figure 1, the master-slave flip-flop includes master flip-flop and slave flipflop.Specifically
Ground, master flip-flop include the first transmission gate tg1, the second transmission gate tg2, the first NAND gate u1 and the second NAND gate u2.The master touches
The input of hair device is connected to a first NAND gate u1 input, the first NAND gate u1 output through the first transmission gate tg1
End is connected to a second NAND gate u2 input, and the second NAND gate u2 output end is connected to the through the second transmission gate tg2
One NAND gate u1 above-mentioned input, wherein, the first transmission gate tg1 and the first NAND gate u1 form being transmitted back to for master flip-flop
Road, the second transmission gate tg2 and the second NAND gate u2 form the backfeed loop of master flip-flop；The input of the slave flipflop is through the 3rd
Transmission gate tg3 is connected to a 3rd NAND gate u3 input, and the 3rd NAND gate u3 output end is connected to the 4th NAND gate
A u4 input, the 4th NAND gate u4 output end are connected to the above-mentioned defeated of the 3rd NAND gate u3 through the 4th transmission gate tg4
Enter end, wherein, the 3rd transmission gate tg3 and the 3rd NAND gate u3 form the transmission loop of slave flipflop, the 4th transmission gate tg4 and the
Four NAND gate u4 form the backfeed loop of slave flipflop.Data input pin D of the master flip-flop input as master-slave flip-flop, it is main
Trigger output end is connected with the input of slave flipflop, result output end Q of the slave flipflop output end as master-slave flip-flop,
The backward end Qn of 4th NAND gate output end output end as a result.
First transmission gate tg1, the second transmission gate tg2, the 3rd transmission gate tg3 and the 4th transmission gate tg4 include the first and
The second two control terminals, the first control terminal CK are connected with result output end Q, the second control terminal and the first control terminal each other reversely and
It is connected with the backward end Qn of result output end.Another input of first NAND gate and another input conduct of the 4th NAND gate
Clear terminal C is used to be zeroed out the master-slave flip-flop, another input of the second NAND gate and the 3rd NAND gate it is another defeated
Enter end to be used to carry out set to the master-slave flip-flop as set end S.
MOS doors of the prior art are handled without any radiation hardening, and grid width is also only 2.6um, grid oxygen
Change thickness degree and be more than 500 angstroms, after integral dose radiation experiment is carried out, the threshold voltage and source-drain of pipe have more obvious
Change；Carrying out single particle effect during single-particle radiation test, clearly, especially single-particle inversion is very serious.
Master-slave flip-flop structure in one specific embodiment of the utility model, as shown in Fig. 2 the master-slave flip-flop includes
Master flip-flop and slave flipflop.Specifically, master flip-flop includes the first transmission gate TG1, the second transmission gate TG2, the first NAND gate
U1, the second NAND gate U2 and the first filter structure RC1.The input of the master flip-flop is connected to first through the first transmission gate TG1
A NAND gate U1 input, the first NAND gate U1 output end are connected to a second NAND gate U2 input, and second
NAND gate U2 output end is connected to the upper of the first NAND gate U1 by the first filter structure RC1 and the second transmission gate TG2 respectively
Input is stated, wherein, the transmission loop of the first transmission gate TG1 and the first NAND gate U1 composition master flip-flops, the second transmission gate
TG2, the first filter structure RC1 and the second NAND gate U2 form the backfeed loop of master flip-flop, and the second NAND gate U2 is through the first filter
First resistor is connected with the second transmission gate TG2 and the first electric capacity in wave structure RC1, first electric capacity other end ground connection；Should be from triggering
The input of device is connected to a 3rd NAND gate U3 input, the 3rd NAND gate U3 output end through the 3rd transmission gate TG3
Be connected to a 4th NAND gate U4 input, the 4th NAND gate U4 output end successively by the second filter structure RC2 and
4th transmission gate TG4 is connected to the 3rd NAND gate U3 above-mentioned input, wherein, the 3rd transmission gate TG3 and the 3rd NAND gate U3
The transmission loop of slave flipflop is formed, the 4th transmission gate TG4, the second filter structure RC2 and the 4th NAND gate U4 are formed from triggering
The backfeed loop of device, the 4th NAND gate U4 is through second resistance in the second filter structure RC2 and the 4th transmission gate TG4 and the second electric capacity
It is connected, second electric capacity other end ground connection.Data input pin D of the master flip-flop input as master-slave flip-flop, master flip-flop are defeated
Go out end with the input of slave flipflop to be connected, result output end Q of the slave flipflop output end as master-slave flip-flop, the 4th with it is non-
The backward end Qn of gate output terminal output end as a result.
First transmission gate TG1, the second transmission gate TG2, the 3rd transmission gate TG3 and the 4th transmission gate TG4 include the first and
The second two control terminals, the first control terminal CK are connected with result output end Q, the second control terminal and the first control terminal each other reversely and
It is connected with the backward end Qn of result output end.Another input of first NAND gate and another input conduct of the 4th NAND gate
Clear terminal C is used to be zeroed out the master-slave flip-flop, another input of the second NAND gate and the 3rd NAND gate it is another defeated
Enter end to be used to carry out set to the master-slave flip-flop as set end S.
In master-slave flip-flop in the present embodiment, the gate oxide thickness of polysilicon gate is less than 500 angstroms.To solve total agent
Amount radiation reduces gate oxide thickness to the cut-in voltage even influence of device overall performance.Using more in the utility model
Crystal silicon is as grid, and compared to more traditional aluminum gate process, gate oxide thickness may be configured as less than 500 angstroms, excellent in the present embodiment
Selection of land is 420 angstroms, and does not interfere with the overall performance of master-slave flip-flop structure.The polysilicon gate of master-slave flip-flop is used from right
It quasi- technique, can ensure that the length of conducting channel is accurate, while polysilicon gate design is circularized and can effectively separate source and drain
Pole, efficiently reduce the electrical leakage problems of active area.
The thinned drift for effectively reducing threshold voltage of gate oxide thickness and source-drain；5um grid length expands
The entire area of device, energy caused by single-particle incidence is set to be difficult to produce shadow to next stage pipe and sensitive reversely PN junction
Ring, effectively control the influence of single particle effect；The setting of reinforced concrete structure has not only acted as the effect of current limliting and filtering, can more incite somebody to action
Radiation environment acts on caused electric charge and energy in integrated circuit and shares or release, prevent energy directly act on metal-oxide-semiconductor or
On PN junction, circuit is caused to damage.In this structure and metal-oxide-semiconductor grid grow and the design of gate oxide thickness, are carrying out total agent
After measuring radiation test, the threshold voltage and source-drain of pipe only have very small change, threshold voltage variation amount 0.1V with
Under, leaked electricity after irradiation and be no more than 5uA；Single particle effect is very faint during progress single-particle radiation test, and it is whole not to realize experiment
Generation single-particle inversion.
The utility model also provides a kind of counter chain being made up of master-slave flip-flop cascade.
In the prior art, as shown in figure 3, being cascaded by master-slave flip-flop in the counter chain formed, multiple master-slave flip-flops
It is disposed proximate to, single master-slave flip-flop structure therein is also unguyed master-slave flip-flop structure, integral dose radiation and simple grain
The structure occurs that serious electrical parameter is overproof and single-particle inversion phenomenon after sub- radiation test.Without the master of radiation hardening
Slave flipflop and master-slave flip-flop chain can not adaptive radiation environment, serious electrical parameter change and single particle effect can be produced, led
Cause component disabler.
In one specific embodiment of the utility model, counter chain includes N number of master-slave flip-flop, N number of master-slave flip-flop it
Between between be separated with the first spacing.After single master-slave flip-flop structure carries out radiation hardening, the chain of flip-flops structure that is formed to it
Still need to carry out structural strengthening in laying out pattern wiring.Should be spaced apart when being joined end to end between master-slave flip-flop, make letter
Number there is certain interval in transmission, and preferably this interval is equal, ensures the time one per one-level trigger process signal
Cause.Preferably, a master-slave flip-flop group is formed in N number of master-slave flip-flop per M, between master-slave flip-flop group between be separated with second
Spacing, between M master-slave flip-flop inside master-slave flip-flop group between be separated with the 3rd spacing, the second spacing is more than the 3rd spacing,
Wherein, M, N are natural number, and its N is M integral multiple.When chain of flip-flops is longer, it is one group preferably per level Four trigger, adopts
Take array to arrange, signal is passed through the level Four trigger that preset space length enters next group after level Four trigger, when
Electron hole pair caused by single-particle incidence metal-oxide-semiconductor active area will not be in moment to next level structure and part reversely PN junction production
Raw impact, so as to reduce the influence of single particle effect.
As shown in figure 4, in the present embodiment, carry out once turning down stacking processing per level Four master-slave flip-flop structure.By list
The radiation hardening processing of individual master-slave flip-flop structure, threshold voltage shift and electrical leakage problems caused by integral dose radiation are
It is resolved, but the effect of anti-single particle effect falls flat after composition chain of flip-flops, therefore carried out in structure
The processing of reflexed stacking, the interval of every one-level trigger is expanded, and is turned round per the cabling between level Four trigger,
Increasing the transmission time of signal, it is therefore prevented that energy caused by single-particle instantaneously acts on the grid of next stage or sensitive PN junction,
Cause logic error or device damage.In addition, the utility model Counter chain can not only reduce gradient in production and miss
The influence of difference, it can more increase appropriate monitoring, alarming even reset circuit between every level Four, if really produced in radiation environment
Logic error is given birth to and can know from outside it is even possible that it is internally adjusted, be advantageous to improve overall reliability.
Above-described embodiment illustrates by taking NAND gate as an example, it should be noted that master-slave flip-flop of the present utility model and meter
Number device chains can also be used for nor gate or NOT gate composition trigger in, its differ only in the presence or absence of set end and clear terminal or
The setting of low and high level.Further, the master-slave flip-flop in the utility model is not limited to the form in above-described embodiment, its
Can be rest-set flip-flop, JK flip-flop and d type flip flop etc..
Belong to " first ", " second " etc. in specification and claims of the present utility model and above-mentioned accompanying drawing are to be used for
Different objects is distinguished, rather than for describing particular order.In addition, term " comprising " and " having " and their any changes
Shape, it is intended that cover non-exclusive include.Such as contain the process of series of steps or unit, method, system, product or
The step of equipment is not limited to list or unit, but alternatively also include the step of not listing or unit, or it is optional
Ground is also included for these processes, method or the intrinsic gas step of equipment or unit.
Obviously, above-described embodiment of the present utility model is only intended to clearly illustrate the utility model example, and
It is not the restriction to embodiment of the present utility model, for those of ordinary skill in the field, in described above
On the basis of can also make other changes in different forms, all embodiments can not be exhaustive here,
It is every to belong to obvious changes or variations that the technical solution of the utility model is extended out still in of the present utility model
The row of protection domain.
Claims (10)
1. a kind of master-slave flip-flop of radiation hardening, it is characterised in that the master-slave flip-flop is based on CMOS and including having
The master flip-flop of first backfeed loop and the slave flipflop with second feed back loop, the is provided with first backfeed loop
One filter structure, the second filter structure is provided with the second feed back loop, CMOS uses polycrystalline in the master-slave flip-flop
Silicon gate and a length of 5um of grid.
2. the master-slave flip-flop of radiation hardening according to claim 1, it is characterised in that the master-slave flip-flop is base
In the master-slave flip-flop of NAND gate.
3. the master-slave flip-flop of radiation hardening according to claim 2, it is characterised in that the master-slave flip-flop includes
Master flip-flop and slave flipflop, wherein
Master flip-flop, including the with the first transmission gate and the first NAND gate first transmission loop and including the second NAND gate, the
First backfeed loop of one filter structure and the second transmission gate, master flip-flop input is through the first transmission gate and the first NAND gate
One input is connected, and the first NAND gate data output end is as master flip-flop output end and the second NAND gate first input end phase
Even, the second NAND gate output end is connected to the first NAND gate first input end through the first filter structure and the second transmission gate successively；
Slave flipflop, including the with the 3rd transmission gate and the 3rd NAND gate second transmission loop and including the 4th NAND gate, the
The second feed back loop of two filter structures and the 4th transmission gate, slave flipflop input is through the 3rd transmission gate and the 3rd NAND gate
One input is connected, and the 3rd NAND gate data output end is as slave flipflop output end and the 4th NAND gate first input end phase
Even, the 4th NAND gate output end is connected to the 3rd NAND gate first input end through the second filter structure and the 4th transmission gate successively；
Described first, second, third and the 4th transmission gate include the first and second control terminals, wherein the first control terminal and the 3rd
NAND gate output end is connected, and the second control terminal is connected with the 4th NAND gate output end；
First the second input of NAND gate and the 4th the second input of NAND gate are as clear terminal, second the second input of NAND gate
With the 3rd the second input of NAND gate as set end；
The input of data input pin of the master flip-flop input as master-slave flip-flop, master flip-flop output end and slave flipflop
It is connected, result output end of the slave flipflop output end as master-slave flip-flop.
4. the master-slave flip-flop of radiation hardening according to claim 1, it is characterised in that the master-slave flip-flop is base
In the master-slave flip-flop of nor gate.
5. the master-slave flip-flop of radiation hardening according to claim 4, it is characterised in that the master-slave flip-flop includes
Master flip-flop and slave flipflop, wherein
Master flip-flop, including the with the first transmission gate and the first nor gate first transmission loop and including the second nor gate, the
First backfeed loop of one filter structure and the second transmission gate, master flip-flop input is through the first transmission gate and the first nor gate
One input is connected, and the first nor gate data output end is as master flip-flop output end and the second nor gate first input end phase
Even, the second nor gate output end is connected to the first nor gate first input end through the first filter structure and the second transmission gate successively；
Slave flipflop, including the with the 3rd transmission gate and the 3rd nor gate second transmission loop and including four nor gate, the
The second feed back loop of two filter structures and the 4th transmission gate, slave flipflop input is through the 3rd transmission gate and the 3rd nor gate
One input is connected, and the 3rd nor gate data output end is as slave flipflop output end and four nor gate first input end phase
Even, four nor gate output end is connected to the 3rd nor gate first input end through the second filter structure and the 4th transmission gate successively；
Described first, second, third and the 4th transmission gate include the first and second control terminals, wherein the first control terminal and the 3rd
Nor gate output end is connected, and the second control terminal is connected with four nor gate output end；
First the second input of nor gate and the input of four nor gate second are as set end, second the second input of nor gate
With the 3rd the second input of nor gate as clear terminal；
The input of data input pin of the master flip-flop input as master-slave flip-flop, master flip-flop output end and slave flipflop
It is connected, result output end of the slave flipflop output end as master-slave flip-flop.
6. the master-slave flip-flop of the radiation hardening according to any one of claim 1-5, it is characterised in that described first
Filter structure and the second filter structure are RC filter structures.
7. the master-slave flip-flop of the radiation hardening according to any one of claim 1-5, it is characterised in that the polycrystalline
The gate oxide thickness of silicon gate is less than 500 angstroms.
8. the master-slave flip-flop of the radiation hardening according to any one of claim 1-5, it is characterised in that the polycrystalline
Silicon gate is using self-registered technology and is arranged to annular.
A kind of 9. counter chain being made up of the cascade of any one of claim 1-5 master-slave flip-flop, it is characterised in that the meter
Number device chains include N number of master-slave flip-flop, between N number of master-slave flip-flop between be separated with the first spacing.
10. counter chain according to claim 9, it is characterised in that form one in N number of master-slave flip-flop per M
Individual master-slave flip-flop group, between the master-slave flip-flop group between be separated with the second spacing, M master inside the master-slave flip-flop group
The 3rd spacing is separated between slave flipflop, second spacing is more than the 3rd spacing, wherein, M, N are natural number, and its N is M's
Integral multiple.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109714025A (en) * | 2018-12-26 | 2019-05-03 | 中国科学技术大学 | The d type flip flop structure of the anti-single particle overturning and temporary disturbance of self- recoverage mechanism |
| EP3806332A4 (en) * | 2018-06-04 | 2022-03-30 | National University Corporation Kyoto Institute of Technology | D-type flip-flop circuit |
-
2017
- 2017-08-24 CN CN201721063590.8U patent/CN207124614U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3806332A4 (en) * | 2018-06-04 | 2022-03-30 | National University Corporation Kyoto Institute of Technology | D-type flip-flop circuit |
| CN109714025A (en) * | 2018-12-26 | 2019-05-03 | 中国科学技术大学 | The d type flip flop structure of the anti-single particle overturning and temporary disturbance of self- recoverage mechanism |
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