CN207097427U - OLED pixel drive circuit, array base palte and display device - Google Patents
OLED pixel drive circuit, array base palte and display device Download PDFInfo
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- CN207097427U CN207097427U CN201721474576.7U CN201721474576U CN207097427U CN 207097427 U CN207097427 U CN 207097427U CN 201721474576 U CN201721474576 U CN 201721474576U CN 207097427 U CN207097427 U CN 207097427U
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- 238000005401 electroluminescence Methods 0.000 description 1
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Abstract
The utility model discloses a kind of OLED pixel drive circuit, array base palte and display device, the pixel-driving circuit includes drive control unit, the first luminescence unit and the second luminescence unit.The utility model is by allowing two OLED to share a drive control unit, make two OLED alternately luminous, reduce OLED fluorescent lifetime, reduce parasitic capacitance and the quantity of data wire in panel, improve the aperture opening ratio of OLED, and by allowing OLED to be in reverse bias in non-luminous display frame, so that OLED does not have to be in direct current biasing state for a long time, so as to slow down the aging of OLED, in addition, the not external other reverse bias voltages of the utility model, reduce the crosstalk of the difficulty and bias voltage line of image element circuit cabling to other signals line.
Description
Technical field
The utility model is related to display technology field, more particularly to a kind of OLED pixel drive circuit, array base palte and
Display device.
Background technology
Organic electroluminescence device (OLED) has many outstanding characteristics such as colour gamut is wide, contrast is high, solid-state devices, because
This increasingly has competitiveness in display technology field.Generally, it is provided with the viewing area of OLED by electronic pixel
The pel array of composition, each pixel cell include a pixel-driving circuit.
Traditional 2T1C framework circuits refer to that circuit includes 2 thin film transistor (TFT)s and 1 storage capacitance, wherein playing switch
Data voltage is linked into the grid of driving thin film transistor (TFT) in opening by the thin film transistor (TFT) of effect, and by data voltage
It is stored in storage capacitance so that driving thin film transistor (TFT) is constantly in conducting state, and when OLED is inclined in direct current for a long time
During configuration state, internal ion polarityization forms built in field, causes OLED threshold voltage constantly to increase, OLED luminance
Degree constantly reduces, and the luminous life-span that can shorten OLED for a long time, accelerates OLED aging.
For drawbacks described above, in existing improvement project, OLED can be made to be in reverse bias in non-luminous display frame
State, reduce built in field intensity.But in this scheme, each OLED needs corresponding a data line so that oled panel
The cabling of middle data wire doubles, and causes the reduction of panel aperture opening ratio.Moreover, each corresponding driving thin film transistor (TFT) and one of OLED
Individual storage capacitance so that the doubles of storage capacitance in panel, cause the parasitic capacitance of panel to increase.
The content of the invention
The utility model is mainly solving the technical problems that provide a kind of OLED pixel drive circuit, array base palte and display
Device, parasitic capacitance and the quantity of data wire in panel can be reduced, improve the aperture opening ratio of OLED.
In order to solve the above technical problems, first technical scheme that the utility model uses is：A kind of OLED pixel driving
Circuit, including：Drive control unit, the first luminescence unit and the second luminescence unit；
Wherein, drive control unit includes first switch, second switch and storage capacitance；The control terminal of second switch is with sweeping
Retouch line connection, the drain electrode of second switch is connected with data wire, the source electrode of second switch respectively with one end of storage capacitance and the
The control terminal connection of one switch, the other end of storage capacitance and the drain electrode of first switch are connected with the first power supply；
The source electrode of first switch is connected with the first luminescence unit and the second luminescence unit respectively, the first luminescence unit and second
Luminescence unit is respectively connecting to second source, and the control terminal of the first luminescence unit is connected to the first control signal, and second is luminous single
The control terminal of member is connected to the second control signal, drive control unit, the first control signal and the second control signal control first
Luminescence unit and the second luminescence unit are alternately luminous.
Further, the level signal polarity phase that the first control signal exports with second control signal in synchronization
Instead.Further, the first luminescence unit includes the 3rd switch, the 5th switch, the 7th switch, the 9th switch and the first light-emitting diodes
Pipe, the drain electrode of the switch of anode connection the 3rd and the drain electrode of the 7th switch of the first light emitting diode, the moon of the first light emitting diode
The source electrode of the switch of pole connection the 9th and the source electrode of the 5th switch, the drain electrode of the 5th switch connect the first power supply, the source of the 7th switch
The drain electrode of pole and the 9th switch connects second source.
Further, the second luminescence unit includes the 4th switch, the 6th switch, the 8th switch, the tenth switch and the second hair
Optical diode, the drain electrode of the switch of anode connection the 4th and the drain electrode of the 8th switch of the second light emitting diode, the second light-emitting diodes
The source electrode of the switch of negative electrode connection the tenth and the source electrode of the 6th switch of pipe, the drain electrode of the 6th switch connect the first power supply, and the 8th opens
The drain electrode connection second source of the source electrode of pass and the tenth switch.
Further, first switch, second switch, the 5th switch, the 6th switch, the 7th switch and the 8th switch are N-type
Transistor switch, the 3rd switch, the 4th switch, the 9th switch and the tenth switch switch for P-type transistor.
Further, during the first lumination of light emitting diode, the second light emitting diode reverse bias；Second light emitting diode is sent out
Light time, the first light emitting diode reverse bias.
Further, the magnitude of voltage of the first power supply is higher than the magnitude of voltage of second source.
Further, when the timing cycles of the first control signal and the second control signal are the display of adjacent two field pictures
Between.
In order to solve the above technical problems, second technical scheme that the utility model uses is：A kind of OLED arrays are provided
Substrate, OLED array include the as above pixel-driving circuit described in any one.
In order to solve the above technical problems, the 3rd technical scheme that the utility model uses is：A kind of OLED is provided to show
Device, OLED display are provided with OLED array, and OLED array includes the as above pixel driver electricity described in any one
Road.
The beneficial effects of the utility model are：It is different from the situation of prior art, the utility model is by allowing two OLED
Share a driving thin film transistor (TFT), storage capacitance and data wire, make two OLED alternately luminous, reduce OLED it is luminous when
Between, reduce parasitic capacitance and the quantity of data wire in panel, improve the aperture opening ratio of OLED, and by allowing OLED not sending out
Reverse bias is in the display frame of light so that OLED does not have to be in direct current biasing state for a long time, so as to slow down OLED
Aging, in addition, the not external other reverse bias voltages of the utility model, reduce the difficulty and biased electrical of image element circuit cabling
Crosstalk of the line ball to other signals line.
Brief description of the drawings
Fig. 1 is a kind of concrete structure schematic diagram for OLED pixel drive circuit that the utility model embodiment provides.
Fig. 2 is a kind of circuit sequence schematic diagram for OLED pixel drive circuit that the utility model embodiment provides.
Fig. 3 is a kind of structural representation for OLED array that the utility model embodiment provides.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out
Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made
The every other embodiment obtained, belong to the scope of the utility model protection.
Fig. 1 is a kind of concrete structure schematic diagram for OLED pixel drive circuit that the utility model embodiment provides.This reality
The pixel-driving circuit that the mode of applying provides, including：Drive control unit M3, the first luminescence unit M1 and the second luminescence unit M2.
Drive control unit M3 includes first switch T1, second switch T2 and storage capacitance Cst, second switch T2 control terminal and scanning
Line Vscan connections, second switch T2 drain electrode are connected with data wire Vdata, second switch T2 source electrode respectively with storage capacitance
The connection of Cst one end and first switch T1 control terminal, the drain electrode of storage capacitance the Cst other end and first switch T1 with
First power supply OVDD connections.Wherein, first switch T1 is used for for driving thin film transistor (TFT), second switch T2 in the present embodiment
Data-signal Vdata is transmitted to its source electrode under scanning signal Vscan control, storage capacitance Cst is used to store second switch
Level between T2 source electrode and the first power supply OVDD.First switch T1 source electrode is sent out with the first luminescence unit M1 and second respectively
Light unit M2 connections, the first luminescence unit M1 and the second luminescence unit M2 are respectively connecting to second source OVSS, and first is luminous single
First M1 control terminal is connected to the first control signal Ctr1, and the control terminal of the second luminescence unit is connected to the second control signal
Ctr2。
Further, the first luminescence unit M1 in present embodiment specifically includes the 3rd switch T3, the 5th switch T5, the
Seven switch T7, the 9th switch T9 and the first light emitting diode OLED1, the first light emitting diode OLED1 anode connection the 3rd are opened
Close T3 drain electrode and the 7th switch T7 drain electrode, the first light emitting diode OLED1 negative electrode connection the 9th switch T9 source electrode and
5th switch T5 source electrode, the 5th switch T5 drain electrode connect the first power supply OVDD, the 7th switch T7 source electrode and the 9th switch
T9 drain electrode connection second source OVSS.Second luminescence unit M2 specifically includes the 4th switch T4, the 6th switch T6, the 8th switch
T8, the tenth switch T10 and the second light emitting diode OLED2, the second light emitting diode OLED2 anode connection the 4th switch T4's
Drain electrode and the 8th switch T8 drain electrode, the second light emitting diode OLED2 switch T10 of negative electrode connection the tenth source electrode and the 6th are opened
T6 source electrode is closed, the 6th switch T6 drain electrode connects the first power supply OVDD, the 8th switch T8 source electrode and the tenth switch T10 leakage
Pole connection second source OVSS.
The switch mentioned in above-described embodiment includes the transistor switch of p-type and N-type.Specifically, first switch T1, second
It is N-type to switch T2, the 5th switch T5, the 6th switch T6, the 7th switch T7 and the 8th switch T8, the 3rd switch T3, the 4th switch
T4, the 9th switch T9 and the tenth switch T10 are p-type.Wherein, P-type transistor switch turns on when control terminal is low level, is controlling
End processed disconnects when being high level；N-type transistor switch disconnects when control terminal is low level, is led when control terminal is high level
It is logical.
Fig. 2 is a kind of circuit sequence schematic diagram for OLED pixel drive circuit that the utility model embodiment provides, and it is given
The level height for having gone out scanning signal Vscan, the first control signal Ctr1 and the second control signal Ctr2 changes with time feelings
Condition.Herein, level height is relative.The course of work of the present embodiment pixel-driving circuit is divided into four-stage：First storage
Stage A, the first luminescence display stage B, the second memory phase C and the second luminescence display stage D.First memory phase A and first
Luminescence display stage B forms the first frame picture, and the second memory phase C and the second luminescence display stage D form the second frame picture.
In first frame, the first light emitting diode OLED1 lights, the second light emitting diode OLED2 reverse bias；In the second frame, second
Light emitting diode OLED2 lights, the first light emitting diode OLED1 reverse bias.The drive control unit of the present embodiment, the first control
Signal processed and second the first luminescence unit of control signal co- controlling and the second luminescence unit are alternately luminous.Hereinafter, with reference to Fig. 1 and
Fig. 2 is described in detail.
In this implement scene, the first control signal Ctr1 and the second control signal Ctr2 believe in the level that synchronization exports
Number opposite polarity, i.e., when the first control signal Ctr1 is high level, the second control signal Ctr2 is low level；When the first control
When signal Ctr1 is low level, the second control signal Ctr2 is high level.First control signal Ctr1 and the second control signal
Ctr2 timing cycles are the display time of adjacent two field pictures.First control signal Ctr1 and the second control signal Ctr2 exist
The level signal opposite polarity of synchronization output is a specific implement scene of the present utility model, in other implementation fields
Jing Zhong, the first control signal Ctr1 and the second control signal Ctr2 level signal can also be other relations, as long as can realize
First luminescence unit and the second luminescence unit are alternately luminous in the scope of protection of the utility model.First power supply OVDD electricity
Pressure value is higher than second source OVSS magnitude of voltage, for example, the magnitude of voltage that can set the first power supply OVDD is positive voltage, the second electricity
Source OVSS magnitude of voltage is negative voltage, or it is positive voltage to set the first power supply OVDD magnitude of voltage, second source OVSS electricity
Pressure value is 0V.
It is high level in the first memory phase A, scanning signal Vscan and the second control signal Ctr2, the first control signal
Ctr1 is low level.Because second switch T2 is N-type, so now second switch T2 is turned on, and in scanning signal Vscan control
Data-signal Vdata is exported to node S1 under system, this stage, storage capacitance Cst was in charged state, and first switch T1 is disconnected
Open state, the level that storage capacitance Cst is used between memory node S1 and the first power supply OVDD.Due to the 3rd switch T3 and the 9th
Switch T9 is p-type, so the 3rd switch T3 and the 9th switch T9 conductings, and the 5th switch T5 and the 7th switch T7 are N-type, so
5th switch T5 and the 7th switch T7 disconnect.Now, the first light emitting diode OLED1 can not be driven because first switch T1 disconnects
It is luminous.Because the 4th switch T4 and the tenth switch T10 are p-type, so the 4th switch T4 and the tenth switch T10 disconnect.Due to
Six switch T6 and the 8th switch T8 are N-type, so the 6th switch T6 and the 8th switch T8 conductings.Now, the 8th switch T8 will be saved
Level at point S4 is transferred to the second light emitting diode OLED2 anode, and the level at node S2 is transferred to by the 6th switch T6
Second light emitting diode OLED2 negative electrode, so as to which the second light emitting diode OLED2 is in reverse-bias state.This stage is main
Pass through the storage of level between storage capacitance Cst complete paired node S1 and the first power supply OVDD, as the first light emitting diode
OLED1 data-signals Vdata memory phase.
In the first luminescence display stage B, scanning signal Vscan and the first control signal Ctr1 are low level, and second controls
Signal Ctr2 is high level.Now, second switch T2 disconnects, first switch T1 conductings.Due to the 3rd switch T3 and the 9th switch
T9 is p-type, thus the 3rd switch T3 and the 9th switch T9 conductings, and the 5th switch T5 and the 7th switch T7 are N-type, so the 5th
The switches of T5 and the 7th T7 is switched to disconnect.Now, the first power supply OVDD, first switch T1, the 3rd switch T3, the first light emitting diode
OLED1, the 9th switch T9 and second source OVSS form path, and the first light emitting diode OLED1 lights.Due to the 4th switch T4
It is p-type with the tenth switch T10, so the 4th switch T4 and the tenth switch T10 disconnect.Due to the 6th switch T6 and the 8th switch T8
For N-type, turned on so the 6th switch T6 and the 8th switchs T8.Now, the second light emitting diode OLED2 is the same as the first memory phase A
Equally, reverse-bias state is kept.That is, this stage is the first light emitting diode OLED1 luminescence display stage.
It is high level in the second memory phase C, scanning signal Vscan and the first control signal Ctr1, the second control signal
Ctr2 is low level.Because second switch T2 is N-type, so now second switch T2 is turned on, and in scanning signal Vscan control
Data-signal Vdata is exported to node S1 under system, this stage, storage capacitance Cst was in charged state, and first switch T1 is disconnected
Open state, the level that storage capacitance Cst is used between memory node S1 and the first power supply OVDD.Due to the 4th switch T4 and the tenth
Switch T10 is p-type, so the 4th switch T4 and the tenth switch T10 conductings, and the 6th switch T6 and the 8th switch T8 are N-type, institute
Disconnected with the 6th switch T6 and the 8th switch T8.Now, the second light emitting diode can not be driven because first switch T1 disconnects
OLED2 lights.Because the 3rd switch T3 and the 9th switch T9 are p-type, so the 3rd switch T3 and the 9th switch T9 disconnect.Due to
5th switch T5 and the 7th switch T7 is N-type, so the 5th switch T5 and the 7th switch T7 conductings.Now, the 7th switch T7 will
Level at node S3 is transferred to the first light emitting diode OLED1 anode, and the 5th switch T5 transmits the level at node S2
To the first light emitting diode OLED1 negative electrode, so as to which the first light emitting diode OLED1 is in reverse-bias state.Deposited with first
The storage stage, A was the same, and this stage is mainly deposited by level between storage capacitance Cst complete paired node S1 and the first power supply OVDD
Storage, as the second light emitting diode OLED2 data-signals Vdata memory phase.
In the second luminescence display stage D, scanning signal Vscan and the second control signal Ctr2 are low level, and first controls
Signal Ctr1 is high level.Now, second switch T2 disconnects, first switch T1 conductings.Due to the 4th switch T4 and the tenth switch
T10 is p-type, so the 4th switch T4 and the tenth switch T10 conductings, and the 6th switch T6 and the 8th switch T8 are N-type, so the
Six switch T6 and the 8th switch T8 disconnect.Now, the first power supply OVDD, first switch T1, the 4th switch T4, the second light-emitting diodes
Pipe OLED2, the tenth switch T10 and second source OVSS form path, and the second light emitting diode OLED2 lights.Open due to the 3rd
It is p-type to close the switches of T3 and the 9th T9, so the 3rd switch T3 and the 9th switch T9 disconnect.Due to the 5th switch T5 and the 7th switch
T7 is N-type, so the 5th switch T5 and the 7th switch T7 conductings.Now, the first light emitting diode OLED1 is the same as the second memory phase
C is the same, keeps reverse-bias state.That is, this stage is the second light emitting diode OLED2 luminescence display stage.
It was found from above four-stage, the utility model is by allowing two OLED to share a driving thin film transistor (TFT), depositing
Storing up electricity holds and data wire, makes two OLED alternately luminous, reduces OLED fluorescent lifetime, reduce parasitic capacitance sum in panel
According to the quantity of line, the aperture opening ratio of OLED is improved, and by allowing OLED to be in reverse bias in non-luminous display frame, is made
Obtain OLED not having to be in direct current biasing state for a long time, so as to slow down the aging of OLED, in addition, the utility model is not external
Other reverse bias voltages, reduce the crosstalk of the difficulty and bias voltage line of image element circuit cabling to other signals line.
A kind of structural representation for OLED array that Fig. 3 provides for the utility model embodiment, the array base palte 300
Including multiple OLED pixel units 301 in array arrangement, wherein, each OLED pixel unit 301 includes as described above
Pixel-driving circuit.
The utility model embodiment additionally provides a kind of OLED display, and the display device is provided with above-mentioned OLED arrays base
Plate, array base palte include multiple OLED pixel units in array arrangement, wherein, each OLED pixel unit includes as above institute
The pixel-driving circuit stated.The OLED display is specifically as follows mobile phone, tablet personal computer, television set, display, digital camera
Deng the product with display function.
Be different from the situation of prior art, the utility model by allow two OLED share a driving thin film transistor (TFT),
Storage capacitance and data wire make two OLED alternately luminous, reduce OLED fluorescent lifetime, reduce in panel parasitic capacitance and
The quantity of data wire, the aperture opening ratio of OLED is improved, and by allowing OLED to be in reverse bias in non-luminous display frame,
So that OLED does not have to be in direct current biasing state for a long time, so as to slow down the aging of OLED, in addition, the utility model is not outer
Other reverse bias voltages are connect, reduce the crosstalk of the difficulty and bias voltage line of image element circuit cabling to other signals line.
Obviously, those skilled in the art can carry out various changes and modification without departing from this practicality to the utility model
New spirit and scope.So, if these modifications and variations of the present utility model belong to the utility model claims and
Within the scope of its equivalent technologies, then the utility model is also intended to comprising including these changes and modification.
Claims (10)
1. a kind of OLED pixel drive circuit, it is characterised in that luminous including drive control unit, the first luminescence unit and second
Unit；
Wherein, the drive control unit includes first switch, second switch and storage capacitance；The control terminal of the second switch
Be connected with scan line, the drain electrode of the second switch is connected with data wire, the source electrode of the second switch respectively with the storage
The control terminal of one end of electric capacity and the first switch connects, the other end of the storage capacitance and the first switch
Drain electrode is connected with the first power supply；
The source electrode of the first switch is connected with first luminescence unit and second luminescence unit respectively, first hair
Light unit and second luminescence unit are respectively connecting to second source, and the control terminal of first luminescence unit is connected to first
Control signal, the control terminal of second luminescence unit are connected to the second control signal, the drive control unit, described first
Control signal and second control signal control first luminescence unit and second luminescence unit alternately luminous.
2. a kind of OLED pixel drive circuit according to claim 1, it is characterised in that first control signal and institute
State the level signal opposite polarity that the second control signal exports in synchronization.
3. a kind of OLED pixel drive circuit according to claim 1, it is characterised in that first luminescence unit includes
3rd switch, the 5th switch, the 7th switch, the 9th switch and the first light emitting diode, the anode of first light emitting diode
Connect the drain electrode of the 3rd switch and the drain electrode of the described 7th switch, the negative electrode connection described the of first light emitting diode
The source electrode of the source electrode of nine switches and the 5th switch, drain electrode connection first power supply of the 5th switch, the described 7th
The drain electrode of the source electrode of switch and the described 9th switch connects the second source.
4. a kind of OLED pixel drive circuit according to claim 3, it is characterised in that second luminescence unit includes
4th switch, the 6th switch, the 8th switch, the tenth switch and the second light emitting diode, the anode of second light emitting diode
Connect the drain electrode of the 4th switch and the drain electrode of the described 8th switch, the negative electrode connection described the of second light emitting diode
The source electrode of the source electrode of ten switches and the 6th switch, drain electrode connection first power supply of the 6th switch, the described 8th
The drain electrode of the source electrode of switch and the described tenth switch connects the second source.
5. a kind of OLED pixel drive circuit according to claim 4, it is characterised in that the first switch, second open
Close, the 5th switch, the 6th switch, the 7th switch and the 8th switch for N-type transistor switch, it is described 3rd switch, the 4th switch,
9th switch and the tenth switch switch for P-type transistor.
A kind of 6. OLED pixel drive circuit according to claim 4, it is characterised in that the first light emitting diode hair
Light time, the second light emitting diode reverse bias；During second lumination of light emitting diode, first light emitting diode is anti-
To biasing.
A kind of 7. OLED pixel drive circuit according to claim 1, it is characterised in that the magnitude of voltage of first power supply
Higher than the magnitude of voltage of the second source.
8. a kind of OLED pixel drive circuit according to claim 1, it is characterised in that first control signal and institute
The timing cycles for stating the second control signal are the display time of adjacent two field pictures.
9. a kind of OLED array, it is characterised in that the OLED array is included described in claim any one of 1-8
Pixel-driving circuit.
10. a kind of OLED display, it is characterised in that the OLED display is provided with OLED array, the OLED
Array base palte includes the pixel-driving circuit described in claim any one of 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721474576.7U CN207097427U (en) | 2017-11-07 | 2017-11-07 | OLED pixel drive circuit, array base palte and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721474576.7U CN207097427U (en) | 2017-11-07 | 2017-11-07 | OLED pixel drive circuit, array base palte and display device |
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| Publication Number | Publication Date |
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| CN207097427U true CN207097427U (en) | 2018-03-13 |
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| CN201721474576.7U Expired - Fee Related CN207097427U (en) | 2017-11-07 | 2017-11-07 | OLED pixel drive circuit, array base palte and display device |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107945741A (en) * | 2017-11-07 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | OLED pixel drive circuit, array base palte and display device |
| CN108648687A (en) * | 2018-02-23 | 2018-10-12 | 友达光电股份有限公司 | Pixel correction and compensation driving circuit, and pixel correction and compensation method using same |
| CN108717842A (en) * | 2018-05-31 | 2018-10-30 | 昆山国显光电有限公司 | Pixel circuit and its driving method, organic electroluminescence device, display device |
| CN110288956A (en) * | 2019-05-06 | 2019-09-27 | 重庆惠科金渝光电科技有限公司 | Display device |
| US12008960B2 (en) | 2021-05-31 | 2024-06-11 | Boe Technology Group Co., Ltd. | Pixel driving circuit and method for driving the same, and display substrate |
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2017
- 2017-11-07 CN CN201721474576.7U patent/CN207097427U/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107945741A (en) * | 2017-11-07 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | OLED pixel drive circuit, array base palte and display device |
| CN108648687A (en) * | 2018-02-23 | 2018-10-12 | 友达光电股份有限公司 | Pixel correction and compensation driving circuit, and pixel correction and compensation method using same |
| CN108648687B (en) * | 2018-02-23 | 2019-11-12 | 友达光电股份有限公司 | Pixel correction and compensation driving circuit, and pixel correction and compensation method using same |
| CN108717842A (en) * | 2018-05-31 | 2018-10-30 | 昆山国显光电有限公司 | Pixel circuit and its driving method, organic electroluminescence device, display device |
| CN108717842B (en) * | 2018-05-31 | 2020-12-04 | 昆山国显光电有限公司 | Pixel circuit, driving method thereof, organic electroluminescent device and display device |
| CN110288956A (en) * | 2019-05-06 | 2019-09-27 | 重庆惠科金渝光电科技有限公司 | Display device |
| CN110288956B (en) * | 2019-05-06 | 2021-11-30 | 重庆惠科金渝光电科技有限公司 | Display device |
| US11295694B2 (en) | 2019-05-06 | 2022-04-05 | Chongqing Hkc Optoelectronics Technology Co., Ltd. | Display device |
| US12008960B2 (en) | 2021-05-31 | 2024-06-11 | Boe Technology Group Co., Ltd. | Pixel driving circuit and method for driving the same, and display substrate |
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