CN113327556A

CN113327556A - Pixel circuit, driving method thereof and display panel

Info

Publication number: CN113327556A
Application number: CN202110713189.9A
Authority: CN
Inventors: 鲍文超; 韦晓龙; 孟松; 许静波
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Zhuoyin Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Zhuoyin Technology Co Ltd
Priority date: 2021-06-25
Filing date: 2021-06-25
Publication date: 2021-08-31

Abstract

The embodiment of the disclosure provides a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: a data write circuit configured to supply a signal of the data signal line to the first node; a driving circuit configured to drive the light emitting element to emit light; a detection circuit configured to supply a reference voltage to the second node through the sensing signal line under control of a signal of the second scanning signal line when the pixel circuit is in a sensing mode; charging the second node, and transmitting the charging voltage of the second node to the induction signal line; a control circuit configured to disconnect the second node from the first pole of the light emitting element under control of a signal of the third scanning signal line when the pixel circuit is in the sensing mode; alternatively, when the pixel circuit is in the display mode, the connection between the second node and the first electrode of the light emitting element is turned on under the control of a signal of the third scanning signal line.

Description

Pixel circuit, driving method thereof and display panel

Technical Field

The embodiment of the disclosure relates to but is not limited to the technical field of display, and in particular relates to a pixel circuit, a driving method thereof and a display panel.

Background

An Organic Light-Emitting Diode (OLED) display device has the advantages of being thin in thickness, Light in weight, wide in viewing angle, capable of actively Emitting Light, continuously adjustable in Light Emitting color, low in cost, fast in response speed, low in driving voltage, wide in working temperature range, simple in production process, capable of flexibly displaying and the like, and is more and more widely applied to the display field of mobile phones, tablet computers or digital cameras and the like.

The pixel circuit design is the core technical content of the OLED device, and has important research significance. Due to the limitation of factors such as the manufacturing process and conditions of transistors in the pixel circuit, the electrical characteristics (such as threshold voltage) of different transistors in the whole display panel are inconsistent, and the problem of uneven brightness (Mura) is easily caused, so that the display effect is poor.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

In a first aspect, an embodiment of the present disclosure provides a pixel circuit, including: the device comprises a driving circuit, a data writing circuit, a detection circuit and a control circuit; wherein,

the data writing circuit is connected with a first scanning signal line, a data signal line, a first node and a second node, and is configured to provide a signal of the data signal line to the first node under the control of a signal of the first scanning signal line;

the driving circuit, connected to the first node, the second node and a first power line, configured to drive a light emitting element to emit light when the pixel circuit is in a display mode;

the detection circuit is connected with the second node, a second scanning signal line and a sensing signal line and is configured to provide a reference voltage to the second node through the sensing signal line under the control of a signal of the second scanning signal line when the pixel circuit is in a sensing mode; charging the second node, and transmitting the charging voltage of the second node to the induction signal line;

the control circuit is connected with the second node, a third scanning signal line and the first pole of the light-emitting element and is configured to disconnect the second node from the first pole of the light-emitting element under the control of a signal of the third scanning signal line when the pixel circuit is in an induction mode; alternatively, when the pixel circuit is in a display mode, the connection between the second node and the first electrode of the light emitting element is turned on under the control of a signal of a third scanning signal line.

In a second aspect, an embodiment of the present disclosure provides a display panel, including: a plurality of pixel units arranged in an array, each pixel unit comprising: a plurality of sub-pixels, each sub-pixel comprising: a light emitting element and a pixel circuit connected to the light emitting element, wherein the pixel circuit in at least one of the plurality of sub-pixels is the pixel circuit described in the above embodiment.

In a third aspect, an embodiment of the present disclosure provides a driving method for a pixel circuit, where the driving method is applied to the pixel circuit described in the above embodiment, and the driving method includes: in a sensing mode, supplying a signal of the data signal line to the first node under the control of a signal of the first scan signal line; under the control of the signal of the second scanning signal line, providing a reference voltage to the second node through the sensing signal line, charging the second node, and transmitting the charging voltage of the second node to the sensing signal line; disconnecting the second node from the first electrode of the light emitting element under control of a signal of the third scanning signal line;

in a display mode, supplying a signal of the data signal line to the first node under control of a signal of the first scan signal line; turning on a connection between the second node and the first electrode of the light emitting element under control of a signal of a third scanning signal line; the light emitting element is driven to emit light under the control of a signal of the first node.

According to the pixel circuit, the driving method thereof and the display panel provided by the embodiment of the disclosure, the control circuit is arranged between the second node and the first pole of the light emitting element, so that the second node can be prevented from being directly connected with the first pole of the light emitting element. Therefore, when the pixel circuit is in the sensing mode, the second node is disconnected from the first pole of the light-emitting element through the control circuit, electric leakage from the second node to the light-emitting element can be avoided, the charging current can only flow to the sensing signal line, therefore, the accuracy of extracting the threshold voltage of the driving transistor in the driving circuit can be improved, furthermore, when the accurately acquired threshold voltage of the driving transistor is applied to the pixel circuit in the display mode, the connection between the second node and the first pole of the light-emitting element is conducted through the control circuit, accurate threshold voltage compensation can be realized, the compensation effect can be improved, the problem of uneven brightness caused by inconsistent electrical characteristics (such as threshold voltage and the like) of different transistors can be offset, and the display effect can be improved.

Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the disclosure. Other advantages of the disclosure may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.

Other aspects will be apparent upon reading and understanding the attached drawings and detailed description.

Drawings

The accompanying drawings are included to provide an understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure. The shapes and sizes of the various elements in the drawings are not to be considered as true proportions, but are merely intended to illustrate the present disclosure.

FIG. 1A is a schematic diagram of a 3T1C pixel circuit;

FIG. 1B is a timing diagram of signals in the pixel circuit of FIG. 1A in a sensing mode;

fig. 2 is a circuit schematic diagram of a pixel circuit provided in an exemplary embodiment of the present disclosure;

FIG. 3 is an equivalent circuit diagram of the pixel circuit shown in FIG. 2;

FIG. 4 is another equivalent circuit diagram of the pixel circuit shown in FIG. 2;

FIG. 5 is a timing diagram of a signal in the pixel circuit shown in FIG. 3 in the sensing mode;

FIG. 6 is another signal timing diagram illustrating the pixel circuit shown in FIG. 3 in a sensing mode;

FIG. 7 is a timing diagram of signals in the pixel circuit shown in FIG. 3 in the display mode;

FIG. 8 is a schematic plan view of a display panel in an exemplary embodiment of the disclosure;

FIG. 9 is a schematic diagram of a sub-pixel in a display panel in an exemplary embodiment of the disclosure;

FIG. 10 is another schematic diagram of a sub-pixel in a display panel in an exemplary embodiment of the disclosure;

fig. 11 is a schematic view of scanning signal lines in a display panel in an exemplary embodiment of the present disclosure;

fig. 12 is another schematic view of scanning signal lines in a display panel in an exemplary embodiment of the present disclosure;

fig. 13 is a flowchart illustrating a driving method of a pixel circuit in an exemplary embodiment of the present disclosure.

Detailed Description

Various embodiments are described herein, but the description is intended to be exemplary, rather than limiting and many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the exemplary embodiments, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.

In describing representative embodiments, the specification may have presented a method or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps herein, the method or process should not be limited to the particular sequence of steps. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present disclosure.

In the drawings, the size of each component, the thickness of a layer, or a region may be exaggerated for clarity. Therefore, one mode of the present disclosure is not necessarily limited to the dimensions, and the shape and size of each component in the drawings do not reflect a true scale. Further, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present specification are provided for avoiding confusion among the constituent elements, and are not limited in number.

In this specification, for convenience, terms indicating orientation or positional relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like are used to explain positional relationship of constituent elements with reference to the drawings, only for convenience of description and simplification of description, and do not indicate or imply that a device or element referred to has a specific orientation, is configured and operated in a specific orientation, and thus, is not to be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, the words described in the specification are not limited to the words described in the specification, and may be replaced as appropriate.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly unless otherwise specifically indicated and limited. For example, it may be a fixed connection, or a removable connection, or an integral connection; can be a mechanical connection, or an electrical connection; either directly or indirectly through intervening components, or both may be interconnected. The meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some kind of electrical action. The "element having a certain electric function" is not particularly limited as long as it can transmit and receive an electric signal between connected components. The "element having some kind of electric function" may be, for example, an electrode, a wiring, a switching element such as a transistor, or another functional element such as a resistor, an inductor, or a capacitor.

In this specification, a transistor refers to an element including at least three terminals, i.e., a gate electrode (a gate or a control electrode), a drain electrode (a drain electrode terminal, a drain region, or a drain), and a source electrode (a source electrode terminal, a source region, or a source). The transistor has a channel region between a drain electrode and a source electrode, and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, a channel region refers to a region where current mainly flows.

In this specification, in order to distinguish two poles of a transistor other than a gate electrode (gate or control electrode), one of them is directly described as a first pole, and the other is a second pole, where the first pole may be a drain electrode and the second pole may be a source electrode, or the first pole may be a source electrode and the second pole may be a drain electrode. In the case of using transistors of opposite polarities, or in the case of changing the direction of current flow during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in the present specification,

the "source electrode" and "drain electrode" may be interchanged.

The transistors in the embodiments of the present disclosure may be Thin Film Transistors (TFTs) or Field Effect Transistors (FETs), or other devices with the same characteristics. For example, the thin film transistor used in the embodiments of the present disclosure may include, but is not limited to, an Oxide transistor (Oxide TFT), a Low Temperature polysilicon thin film transistor (LTPS TFT), or the like. For example, the thin film transistor may be a thin film transistor of a bottom gate structure or a thin film transistor of a top gate structure as long as a switching function can be achieved. Here, the embodiment of the present disclosure does not limit this.

For the OLED display panel, in the pixel circuit, the current flowing through the OLED device is generally controlled by the driving transistor, so as to control the light emitting brightness of the OLED device; however, due to the limitation of manufacturing processes, conditions, and the like, the electrical characteristics (e.g., threshold voltages, etc.) of different driving transistors in the whole display panel have certain differences. Therefore, even under the same driving voltage, the current flowing through the OLED devices in different sub-pixels has non-uniformity due to the non-uniformity of the threshold voltages of the driving transistors in different sub-pixels, so that the emission luminance of the OLED devices in different sub-pixels is different, and the problem of non-uniformity of luminance (Mura) occurs, thereby deteriorating the display effect. Here, the threshold voltage of the driving transistor may refer to a voltage difference between the gate electrode and the second electrode (e.g., as the source electrode) of the driving transistor, that is, Vth — Vg — Vs, where Vth represents the threshold voltage of the driving transistor, Vg represents the voltage of the gate electrode of the driving transistor, and Vs represents the voltage of the second electrode (e.g., as the source electrode) of the driving transistor.

At present, a brightness compensation method is mainly used to offset the problem of uneven brightness caused by the inconsistency of the electrical characteristics (such as threshold voltage) of different transistors. However, when the threshold voltage of the driving transistor is negatively biased, even the threshold voltage of the driving transistor is greatly biased, or when the lighting voltage of the OLED device is low, the threshold voltage of the driving transistor cannot be accurately extracted, so that the threshold voltage cannot be accurately compensated, the compensation effect is poor, the problem of uneven brightness still exists, and the display effect is still poor.

Fig. 1A is a schematic structural diagram of a 3T1C pixel circuit, and fig. 1B is a signal timing diagram of the pixel circuit shown in fig. 1A in a sensing mode. The following description is made with reference to fig. 1A and 1B.

As shown in fig. 1A, the 3T1C pixel circuit may include: a first transistor T1, a second transistor T2, and a third transistor T3, a storage capacitor Cst, a Data signal line Data, a first scan signal line G1, a second scan signal line G2, a sensing signal line Sense, a first power supply line VDD, and a second power supply line VSS. A control electrode of the first transistor T1 is connected to the first scan signal line G1, a first electrode of the first transistor T1 is connected to the Data signal line Data, and a second electrode of the first transistor T1 is connected to a control electrode of the second transistor T2; a first electrode of the second transistor T2 is connected to the first power supply line VDD, and a second electrode (e.g., as a source) of the second transistor T2 is connected to a first electrode (e.g., as an anode) of the light emitting element L; a second electrode (for example, as a cathode) of the light emitting element L is connected to a second power supply line VSS; a control electrode of the third transistor T3 is connected to the second scan signal line G2, a first electrode of the third transistor T3 is connected to a second electrode of the second transistor T2, and a second electrode of the third transistor T3 is connected to the Sense signal line Sense; a first pole of the storage capacitor Cst is connected to the control pole of the second transistor T2, and a second pole of the storage capacitor Cst is connected to the second pole of the second transistor T2. A control electrode of the second transistor T2 is a first node G, and a second electrode (e.g., as a source) of the second transistor T2 is a second node S. The second transistor T2 is a driving transistor. Since the threshold voltages Vth of the different second transistors T2 are not exactly the same throughout the panel, the threshold voltage Vth compensation for the second transistor T2 is required.

As shown in fig. 1A and 1B, when the pixel circuit shown in fig. 1A is in the sensing mode, in the first phase S1, the signals of the first scanning signal line G1 and the second scanning signal line G2 are both high level signals, so that the first transistor T1 and the third transistor T3 are both turned on, the sensing signal line Sense outputs the reference voltage Vref, such as Vref being equal to 0V, and is supplied to the second node S through the turned-on third transistor T3, so that the second node S is set to 0V, i.e., Vs being equal to 0V, and then the Data signal line Data outputs the detection voltage Vsense, which is supplied to the first node G through the turned-on first transistor T1, i.e., Vg being equal to Vsense, and then the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 at this time is equal to Vsense > so that the second transistor T2 is turned on. Subsequently, in the second stage S2, the voltage at the second node S rises until the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 is equal to Vth, the second transistor T2 is turned off, the voltage on the Sense signal line Sense is charged to Vs, and at this time, Vth is equal to Vsense-Vs, so that the threshold voltage Vth of the second transistor T2 can be extracted. Then, when the pixel circuit shown in fig. 1A is in the display mode, the Data signal line Data outputs the Data voltage Vdata + Vth to eliminate the problem of uneven brightness caused by different threshold voltages Vth of different second transistors T2 in the entire display panel, thereby achieving the compensation effect.

However, when the threshold voltage Vth of the second transistor T2 is shifted in the negative direction, that is, the threshold voltage Vth of the second transistor T2 belongs to the negative-direction section, the Data signal line Data cannot provide a signal lower than 0V, and the voltage Vs of the second node S needs to be raised in order to accurately extract the threshold voltage Vth. For example, when the threshold voltage Vth of the second transistor T2 is-1V, if the voltage Vs of the second node S is set to 0V, even if the voltage provided by the Data signal line Data is 0V in the sensing mode, the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 is 0V, and Vth is-1V, that is, Vgs > Vth, at this time, so that the second transistor T2 is turned on, a charging current flows to the OLED device, and thus the threshold voltage cannot be accurately obtained, and threshold voltage compensation cannot be accurately performed; when the threshold voltage Vth of the second transistor T2 is-1V, if the voltage Vs of the second node S is set to 1V, even if the voltage supplied from the Data signal line Data is 0V, the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 at this time is-1V, that is, Vgs ≦ Vth can be satisfied, so that the second transistor T2 is not turned on, and thus, the threshold voltage can be accurately extracted and the threshold voltage compensation can be accurately performed.

However, in the sensing mode, when the threshold voltage of the driving transistor is negatively biased and the degree of the negatively biased threshold voltage is large, that is, the threshold voltage Vth of the second transistor T2 is large in the negative interval, if Vth is greater than the turn-on voltage of the OLED device, and the voltage Vs of the second node S is raised to the turn-on voltage of the OLED device, the OLED device will be turned on, and then the set voltage of the second node S cannot be maintained, so that the threshold voltage cannot be accurately obtained, and the threshold voltage compensation cannot be accurately performed. In order to avoid the problem that the threshold voltage Vth of the second transistor T2 is biased to a large value in the negative range, it is necessary to improve the manufacturing process of the transistor to avoid the threshold voltage Vth of the second transistor T2 from being too biased to a large value in the negative range.

In addition, in the sensing mode, when the turn-on voltage of the OLED device is relatively low, the detection voltage Vsense output normally by the Data signal line Data may turn on the OLED device, and the sensing signal line Sense may not be fully charged, so that the extracted threshold voltage Vth of the second transistor T2 may be relatively large, and then, after compensation is performed based on the extracted relatively large threshold voltage Vth, an overcompensation phenomenon may occur. In order to avoid the problem that the threshold voltage compensation cannot be accurately performed due to the fact that the lighting voltage of the OLED device is too low, the threshold voltage Vth is obtained by reducing the detection voltage Vsense output by the Data signal line Data, but the compensation effect is poor, and the compensation space is reduced.

Fig. 2 is a circuit schematic diagram of a pixel circuit provided in an exemplary embodiment of the present disclosure, and as shown in fig. 2, the pixel circuit provided in an embodiment of the present disclosure may include: a drive circuit 21, a data write circuit 22, a detection circuit 23, and a control circuit 24; wherein,

a Data write circuit 22 connected to the first scanning signal line G1, the Data signal line Data, the first node G, and the second node S, and configured to supply a signal of the Data signal line Data to the first node G under control of a signal of the first scanning signal line G1;

a driving circuit 21 connected to the first node G, the second node S, and the first power line VDD, and configured to drive the light emitting element L to emit light when the pixel circuit is in a display mode;

a sensing circuit 23 connected to the second node S, the second scan signal line G2, and the Sense signal line Sense, and configured to supply a reference voltage Vref to the second node through the Sense signal line Sense under the control of a signal of the second scan signal line G2 when the pixel circuit is in a sensing mode; charging the second node S, and transmitting the charging voltage Vs of the second node S to the sensing signal line Sense;

a control circuit 24 connected to the second node S, the third scanning signal line G3, and the first pole (e.g., anode) of the light emitting element L, and configured to disconnect the second node S from the first pole (e.g., anode) of the light emitting element L under the control of a signal of the third scanning signal line G3 when the pixel circuit is in the sensing mode; alternatively, when the pixel circuit is in the display mode, the connection between the second node S and the first pole (e.g., anode) of the light emitting element L is turned on;

a second electrode (e.g., cathode) of the light emitting element L is connected to a second power line VSS.

In this way, the pixel circuit provided by the embodiment of the disclosure can avoid the second node S from being directly connected to the first pole of the light emitting element L by providing the control circuit between the second node S and the first pole of the light emitting element L. Therefore, when the pixel circuit is in the sensing mode, the control circuit disconnects the connection between the second node and the first pole of the light-emitting element, no matter the threshold voltage Vth of the driving transistor in the pixel circuit generates negative deviation, and the degree of the negative deviation is large, or when the lighting voltage of the light-emitting element is low, the second node S can be prevented from leaking electricity to the light-emitting element, the charging current can only flow to the sensing signal line Sense, therefore, the accuracy of extracting the threshold voltage Vth of the driving transistor can be improved, furthermore, when the pixel circuit is in the display mode, the control circuit switches on the connection between the second node and the first pole of the light-emitting element, the threshold voltage compensation can be accurately carried out, the compensation effect can be improved, and the display effect can be improved.

In one exemplary embodiment, the first, second, and third scan signal lines G1, G2, and G3 may extend in a horizontal direction, and the Data signal line Data, the sensing signal line Sense, the first power supply line VDD, and the second power supply line VSS may extend in a vertical direction.

In an exemplary embodiment, as shown in fig. 2, the data writing circuit 22 may include: an input sub-circuit 221 and a storage sub-circuit 222, wherein the input sub-circuit 221 is connected to the first scanning signal line G1, the Data signal line Data, and the first node G, and is configured to write a signal of the Data signal line Data into the first node G under control of a signal of the first scanning signal line G1; the storage sub-circuit 222 is connected to the first node G and the second node S, and configured to stabilize a voltage difference between the first node G and the second node S.

Fig. 3 is a schematic diagram of an equivalent circuit of the pixel circuit shown in fig. 2, and fig. 4 is a schematic diagram of another equivalent circuit of the pixel circuit shown in fig. 2. The pixel circuit provided by the exemplary embodiment of the present disclosure is explained below with reference to the circuit configurations shown in fig. 3 and 4. Wherein the types of transistors in fig. 3 and 4 are exemplary and should not be considered as limiting to the embodiments of the present disclosure.

In an exemplary embodiment, as shown in fig. 3 and 4, the data writing circuit 22 may include: a first transistor T1 and a storage capacitor Cst, wherein a control electrode of the first transistor T1 is connected to the first scan signal line G1, a first electrode of the first transistor T1 is connected to the Data signal line Data, and a second electrode of the first transistor T1 is connected to the first node G; a first pole of the storage capacitor Cst is connected to the first node G, and a second pole of the storage capacitor Cst is connected to the second node S. For example, the first transistor T1 is configured to be in a turned-on state under the control of a signal of the first scan signal line G1 to supply a signal of the Data signal line Data to the first node G, and the storage capacitor Cst can store a voltage across it. Here, the embodiments of the present disclosure do not limit the number and types of transistors in the data writing circuit as long as the functions thereof can be realized.

In an exemplary embodiment, as shown in fig. 3 and 4, the driving circuit 21 may include: a second transistor T2, wherein a control electrode of the second transistor T2 is connected to the first node G, i.e., a control electrode of the second transistor T2 is connected to a second electrode of the first transistor T1, i.e., a control electrode of the second transistor T2 is connected to the first electrode of the storage capacitor Cst; a first electrode of the second transistor T2 is connected to the first power supply line VDD; a second pole (e.g., as a source) of the second transistor T2 is connected to the second node S, i.e., a second pole of the second transistor T2 is connected to a second pole of the storage capacitor Cst. The second transistor T2 is a driving transistor, and the first node G is a control electrode of the driving transistor. Here, the embodiments of the present disclosure do not limit the number and types of transistors in the driving circuit as long as the functions thereof can be achieved.

In an exemplary embodiment, as shown in fig. 3 and 4, the detection circuit 23 may include: a third transistor T3, wherein a control electrode of the third transistor T3 is connected to the second scan signal line G2; a first pole of the third transistor T3 is connected to the second node S, i.e., a first pole of the third transistor T3 is connected to the second pole of the second transistor T2; the second pole of the third transistor T3 is connected to the sensing signal line Sense. For example, the third transistor T3 is configured to be in a turn-on state under the control of a signal of the second scan signal line G2, and can turn on the second node S and the sensing signal line Sense. When the second node S is connected to the sensing signal line Sense, a reference voltage Vref (e.g., Vref ═ 0V) on the sensing signal line Sense may be provided to the second node S, so as to set the second node S. Alternatively, when the second node S is turned on by the sensing signal line Sense, the second node S may be charged by a current generated by the second transistor T2 (i.e., the driving transistor), and the charged voltage of the second node S may be transferred to the sensing signal line Sense, i.e., the sensing signal line Sense is charged, so as to implement the threshold voltage Vth extracted to the second transistor T2 (i.e., the driving transistor). Here, the embodiments of the present disclosure do not limit the number and types of transistors in the detection circuit as long as the functions thereof can be realized.

In an exemplary embodiment, the control circuit may include: at least one transistor. Here, the embodiments of the present disclosure do not limit the number and types of transistors in the control circuit as long as the functions thereof can be realized.

In an exemplary embodiment, as shown in fig. 3, the control circuit 24 may include: 1 transistor, i.e., a fourth transistor T4, wherein a control electrode of the fourth transistor T4 is connected to the third scan signal line G3; a first pole of the fourth transistor T4 is connected to the second node S, i.e., a first pole of the fourth transistor T4 is connected to the second pole of the second transistor T2; the second electrode of the fourth transistor T4 is connected to the first electrode (e.g., as an anode) of the light emitting element L. For example, the fourth transistor T4 may be configured to be turned off under the control of the signal of the first scanning signal line G1 in the sensing mode, and then, no matter whether the threshold voltage Vth of the second transistor T2 is in the negative-going region and has a large value or the on-state voltage of the light emitting element L (i.e., OLED) is low, the charging current will only flow from the second node S to the sensing signal line Sense, so that the threshold voltage Vth of the second transistor T2 can be accurately extracted, and accurate luminance compensation can be performed. For example, the fourth transistor T4 may be further configured to be in an on state under the control of the signal of the first scan signal line G1 in the display mode, and then the driving current generated by the driving circuit will flow from the second node S to the first pole of the light emitting element L, and thus, the light emitting element L can be realized to emit light.

In an exemplary embodiment, as shown in fig. 4, the control circuit 24 may include: 2 transistors, i.e., a fourth transistor T4 and a fifth transistor T5, wherein a control electrode of the fourth transistor T4 is connected to the third scan signal line G3; a first pole of the fourth transistor T4 is connected to the second node S, i.e., a first pole of the fourth transistor T4 is connected to the second pole of the second transistor T2; the second pole of the fourth transistor T4 is connected with the first pole of the fifth transistor T5; a control electrode of the fifth transistor T5 is connected to the third scanning signal line G3; a second electrode of the fifth transistor T5 is connected to a first electrode (e.g., as an anode) of the light emitting element L. In this way, since the fourth transistor T4 and the fifth transistor T5 are simultaneously controlled by the signal of the third scanning signal line G3, when the pixel circuit enters the sensing mode, the fourth transistor T4 and the fifth transistor T5 can be controlled to be in the off state at the same time by the signal of the third scanning signal line G3, so that no matter the threshold voltage Vth of the second transistor T2 is in the negative range and has a large value, or the on-state voltage of the light emitting element L (i.e., OLED) is low, the charging current can only flow from the second node S to the sensing signal line Sense, and the threshold voltage Vth of the second transistor T2 can be accurately extracted, thereby performing accurate luminance compensation. Therefore, the problem that the fourth transistor T4 cannot be completely turned off when the voltage of the signal provided by the third scanning signal line G3 is negative voltage due to the transistor manufacturing process can be avoided, it can be better ensured that the second node S does not leak electricity to the light emitting element L (i.e., the OLED), and further, the data error caused by the current leakage can be avoided in the sensing mode, the threshold voltage compensation can be accurately performed in the display mode, a better compensation effect is achieved, and the display effect is improved.

In an exemplary embodiment, the storage capacitor Cst may be a capacitor device manufactured by a process, for example, a capacitor device is realized by manufacturing a special capacitor electrode, and a plurality of capacitor electrodes of the capacitor may be realized by a metal layer, a semiconductor layer (e.g., doped polysilicon), and the like. Alternatively, the storage capacitor Cst may be a parasitic capacitor between a plurality of devices, and may be implemented by the transistor itself and other devices or lines. The connection method of the storage capacitor Cst includes, but is not limited to, the above-described method, and may be other suitable connection methods as long as the level of the corresponding node can be stored. Here, the exemplary embodiments of the present disclosure do not limit this.

In one exemplary embodiment, the light emitting element L may include: any one of Organic Light Emitting Diodes (OLEDs), Quantum Dot Light Emitting Diodes (QLEDs), and inorganic Light Emitting Diodes (LEDs). For example, the Light Emitting element L may be a Micro-scale Light Emitting element, such as a Micro Light-Emitting Diode (Micro LED), a sub-millimeter Light-Emitting Diode (Mini LED), or a Micro organic Light-Emitting Diode (Micro OLED). Here, the embodiment of the present disclosure does not limit the type of the light emitting element. For example, taking the light emitting element L as an organic electroluminescent diode (OLED) as an example, the light emitting element may include: a first electrode (e.g., as an anode), an organic light emitting layer, and a second electrode (e.g., as a cathode) are stacked. Here, the structure of the light-emitting element is not limited in the embodiments of the present disclosure.

In an exemplary embodiment, the second Transistor T2 is a driving Transistor (DTFT), and the first Transistor T1, the third Transistor T3, the fourth Transistor T4, and the fifth Transistor T5 are switching transistors (STFT).

In one exemplary embodiment, the first to fifth transistors T1 to T5 may be P-type transistors, or alternatively, may be N-type transistors. Therefore, the same type of transistors are adopted in the pixel circuit, so that the process flow can be simplified, the process difficulty is reduced, and the yield of products is improved. In one exemplary embodiment, the first to fifth transistors T1 to T5 may include P-type transistors and N-type transistors. Here, the embodiments of the present disclosure do not limit the types of transistors in the pixel circuit. The P-type transistor is switched on when the control electrode is a low level signal and is switched off when the control electrode is a high level signal; the N-type transistor is turned on when the control signal is a high level signal and turned off when the control signal is a low level signal.

In an exemplary embodiment, the type of the fifth transistor T5 and the type of the fourth transistor T4 may be the same. For example, the type of the fifth transistor T5 and the fourth transistor T4 may both be P-type transistors, or may both be N-type transistors.

In an exemplary embodiment, the first power line VDD may provide a high level signal.

In one exemplary embodiment, the second power line VSS may provide a low-level signal. For example, the second power line VSS may supply a zero voltage or a ground voltage.

In an exemplary embodiment, the first node G and the second node S do not represent components that have to be present in practice, but rather represent the junction of the relevant electrical connections in the circuit diagram.

In an exemplary embodiment, as shown in fig. 3, a pixel circuit provided in an exemplary embodiment of the present disclosure may include: a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4, a storage capacitor Cst, a Data signal line Data, a first scan signal line G1, a second scan signal line G2, a third scan signal line G3, a Sense signal line Sense, a first power supply line VDD, and a second power supply line VSS. The first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all N-type transistors. A control electrode of the first transistor T1 is connected to the first scan signal line G1, a first electrode of the first transistor T1 is connected to the Data signal line Data, and a second electrode of the first transistor T1 is connected to the first node G; a first pole of the storage capacitor Cst is connected to the first node G, and a second pole of the storage capacitor Cst is connected to the second node S; a control electrode of the second transistor T2 is connected to the first node G, i.e., a control electrode of the second transistor T2 is connected to the second electrode of the first transistor T1, i.e., a control electrode of the second transistor T2 is connected to the first electrode of the storage capacitor Cst; a first electrode of the second transistor T2 is connected to the first power supply line VDD; a second pole (e.g., as the source S) of the second transistor T2 is connected to the second node S, i.e., a second pole of the second transistor T2 is connected to a second pole of the storage capacitor Cst; a control electrode of the third transistor T3 is connected to the second scan signal line G2; a first pole of the third transistor T3 is connected to the second node S, i.e., a first pole of the third transistor T3 is connected to the second pole of the second transistor T2; the second pole of the third transistor T3 is connected to the sensing signal line Sense; a control electrode of the fourth transistor T4 is connected to the third scanning signal line G3; a first pole of the fourth transistor T4 is connected to the second node S, i.e., a first pole of the fourth transistor T4 is connected to the second pole of the second transistor T2; the second electrode of the fourth transistor T4 is connected to the first electrode (e.g., as an anode) of the light emitting element L.

In an exemplary embodiment, as shown in fig. 3, a pixel circuit provided in an exemplary embodiment of the present disclosure may include: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a storage capacitor Cst, a Data signal line Data, a first scan signal line G1, a second scan signal line G2, a third scan signal line G3, a sensing signal line Sense, a first power supply line VDD, and a second power supply line VSS. The first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all N-type transistors. A control electrode of the first transistor T1 is connected to the first scan signal line G1, a first electrode of the first transistor T1 is connected to the Data signal line Data, and a second electrode of the first transistor T1 is connected to the first node G; a first pole of the storage capacitor Cst is connected to the first node G, and a second pole of the storage capacitor Cst is connected to the second node S; a control electrode of the second transistor T2 is connected to the first node G, i.e., a control electrode of the second transistor T2 is connected to the second electrode of the first transistor T1, i.e., a control electrode of the second transistor T2 is connected to the first electrode of the storage capacitor Cst; a first electrode of the second transistor T2 is connected to the first power supply line VDD; a second pole (e.g., as the source S) of the second transistor T2 is connected to the second node S, i.e., a second pole of the second transistor T2 is connected to a second pole of the storage capacitor Cst; a control electrode of the third transistor T3 is connected to the second scan signal line G2; a first pole of the third transistor T3 is connected to the second node S, i.e., a first pole of the third transistor T3 is connected to the second pole of the second transistor T2; the second pole of the third transistor T3 is connected to the sensing signal line Sense; a control electrode of the fourth transistor T4 is connected to the third scanning signal line G3; a control electrode of the fourth transistor T4 is connected to the third scanning signal line G3; a first pole of the fourth transistor T4 is connected to the second node S, i.e., a first pole of the fourth transistor T4 is connected to the second pole of the second transistor T2; the second pole of the fourth transistor T4 is connected with the first pole of the fifth transistor T5; a control electrode of the fifth transistor T5 is connected to the third scanning signal line G3; a second electrode of the fifth transistor T5 is connected to a first electrode (e.g., as an anode) of the light emitting element L.

The pixel circuit provided by the exemplary embodiment of the present disclosure is explained below by referring to the circuit configuration shown in fig. 3 through the operation process of the pixel circuit.

Fig. 5 is a timing diagram of signals of the pixel circuit shown in fig. 3 in the sensing mode, fig. 6 is a timing diagram of signals of the pixel circuit shown in fig. 3 in the sensing mode, and fig. 7 is a timing diagram of signals of the pixel circuit shown in fig. 3 in the display mode. In the above description, the levels of the potentials of the signal timing diagrams shown in fig. 5 to 7 are only schematic and do not represent actual potential values or relative proportions, and the first transistor T1 to the fourth transistor T in the pixel circuit provided in the exemplary embodiment of the present disclosure are all N-type transistors, which is described as an example, corresponding to the embodiment of the present disclosure. The N-type transistor is turned on when the control electrode is a high level signal and is turned off when the control electrode is a low level signal. However, the present disclosure is not limited thereto. The transistors in the embodiments of the present disclosure may also be P-type transistors. The P-type transistor is turned on when the control signal is a low level signal and turned off when the control signal is a high level signal.

As shown in fig. 5 and 6, when the pixel circuit provided by the exemplary embodiment of the present disclosure is in the sensing mode, the working process of the pixel circuit may include: the timing waveforms of the plurality of signal lines (including the timing waveforms of the signals of the first scan signal line G1, the second scan signal line G2, the third scan signal line G3, the Data signal line Data, and the sensing signal line Sense) in each stage are shown in fig. 5 and 6 as a first stage S1 and a second stage S2. In fig. 5, the signal of the third scanning signal line G3 is always a low-level signal; in fig. 6, the signal of the third scan signal line G3 is a low signal only during the first stage S1 and the second stage S2, and is a high signal during the other periods.

In an exemplary embodiment, as shown in fig. 5 and 6, the operation process of the pixel circuit in the embodiment of the present disclosure in the sensing mode may include two stages, as follows:

the first stage S1 may be referred to as a Reset (Reset) stage or a set stage.

As shown in fig. 5 and 6, in the first stage S1, the potential of the second node S is set, that is, the light emitting element L (i.e., OLED) is reset. Among them, the signals of the first and second scan signal lines G1 and G2 are high level signals, and the signal of the third scan signal line G3 is low level signal, so that the first transistor T1 and the third transistor T3 are both turned on, and the fourth transistor T4 is turned off. By applying the reference voltage Vref to the sensing signal line Sense, if Vref is equal to 0V, the reference voltage Vref provided by the sensing signal line Sense can set the second node S through the turned-on third transistor T3, and at this time, the potential Vs of the second node S is equal to 0V. Then, the Data signal line Data provides a predetermined Data voltage Vdata, and the first node G may be charged through the turned-on first transistor T1, at this time, the potential Vg of the first node G is Vdata, and then, the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 is Vdata > Vth at this time, so that the second transistor T2 is turned on. In the exemplary embodiment of the present disclosure, the symbol Vg may represent both the potential of the first node G and the potential of the control electrode of the second transistor T2; the symbol Vs may indicate both the potential of the second node S and the potential of the second pole of the second transistor T2.

The second stage S2 may be referred to as an extraction stage of the threshold voltage Vth.

As shown in fig. 5 and 6, in the second stage S2, the signals of the first scan signal line G1 and the second scan signal line G2 are high level signals, the signal of the third scan signal line G3 is low level signal, the first transistor T1 and the third transistor T3 are both turned on, and the fourth transistor T4 is turned off. At this time, since the sensing signal line Sense is in a Floating (Floating) state and the first transistor T1 is kept on, the potential Vg of the first node G remains unchanged, and Vg is still Vdata. The control electrode of the second transistor T2 is turned on under the control of the potential Vg of the first node G, and the sensing signal line Sense is continuously charged, so that the potential Vs of the second node S gradually rises until the voltage between the potential Vg of the first node G and the potential Vs of the second node S is equal to the threshold voltage Vth of the second transistor T2, that is, the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 is Vg-Vs Vth, so that the second transistor T2 is turned off. At this time, it is detected that the reference voltage Vsense on the sensing signal line Sense is Vs, that is, a difference value between the reference voltage Vsense on the sensing signal line Sense and the Data voltage Vdata on the Data signal line Data is a value of the threshold voltage Vth of the second transistor T2, that is, the threshold voltage Vth of the second transistor T2 in each pixel circuit is calculated by a formula Vg-Vs ═ Vth. I.e. the theoretical threshold voltage Vth of the drive transistor is obtained.

As shown in fig. 7, when the pixel circuit provided by the exemplary embodiment of the present disclosure is in the display mode, the working process of the pixel circuit may include: the third stage S3, fig. 7, shows the timing waveforms of the plurality of signal lines in each stage (including the timing waveforms of the signals of the first scanning signal line G1, the second scanning signal line G2, the third scanning signal line G3, and the Data signal line Data).

The third stage S3 may be referred to as a glow stage.

As shown in fig. 7, in the third stage S3, the signals of the first scan signal line G1, the second scan signal line G2 and the third scan signal line G3 are all high level signals, and the first transistor T1, the third transistor T3 and the fourth transistor T4 are all turned on. By applying the reference voltage Vref to the sensing signal line Sense, if Vref is equal to 0V, the reference voltage Vref provided by the sensing signal line Sense can set the second node S through the turned-on third transistor T3, and at this time, the potential Vs of the second node S is equal to 0V. Then, the Data signal line Data provides the adjusted Data voltage Vdata ', and the first node G may be charged through the turned-on first transistor T1, at this time, the potential Vg of the first node G is Vdata ', and then, the voltage difference Vgs between the control electrode and the second electrode of the second transistor T2 is Vdata ' > Vth at this time, so that the second transistor T2 is turned on. Then, the second transistor T2 may generate a corresponding driving current according to the adjusted Data voltage Vdata' provided by the Data signal line Data and the signal provided by the first power line VDD. Since the fourth transistor T4 is turned on, a driving current may flow from the second node S to the light emitting element L, and thus the light emitting element L may emit light with a corresponding luminance in response to the driving current output from the pixel circuit of the sub-pixel.

In the pixel circuit provided in the embodiment of the disclosure, when the pixel circuit is in the sensing mode, the fourth transistor T4 is in the off state under the control of the signal of the first scanning signal line G1, so that no matter the threshold voltage Vth of the second transistor T2 is in the negative-going interval and has a large value, or the lighting voltage of the light emitting element L (i.e., OLED) is low, the charging current only flows from the second node S to the sensing signal line Sense, but not to the light emitting element L, thereby avoiding the leakage from the second node S to the light emitting element, and obtaining the accurate value of the threshold voltage Vth of the second transistor T2. Then, the obtained threshold voltage Vth of the second transistor T2 in the sub-pixel is written into the Data voltage Vdata of the Data signal line Data of the corresponding sub-pixel by an algorithm to form a new Data voltage Vdata ', that is, Vdata' is Vdata + Vth; the new Data voltage Vdata 'is supplied to the first node G through the Data signal line Data, so that the second transistor T2 generates a corresponding driving current under the control of the new Data voltage Vdata', and since the fourth transistor T4 is in a turn-on state under the control of the signal of the first scan signal line G1 when the pixel circuit is in the display mode, the driving current may be transmitted to the light emitting element L through the fourth transistor T4 to drive the light emitting element L to emit light. Thus, through the above process, since the accurate threshold voltage Vth of the second transistor T2 can be obtained, then, the threshold voltage Vth of the second transistor T2 can be accurately compensated, so that the adverse effect of the inconsistency of the threshold voltages Vth of the second transistors T2 (i.e., the driving transistors) on the display can be eliminated, and the display effect can be further improved.

Of course, the type of the thin film transistor used in the pixel circuit in the embodiment of the present disclosure is not limited to the implementation given above, and can be replaced by those skilled in the art according to the actual situation, and correspondingly, the timing sequence of the external signal of the pixel circuit can be adjusted by those skilled in the art according to the actual situation. Here, the embodiment of the present disclosure does not limit this.

The embodiment of the disclosure also provides a display panel. The display panel may include: a plurality of pixel units arranged in an array, each pixel unit may include: a plurality of sub-pixels, each of which may include: a light emitting element and a pixel circuit connected to the light emitting element, wherein the pixel circuit in at least one of the plurality of sub-pixels may be the pixel circuit in one or more of the exemplary embodiments described above.

In an exemplary embodiment, the display panel may further include: the pixel circuit may be disposed on the substrate base.

In one exemplary embodiment, the colors of the plurality of sub-pixels in the pixel unit are different.

In one exemplary embodiment, the plurality of sub-pixels in the pixel unit may include: four different color sub-pixels.

In an exemplary embodiment, the shape of the sub-pixel in the pixel unit may be a rectangular shape, a diamond shape, a pentagon shape, or a hexagon shape. Here, the shape of the sub-pixel is not limited in the embodiments of the present disclosure.

In an exemplary embodiment, when the pixel unit includes four sub-pixels, the four sub-pixels may be arranged in a horizontal parallel, vertical parallel, or Square (Square) manner. Here, the arrangement of the sub-pixels in the embodiments of the present disclosure is not limited.

For example, fig. 8 is a schematic plan structure view of a display panel in an exemplary embodiment of the present disclosure. As shown in fig. 8, the display panel may include a plurality of pixel units P arranged in a matrix, at least one of the plurality of pixel units P may include a first sub-pixel P1 emitting light of a first color, a second sub-pixel P2 emitting light of a second color, a third sub-pixel P3 emitting light of a third color, and a fourth sub-pixel P4 emitting light of a fourth color, and each of the first sub-pixel P1, the second sub-pixel P2, the third sub-pixel P3, and the fourth sub-pixel P4 may include a pixel circuit and a light emitting element. Here, the embodiments of the present disclosure do not limit the number of sub-pixels in a pixel unit.

For example, as shown in fig. 8, the pixel unit P may include therein a red (R) sub-pixel, a green (G) sub-pixel, a blue (B) sub-pixel, and a white (W) sub-pixel. Here, the color of the sub-pixel in the pixel unit is not limited in the embodiments of the present disclosure.

For example, as shown in fig. 8, the red (R), green (G), blue (B), and white (W) sub-pixels may have a rectangular shape.

For example, as shown in fig. 8, when the pixel unit includes four sub-pixels, the four sub-pixels may be arranged in a Square (Square) manner.

In one exemplary embodiment, at least one of the plurality of sub-pixels in the pixel unit may include: the driving circuit comprises one or more of a sub-pixel and a sub-pixel, wherein the starting voltage of a light emitting element in the sub-pixels is lower than a first preset voltage threshold, and the threshold voltage of a driving transistor in a pixel circuit in the sub-pixels is smaller than a second preset voltage threshold, wherein the second preset voltage threshold is a negative threshold voltage.

In an exemplary embodiment, taking the pixel unit including four sub-pixels of different colors as an example, for example, the pixel unit may include a red (R) sub-pixel, a green (G) sub-pixel, a blue (B) sub-pixel, and a white (W) sub-pixel, but since the turn-on voltages of the light emitting elements (e.g., OLEDs) in the red (R) sub-pixel, the green (G) sub-pixel, the blue (B) sub-pixel, and the white (W) sub-pixel are not the same, it is possible that the turn-on voltages of the light emitting elements (e.g., OLEDs) of the sub-pixels of 1 or 2 of the four colors RGBW are lower. Therefore, the pixel circuit with the control circuit in one or more of the above embodiments may be applied only to sub-pixels in which the turn-on voltages of the light emitting elements are lower than the first preset voltage threshold among the red (R), green (G), blue (B), and white (W) sub-pixels. For example, if some processes make the turn-on voltage of the red (R) sub-pixel lower than the turn-on voltages of other sub-pixels (e.g., the green (G) sub-pixel, the blue (B) sub-pixel, and the white (W) sub-pixel), the pixel circuit with the control circuit in one or more of the above embodiments provided by the embodiments of the disclosure may be applied to only the red (R) sub-pixel, so as to achieve accurate threshold voltage acquisition and accurate threshold voltage compensation. Here, the embodiment of the present disclosure does not limit this.

In an exemplary embodiment, the first preset voltage threshold may include, but is not limited to, 3V. Of course, other values may be used, which may cause the pixel circuit to be abnormal in the sensing mode, so that the threshold voltage cannot be accurately extracted. Here, the embodiment of the present disclosure does not limit this.

In an exemplary embodiment, the second preset voltage threshold may include, but is not limited to, -3V, -4V, or-5V, etc. Of course, other values may be used, which may cause the pixel circuit to be abnormal in the sensing mode, so that the threshold voltage cannot be accurately extracted. Here, the embodiment of the present disclosure does not limit this.

For example, the pixel unit includes four sub-pixels, each of which includes: as shown in fig. 9, fig. 9 shows four sub-pixels located in the same column in different rows, and when the lighting voltage of the light-emitting element included in only one of the four sub-pixels is low or the threshold voltage of the driving transistor in the pixel circuit included in only one sub-pixel is shifted in the negative direction to a large extent, the fourth transistor T4 may be provided only in the pixel circuit included in the one sub-pixel, that is, the control circuit may be provided in the pixel circuit included in only one sub-pixel.

For example, the pixel unit includes four sub-pixels, each of which includes: as shown in fig. 10, fig. 10 shows four sub-pixels located in different rows and the same column, and when the threshold voltages of the driving transistors in the pixel circuits included in the four sub-pixels are shifted in the negative direction, the fourth transistor T4 may be provided in the pixel circuit included in the four sub-pixels, that is, a control circuit may be provided in the pixel circuit included in each sub-pixel.

In an exemplary embodiment, the pixel circuits in all the sub-pixels in the display panel may share the same third scan signal line, or the pixel circuits in each pixel row may share the same third scan signal line.

For example, fig. 11 is a schematic diagram of scan signal lines in a display panel in an exemplary embodiment of the disclosure, and as shown in fig. 11, transistors (e.g., the fourth transistor T4) included in a control circuit in a pixel circuit in an embodiment of the disclosure may be individually controllable in all pixel rows in the entire panel, so that the third scan signal line G3 may be arranged similarly to the first scan signal line G1 and the second scan signal line G2, and pixel circuits included in all sub-pixels in each pixel row may share the same third scan signal line, and thus, the transistors (e.g., the fourth transistor T4) included in the control circuit may be turned on or off row by row.

For example, fig. 12 is another schematic diagram of the scan signal lines in the display panel in the exemplary embodiment of the disclosure, as shown in fig. 12, since the transistors (e.g., the fourth transistor T4) included in the control circuit in the pixel circuit in the exemplary embodiment of the disclosure are normally on in the display mode and are off in the sensing mode, all pixel rows can be controlled together in the whole panel, and then the third scan signal lines G3 of the whole panel can be completely bound together, that is, the pixel circuits in all the sub-pixels can share the same third scan signal line.

In an exemplary embodiment, the display panel may include, but is not limited to, an OLED display panel or a QLED display panel, etc. Here, the embodiments of the present disclosure do not limit the type of the display panel.

In an exemplary embodiment, the display panel may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Here, the embodiments of the present disclosure do not limit the type of the display panel. Other essential components of the display panel are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present disclosure.

For technical details that are not disclosed in the embodiments of the display panel of the present disclosure, those skilled in the art should understand with reference to the description in the embodiments of the pixel circuit of the present disclosure, and therefore, the detailed description is omitted here.

The embodiment of the disclosure also provides a driving method of the pixel circuit, which can be applied to the pixel circuit in one or more embodiments.

Fig. 13 is a flowchart illustrating a driving method of a pixel circuit in an exemplary embodiment of the disclosure, and as shown in fig. 13, the driving method may include:

step 131: in a sensing mode, supplying a signal of a data signal line to a first node under the control of a signal of a first scan signal line; under the control of the signal of the second scanning signal line, providing a reference voltage to the second node through the sensing signal line, charging the second node, and transmitting the charging voltage of the second node to the sensing signal line; disconnecting the second node from the first electrode of the light emitting element under control of a signal of the third scanning signal line;

step 132: in the display mode, a signal of the data signal line is supplied to the first node under control of a signal of the first scanning signal line; conducting a connection between the second node and the first electrode of the light emitting element under control of a signal of the third scanning signal line; the light emitting element is driven to emit light under the control of a signal of the first node.

For technical details that are not disclosed in the embodiments of the driving method of the pixel circuit of the present disclosure, those skilled in the art should refer to the description in the embodiments of the pixel circuit of the present disclosure for understanding, and therefore, the description is omitted here.

Although the embodiments disclosed in the present disclosure are described above, the above description is only for the convenience of understanding the present disclosure, and is not intended to limit the present disclosure. It will be understood by those skilled in the art of the present disclosure that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure, and that the scope of the disclosure is to be limited only by the terms of the appended claims.

Claims

1. A pixel circuit, comprising: the device comprises a driving circuit, a data writing circuit, a detection circuit and a control circuit; wherein,

2. The pixel circuit according to claim 1, wherein the control circuit comprises: and a fourth transistor, wherein a control electrode of the fourth transistor is connected to a third scanning signal line, a first electrode of the fourth transistor is connected to the second node, and a second electrode of the fourth transistor is connected to a first electrode of a light emitting element.

3. The pixel circuit according to claim 2, wherein the control circuit further comprises: a fifth transistor, wherein a control electrode of the fourth transistor is connected to the third scanning signal line, a first electrode of the fourth transistor is connected to the second node, a second electrode of the fourth transistor is connected to a first electrode of the fifth transistor, a second electrode of the fifth transistor is connected to a first electrode of a light emitting element, and a control electrode of the fifth transistor is connected to the third scanning signal line.

4. The pixel circuit according to any one of claims 1 to 3, wherein the driving circuit comprises: a second transistor, wherein a control electrode of the second transistor is connected to the first node, a first electrode of the second transistor is connected to the first power line, and a second electrode of the second transistor is connected to the second node.

5. The pixel circuit according to any one of claims 1 to 3, wherein the data writing circuit includes: a first transistor and a storage capacitor, wherein a control electrode of the first transistor is connected to the first scan signal line, a first electrode of the first transistor is connected to the data signal line, and a second electrode of the first transistor is connected to the first node; the first pole of the storage capacitor is connected with the first node, and the second pole of the storage capacitor is connected with the second node.

6. The pixel circuit according to any one of claims 1 to 3, wherein the detection circuit comprises: and a third transistor, wherein a control electrode of the third transistor is connected to the second scan signal line, a first electrode of the third transistor is connected to the second node, and a second electrode of the third transistor is connected to the sensing signal line.

7. The pixel circuit according to claim 1,

the data write circuit includes: a first transistor and a storage capacitor, wherein a control electrode of the first transistor is connected to the first scan signal line, a first electrode of the first transistor is connected to the data signal line, and a second electrode of the first transistor is connected to the first node; the first pole of the storage capacitor is connected with the first node, and the second pole of the storage capacitor is connected with the second node;

the driving circuit includes: a second transistor, wherein a control electrode of the second transistor is connected to the first node, a first electrode of the second transistor is connected to the first power line, and a second electrode of the second transistor is connected to the second node;

the detection circuit includes: a third transistor, wherein a control electrode of the third transistor is connected to the second scan signal line, a first electrode of the third transistor is connected to the second node, and a second electrode of the third transistor is connected to the sense signal line; and

the control circuit includes: and a fourth transistor, wherein a control electrode of the fourth transistor is connected to a third scanning signal line, a first electrode of the fourth transistor is connected to the second node, and a second electrode of the fourth transistor is connected to a first electrode of a light emitting element.

8. The pixel circuit according to claim 1,

the control circuit includes: a fourth transistor and a fifth transistor, wherein a control electrode of the fourth transistor is connected to the third scanning signal line, a first electrode of the fourth transistor is connected to the second node, a second electrode of the fourth transistor is connected to a first electrode of the fifth transistor, a second electrode of the fifth transistor is connected to a first electrode of a light emitting element, and a control electrode of the fifth transistor is connected to the third scanning signal line.

9. A display panel, comprising: a plurality of pixel units arranged in an array, each pixel unit comprising: a plurality of sub-pixels, each sub-pixel comprising: a light emitting element and a pixel circuit connected to the light emitting element, wherein the pixel circuit in at least one of the plurality of sub-pixels is the pixel circuit according to any one of claims 1 to 8.

10. The display panel of claim 9, wherein the at least one sub-pixel comprises: the driving circuit comprises a plurality of sub-pixels, wherein the sub-pixels are arranged in a matrix, the starting voltage of the light emitting elements in the sub-pixels is lower than a first preset voltage threshold, the threshold voltage of the driving transistors in the pixel circuits in the sub-pixels is smaller than a second preset voltage threshold, and the second preset voltage threshold is a negative threshold voltage.

11. The display panel according to claim 9, wherein the pixel circuits according to any one of claims 1 to 8 in all the sub-pixels share a same third scanning signal line, or wherein the pixel circuits according to any one of claims 1 to 8 in each pixel row share a same third scanning signal line.

12. The display panel of claim 9, wherein the plurality of sub-pixels comprises: four different color sub-pixels.

13. The display panel of claim 12, wherein the four different color sub-pixels comprise: red, blue, green and white sub-pixels.

14. A driving method of a pixel circuit, applied to the pixel circuit according to any one of claims 1 to 8, the driving method comprising:

in a sensing mode, supplying a signal of the data signal line to the first node under the control of a signal of the first scan signal line; under the control of the signal of the second scanning signal line, providing a reference voltage to the second node through the sensing signal line, charging the second node, and transmitting the charging voltage of the second node to the sensing signal line; disconnecting the second node from the first electrode of the light emitting element under control of a signal of the third scanning signal line;