CN207069876U - DC arc-suppression circuits - Google Patents
DC arc-suppression circuits Download PDFInfo
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- CN207069876U CN207069876U CN201720922194.XU CN201720922194U CN207069876U CN 207069876 U CN207069876 U CN 207069876U CN 201720922194 U CN201720922194 U CN 201720922194U CN 207069876 U CN207069876 U CN 207069876U
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- arc
- resistance
- suppression circuits
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- diode
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Abstract
The utility model provides a kind of DC arc-suppression circuits, including NMOS tube Q1, electric capacity C1, resistance R2, resistance R1, voltage-regulator diode D2, wherein, the grounded drain of the NMOS tube Q1, the one end of source electrode respectively with the electric capacity C1, resistance R2 is connected, the other end of the grid respectively with the electric capacity C1, resistance R2 is connected, the other end of the resistance R2 is connected with one end of the resistance R1, the other end of the resistance R1 is connected with the input of the voltage-regulator diode D2, and the output end of the voltage-regulator diode D2 is connected to voltage input end.The beneficial effects of the utility model are:When inserting DC plug, arc extinguishing design can be achieved, circuit is simple, and cost is low.
Description
Technical field
It the utility model is related to arc-suppression circuit, more particularly to a kind of DC arc-suppression circuits.
Background technology
At present, or equipment does not do arc extinguishing design when inserting D/C power, there is electric discharge phenomena hair when plugging in plug
Raw, or switch control is more complicated, its cost of implementation is high, is also exactly that conducting resistance is higher.
The content of the invention
In order to solve the problems of the prior art, the utility model provides a kind of DC arc-suppression circuits.
The utility model provides a kind of DC arc-suppression circuits, including NMOS tube Q1, electric capacity C1, resistance R2, resistance R1, voltage stabilizing
Diode D2, wherein, the grounded drain of the NMOS tube Q1, the one end of source electrode respectively with the electric capacity C1, resistance R2 is connected, grid
The other end of the pole respectively with the electric capacity C1, resistance R2 is connected, and one end of the other end of the resistance R2 and the resistance R1 connects
Connect, the other end of the resistance R1 is connected with the input of the voltage-regulator diode D2, the output end of the voltage-regulator diode D2
It is connected to voltage input end.
As further improvement of the utility model, the DC arc-suppression circuits also include diode D3, the diode D3
Input be connected with the source electrode of the NMOS tube Q1, the output end of the diode D3 and the NMOS tube Q1 grid connect
Connect.
As further improvement of the utility model, the DC arc-suppression circuits also include diode D1, the diode D1
Input be connected with the source electrode of the NMOS tube Q1, the output end of the diode D1 is connected to voltage input end.
As further improvement of the utility model, the DC arc-suppression circuits also include electric capacity C2, and the one of the electric capacity C2
End is connected to voltage input end, and the other end is connected with the drain electrode of the NMOS tube Q1.
As further improvement of the utility model, what the DC arc-suppression circuits also included being connected with the negative pole of DC plug bears
Extreme son, the negative terminal are connected with the source electrode of the NMOS tube Q1.
As further improvement of the utility model, the DC arc-suppression circuits also include being connected just with the positive pole of DC plug
Extreme son, the positive terminal are connected to voltage input end.
The beneficial effects of the utility model are：By such scheme, when inserting DC plug, arc extinguishing design, circuit can be achieved
Simply, cost is low.
Brief description of the drawings
Fig. 1 is a kind of schematic diagram of DC arc-suppression circuits of the utility model.
Embodiment
The utility model is described in further detail for explanation and embodiment below in conjunction with the accompanying drawings.
As shown in figure 1, a kind of DC arc-suppression circuits, including NMOS tube Q1, electric capacity C1, resistance R2, resistance R1, voltage-regulator diode
D2, wherein, the grounded drain of the NMOS tube Q1, the one end of source electrode respectively with the electric capacity C1, resistance R2 is connected, grid difference
It is connected with the electric capacity C1, resistance the R2 other end, the other end of the resistance R2 is connected with one end of the resistance R1, described
The resistance R1 other end is connected with the input of the voltage-regulator diode D2, and the output end of the voltage-regulator diode D2 is connected to electricity
Press input.
As shown in figure 1, input of the DC arc-suppression circuits also including diode D3, the diode D3 and the NMOS
Pipe Q1 source electrode connection, the output end of the diode D3 are connected with the grid of the NMOS tube Q1.
As shown in figure 1, input of the DC arc-suppression circuits also including diode D1, the diode D1 and the NMOS
Pipe Q1 source electrode connection, the output end of the diode D1 are connected to voltage input end.
As shown in figure 1, the DC arc-suppression circuits also include electric capacity C2, one end of the electric capacity C2 is connected to control source
End, the other end are connected with the drain electrode of the NMOS tube Q1.
As shown in figure 1, the DC arc-suppression circuits also include the negative terminal 100 being connected with the negative pole of DC plug, it is described negative
Extreme son 100 is connected with the source electrode of the NMOS tube Q1.
As shown in figure 1, the DC arc-suppression circuits also include the positive terminal being connected with the positive pole of DC plug, the positive terminal
Son is connected to voltage input end.
A kind of operation principle of DC arc-suppression circuits provided by the utility model is：
1. diode D1 mainly plays clamping action, the excessive pressure damages NMOS tube Q1 in DC socket insertion moment is prevented.
2. diode D1, resistance R1, resistance R2, electric capacity C1, NMOS tube Q1 play delay switch, input voltage passes through
Resistance R1 charges to electric capacity C1, and the voltage at electric capacity C1 both ends slowly rises, NMOS tube Q1 G poles（Grid）Voltage is also and then slow
Rising, from by subthreshold conduction to fully on, the voltage on input filter capacitor also and then slowly rises NMOS tube Q1,
Also slowly rise so as to the voltage of powering load, supply current also slowly increases, it is therefore prevented that DC plug powered on moment, electric current mistake
Arc discharge caused by big.Input voltage value can be changed by changing voltage-regulator diode D2 voltage stabilizing value.
3. diode D3 mainly plays clamping action, prevent that NMOS tube Q1 G pole tensions are too high and damage.
A kind of DC arc-suppression circuits provided by the utility model have advantages below：
1. switching MOS to realize from NMOS, control circuit circuit is simple.
2. the metal-oxide-semiconductor of identical voltage and electric current, NMOS are low compared with PMOS costs.
3. conducting resistance is lower.
Above content is to combine specific preferred embodiment further detailed description of the utility model, it is impossible to
Assert that specific implementation of the present utility model is confined to these explanations.For the ordinary skill of the utility model art
For personnel, without departing from the concept of the premise utility, some simple deduction or replace can also be made, should all be regarded
To belong to the scope of protection of the utility model.
Claims (6)
- A kind of 1. DC arc-suppression circuits, it is characterised in that：Including NMOS tube Q1, electric capacity C1, resistance R2, resistance R1, voltage-regulator diode D2, wherein, the grounded drain of the NMOS tube Q1, the one end of source electrode respectively with the electric capacity C1, resistance R2 is connected, grid difference It is connected with the electric capacity C1, resistance the R2 other end, the other end of the resistance R2 is connected with one end of the resistance R1, described The resistance R1 other end is connected with the input of the voltage-regulator diode D2, and the output end of the voltage-regulator diode D2 is connected to electricity Press input.
- 2. DC arc-suppression circuits according to claim 1, it is characterised in that：The DC arc-suppression circuits also include diode D3, The input of the diode D3 is connected with the source electrode of the NMOS tube Q1, output end and the NMOS tube of the diode D3 Q1 grid connection.
- 3. DC arc-suppression circuits according to claim 1, it is characterised in that：The DC arc-suppression circuits also include diode D1, The input of the diode D1 is connected with the source electrode of the NMOS tube Q1, and it is defeated that the output end of the diode D1 is connected to voltage Enter end.
- 4. DC arc-suppression circuits according to claim 1, it is characterised in that：The DC arc-suppression circuits also include electric capacity C2, institute The one end for stating electric capacity C2 is connected to voltage input end, and the other end is connected with the drain electrode of the NMOS tube Q1.
- 5. DC arc-suppression circuits according to claim 1, it is characterised in that：The DC arc-suppression circuits also include and DC plug The negative terminal of negative pole connection, the negative terminal are connected with the source electrode of the NMOS tube Q1.
- 6. DC arc-suppression circuits according to claim 1, it is characterised in that：The DC arc-suppression circuits also include and DC plug The positive terminal of positive pole connection, the positive terminal are connected to voltage input end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720922194.XU CN207069876U (en) | 2017-07-27 | 2017-07-27 | DC arc-suppression circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720922194.XU CN207069876U (en) | 2017-07-27 | 2017-07-27 | DC arc-suppression circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207069876U true CN207069876U (en) | 2018-03-02 |
Family
ID=61517771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720922194.XU Active CN207069876U (en) | 2017-07-27 | 2017-07-27 | DC arc-suppression circuits |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207069876U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107231083A (en) * | 2017-07-27 | 2017-10-03 | 深圳市和为顺网络技术有限公司 | DC arc-suppression circuits |
-
2017
- 2017-07-27 CN CN201720922194.XU patent/CN207069876U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107231083A (en) * | 2017-07-27 | 2017-10-03 | 深圳市和为顺网络技术有限公司 | DC arc-suppression circuits |
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