CN207039557U - Lowering freqyency device based on watchdog chip - Google Patents

Lowering freqyency device based on watchdog chip Download PDF

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Publication number
CN207039557U
CN207039557U CN201720776226.XU CN201720776226U CN207039557U CN 207039557 U CN207039557 U CN 207039557U CN 201720776226 U CN201720776226 U CN 201720776226U CN 207039557 U CN207039557 U CN 207039557U
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China
Prior art keywords
frequency signal
low frequency
signal
watchdog
module
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CN201720776226.XU
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Inventor
赵东明
江国进
孙永滨
白涛
张春雷
石桂连
陈乃奎
陈银杰
宋磊
李伟
崔亚军
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China General Nuclear Power Corp
China Techenergy Co Ltd
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China General Nuclear Power Corp
China Techenergy Co Ltd
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Abstract

The utility model belongs to the technical field of electronic communication, and solution is that technical problem is to provide that a kind of circuit design is relatively easy, it is existing to small to take circuit board space, and the lowering freqyency device based on watchdog chip of composition is combined using watchdog chip and counter to be included:First high-frequency signal generation module, for producing the frequency signal of the first high frequency;Watchdog module, the first high-frequency signal is configured to receive, and first high-frequency signal is converted into the first low frequency signal less than the first high-frequency signal frequency;Counter module, it is arranged to be connected with the output end of the watchdog circuit module, first low frequency signal can be received, and first low frequency signal is converted into the second low frequency signal less than the first low frequency signal frequency;Rear class low frequency signal modular converter, receive the second low frequency signal after the counter module conversion.

Description

Lowering freqyency device based on watchdog chip
Technical field
It the utility model is related to the technical field of electronic communication, more particularly to a kind of frequency reducing dress based on watchdog chip Put.
Background technology
Frequency down circuit is applied among multiple technologies field, can not be used directly in many occasion high-frequency signals, it is necessary to High-frequency signal is converted to by low frequency signal using frequency down circuit.At present, the circuit of low-and high-frequency conversion is completed mainly using counting What device was built, counter mainly counts in digital display circuit to the number of pulse, to realize measurement, counting and control The function of system, while have division function concurrently, the logic electricity that counter is made up of basic counting unit and some control doors Road, counting unit are then made up of a series of all kinds of triggers with storage information function, and these triggers have rest-set flip-flop, T Trigger, d type flip flop and JK flip-flop etc..
But utility model people has found during the utility model is realized, in the link of high-speed communication, if Frequency is reduced only with the technical scheme of counter, following technical problem be present:
For the higher signal of frequency, such as in a communication link, traffic rate 1Mbps, 10Mbps are even more at a high speed The signal of rate, if carrying out frequency reducing using counter, then circuit will be very numerous and diverse, and can take larger space.
Utility model content
In order to solve only to realize that circuit present in the frequency down circuit of frequency reducing is complicated by counter in the prior art, account for With the big technical problem in space;The utility model provide it is a kind of using watchdog chip and counter combine composition based on guarding the gate The lowering freqyency device of dog chip.
To achieve these goals, technical scheme provided by the utility model includes:
A kind of lowering freqyency device based on watchdog chip, including:
First high-frequency signal generation module, for producing the frequency signal of the first high frequency;
Watchdog module, is configured to receive the first high-frequency signal, and first high-frequency signal is converted into less than the First low frequency signal of one high-frequency signal frequency;
Counter module, it is arranged to be connected with the output end of the watchdog circuit module, it is low that described first can be received Frequency signal, and first low frequency signal is converted into the second low frequency signal less than the first low frequency signal frequency;
Rear class low frequency signal is changed, and receives the second low frequency signal after the counter module conversion.
Further, the watchdog circuit module feeds in the dog time input if without feeding-dog signal in setting, that House dog will export a pulse;And the dog time is fed based on the watchdog circuit module, first high frequency is believed Number it is converted directly into first low frequency signal of preset frequency.
Further, the count pulse number based on the counter circuit module, first low frequency signal is changed Into second low frequency signal of preset frequency.
Further, first high-frequency signal be MHz levels signal, first low frequency signal be KHz levels signal, institute State the signal that the second low frequency signal is Hz levels.
Further, the late-class circuit includes indicator lamp and drive circuit of indicator.
Using above-mentioned technical proposal provided by the utility model, one kind in following beneficial effect can be at least obtained:
1st, watchdog circuit and counter circuit are combined, high-frequency signal first directly can be converted into lower frequency Signal, then more low-frequency signal is further reduced to by counter according to demand, reduced due to counter frequency reducing needs The components such as excessive trigger, the complexity of caused hardware circuit design.
If the 2nd, go frequency reducing using the frequency down circuit built by counter, then need multiple counters to be dropped step by step Frequently, more PCB space can be taken;Technical scheme provided by the utility model is directly turned high-frequency signal using watchdog chip The signal of lower frequency is changed to, saves PCB space.
The further feature and advantage of utility model will illustrate in the following description, also, partly become from specification Obtain it is clear that or being understood by implementing the technical solution of the utility model.The purpose of this utility model and other advantages It can realize and obtain by structure and/or flow specifically noted in specification, claims and accompanying drawing.
Brief description of the drawings
Fig. 1 is a kind of structured flowchart for frequency down circuit based on watchdog chip that the utility model embodiment provides.
Fig. 2 is a kind of structured flowchart for lowering freqyency device based on watchdog chip that the utility model embodiment provides.
Fig. 3 is a kind of flow chart for frequency reducing method based on watchdog chip that the utility model embodiment provides.
A kind of circuit diagram for frequency down circuit based on watchdog chip that another embodiment of Fig. 4 the utility model provides.
Embodiment
Embodiment of the present utility model is described in detail below with reference to drawings and Examples, whereby to the utility model How application technology means solve technical problem, and the implementation process for reaching technique effect can fully understand and implement according to this. It should be noted that these specific descriptions simply allow those of ordinary skill in the art to be more prone to, clearly understand this practicality newly Type, rather than to limited explanation of the present utility model;As long as and do not form conflict, each embodiment in the utility model with And each feature in each embodiment can be combined with each other, the technical scheme formed the scope of protection of the utility model it It is interior.
In addition, can be in the control system of a such as group controller executable instruction the flow of accompanying drawing illustrates the step of Middle execution, although also, show logical order in flow charts, in some cases, can be with different from herein Order performs shown or described step.
Below by the drawings and specific embodiments, the technical solution of the utility model is described in detail:
As shown in figure 1, the present embodiment provides a kind of lowering freqyency device based on watchdog chip, the device includes:
First high-frequency signal generation module, for producing the frequency signal of the first high frequency;
Watchdog module, is configured to receive the first high-frequency signal, and first high-frequency signal is converted into less than the First low frequency signal of one high-frequency signal frequency;
Counter module, it is arranged to be connected with the output end of the watchdog circuit module, it is low that described first can be received Frequency signal, and first low frequency signal is converted into the second low frequency signal less than the first low frequency signal frequency;
Rear class low frequency signal modular converter, receive the second low frequency signal after the counter module conversion.
First high-frequency signal generation module 400, for producing the frequency signal of the first high frequency;
Frequency down circuit 300 based on watchdog chip, the frequency down circuit 300 receive the first high-frequency signal generation device and produced The first high frequency frequency signal;And by the first high-frequency signal by for the low frequency signal of preset frequency;And predetermined frequency Size, can adjust according to the actual requirements watchdog chip the feeding-dog signal cycle and circuit in counter circuit in patrol The relation of collecting, finally determine;
Rear class low frequency signal modular converter 400, receive the low frequency signal of the preset frequency after frequency down circuit conversion.
Preferably, rear class low frequency signal modular converter includes indicator lamp and drive circuit of indicator, this implementation to the present embodiment The lowering freqyency device that example provides goes for, such as the high-frequency therapeutic treatment signal in the DCS of nuclear power station or FPGA controller, and will These high-frequency therapeutic treatment signals, are converted to low frequency signal, some specific indicator lamp in direct control system, specifically, Ke Yigen According to predetermined low frequency signal, to control the flicker cycle of indicator lamp.
As shown in Fig. 2 watchdog module 100, is configured to receive the first high-frequency signal, and the first high-frequency signal is changed Into the first low frequency signal less than the first high-frequency signal frequency;Wherein watchdog circuit, English are watch dog timer, are One timer circuit, there is an input, cry and feed dog (English full name kicking the dog or service the Dog) or abbreviation WDI (English full name Watch Dog Input), and an output end, abbreviation WDO (English full name Watch Dog Output);
Counter module 200, it is arranged to be connected with the output end of watchdog module, the first low frequency signal can be received, and And the first low frequency signal is converted into the second low frequency signal less than the first low frequency signal frequency;Wherein, counter circuit is in number Mainly the number of pulse is counted in type families system, to realize the function of measurement, counting and control, while has frequency dividing work(concurrently Can, the logic circuit that counter is made up of basic counting unit and some control doors, counting unit is then by a series of tools All kinds of triggers for having storage information function are formed, and these triggers have rest-set flip-flop, T triggers, d type flip flop and JK flip-flop Deng.
Therefore, in above-mentioned lowering freqyency device, watchdog module and counter module are combined, can be directly first by high frequency Signal is converted to the signal of lower frequency, then is further reduced to more low-frequency signal according to demand by counter, reduces Completely by counter frequency down circuit, it is necessary to the component such as excessive trigger, the complexity of caused hardware circuit design.
Preferably, watchdog module feeds in the dog time input if without feeding-dog signal to the present embodiment setting, that House dog will export a pulse;And the dog time is fed based on watchdog circuit module, the first high-frequency signal is directly turned It is changed to the first low frequency signal of preset frequency.
The present embodiment is preferably based on the count pulse number of counter module, the first low frequency signal is converted into pre- Determine the second low frequency signal of frequency;In actual design, by the way that the count pulse needed for counter is calculated (according to the first low frequency Multiple proportion between signal and the second low frequency signal), when reaching the value of counter setting, then counter circuit module exports The signal (the second low frequency signal) of expected frequence.
Preferably, the first high-frequency signal is the signal of MHz levels to the present embodiment, and the first low frequency signal is the signal of KHz levels, the Two low frequency signals are the signal of Hz levels;Normally, the frequency of the first high-frequency signal is usually 1-999MHz, and the first low frequency signal Frequency be usually 1-999KHz, the frequency of the second low frequency signal is usually 1-999Hz.
As shown in figure 3, the present embodiment also provides a kind of frequency reducing method based on watchdog chip, this method includes:
S110, the first high-frequency signal is received, and high-frequency signal is converted into less than first by watchdog circuit module First low frequency signal of high-frequency signal frequency;The first high-frequency signal, the first low frequency are determined according to the actual demand of circuit specification The size of signal, multiple proportion therebetween is then obtained, in the clock cycle according to the multiple proportion and watchdog chip, It is determined that in each clock cycle, the time of watchdog chip is how many, can just obtain the first predetermined low frequency signal;
S120, by counter circuit module, the first low frequency signal is converted into the less than the first low frequency signal frequency Two low frequency signals;Preferably, by the way that the count pulse needed for counter is calculated (according to the first low frequency signal and the second low frequency Multiple proportion between signal), when reaching the value of counter setting, then counter circuit module exports the signal of expected frequence (the second low frequency signal);Further, the second low frequency signal is exported to late-class circuit, allows late-class circuit to perform specific output Control.
The present embodiment preferably, in S110, setting feed in the dog time if not feeding dog letter by watchdog circuit module Number input, then house dog will export a pulse;And the dog time is fed based on watchdog circuit module, by the first high frequency Signal is converted directly into the first low frequency signal of preset frequency.
The present embodiment provide the above method in, it is preferable that the first high-frequency signal be MHz levels signal, the first low frequency signal For the signal of KHz levels, the second low frequency signal is the signal of Hz levels;Normally, the frequency of the first high-frequency signal is usually 1- 999MHz, and the frequency of the first low frequency signal is usually 1-999KHz, the frequency of the second low frequency signal is usually 1-999Hz.
Therefore, in above-mentioned frequency reducing method, watchdog circuit and counter circuit are combined, can be directly first by high frequency Signal is converted to the signal of lower frequency, then is further reduced to more low-frequency signal according to demand by counter, reduces Completely by counter frequency down circuit, it is necessary to the component such as excessive trigger, the complexity of caused hardware circuit design.
As shown in figure 4, the circuit of the frequency down circuit based on watchdog chip in another embodiment is provided for the utility model Figure, the circuit correspond to a kind of specific implementation of frequency down circuit as Fig. 2, including:
Watchdog circuit module, the circuit as corresponding to upper broken line frame in Fig. 4;Wherein, watchdog chip 102, Ke Yishi But the chip as monitor of LTC2901 series is not limited to, the watchdog chip 102 is provided with feeding-dog signal input (WDI) 101 and feed dog output signal end (WDO) 103;If the communication cycle of link is t1, watchdog circuit feeds the dog time It is t2;If fed in dog time t2, there is communication in link always, then the output end WDO of house dog exports high level always; If do not communicated within the t2 times without feeding-dog signal, i.e. communication link feeding in dog time t2, then house dog it is defeated Go out to hold WDO to export low level, until there is feeding-dog signal at WDI ends.
Counter circuit module, the circuit as corresponding to lower broken line frame in Fig. 4;Counter circuit includes:Divide chip 104, the frequency dividing chip 104 can be but not limited to model 74HC393 counter chip;It is connected with frequency dividing chip 104 The chip 105 that logical trigger is formed, chip 105 can be but not limited to the logical trigger chip of CD74HC08 series;
In the present embodiment, counter circuit module is also connected with LED drive circuit 107, is touched by LED drive circuit 107 Send out LED106 flicker frequency.
Preferably, if the high-frequency signal in link is differential signal, then need to use chip (such as 485 chips) will Differential signal is converted to single-ended signal, is then connected directly to the WDI inputs of watchdog chip;If the high frequency letter in link Number it is single-ended signal, then the high-frequency signal directly can be connected to the WDI inputs of watchdog chip.
Component is identical with prior art in itself in the hardware circuit provided due to the present embodiment, so introducing below The mode that watchdog circuit module and counter circuit module are used cooperatively in the present embodiment, it is how real by the cooperation of the two The process of existing frequency reducing.
Assuming that lowering freqyency device/circuit that the present embodiment is applied to, suitable for 10M communication links, LED can indicate to lead to The state of link is believed, if there are data to be communicated in link, then the lamp will flash;Because the traffic rate of the link is 10Mbps, if the frequency reducing short circuit processing not provided using the utility model embodiment, because signal frequency is non-in communication link Chang Gao, directly drive LED circuit with the clock signal in link, then LED is by the state in Chang Liang, so must be to this Signal carries out down conversion process.
There is no feeding-dog signal due to feeding in the dog time, then export low level signal in WDO pins, if feeding-dog signal, Then high level is exported in WDO pins;So in certain communication cycle, dog time, the WDO pins of house dog are fed by configuring The pulse of fixed number can be produced, is then gone to configure the number for the count pulse that counter needs according to the application of reality, tied The frequency reducing characteristic of total number device circuit, the flicker frequency of LED can be controlled.For example, it is assumed that the communication cycle of the link is 20ms, two sections of free times are had in a communication cycle, be now no data interaction in the link, during every section of free time Between about 2ms.According to the communication feature of the link, the dog time of feeding that can configure house dog is 200us, if in 200us There is no feeding-dog signal, then export low level signal in WDO pins, if feeding-dog signal, then export high level in WDO pins. Therefore, in 20ms communication cycle, the WDO pins of house dog can produce two pulses, then apply deallocation according to reality The number of the count pulse of counter needs is put, the flicker frequency of LED is controlled with this.Specifically, high-frequency signal is by seeing The first low frequency signal is exported after door dog chip frequency reducing, then the first low frequency signal is connected to the A of chip 104 (digit counter of two-way 4) Road step-by-step counting end, the number of count pulse is configured according to the flicker frequency needed for LED.If in 20ms communication cycle Interior, the WDO pins of house dog produce two pulses, and LED flicker cycle is 200ms, i.e. the bright 100ms of LED and then extinguishing 100ms, then chip 104 need to count 10 pulses, and now the A roads output of chip 104 is 1010, and A roads are exported and are sent into chip 105, the output of chip 105 is connected to 104 A roads clear terminal and B roads counting end, only when the A roads output of chip 104 is 1010 When chip 105 just export 1, the A roads for now resetting 104 count number, make its A road restart to count from zero, while chip 104 B roads output be 0001, now triode Q1 turn on, lightening LED lamp, 104 B roads when 104 A roads export 1010 again Export as 0000, now triode Q1 ends, and LED can just be extinguished, and LED is lighted 100ms and then extinguished in whole process 100ms, so as to reach required effect.
The above-mentioned technical proposal provided using the utility model embodiment, can at least obtain one in following beneficial effect Kind:
1st, watchdog circuit and counter circuit are combined, high-frequency signal first directly can be converted into lower frequency Signal, then more low-frequency signal is further reduced to by counter according to demand, reduced due to counter frequency reducing needs The components such as excessive trigger, the complexity of caused hardware circuit design.
If the 2nd, go frequency reducing using the frequency down circuit built by counter, then need multiple counters to be dropped step by step Frequently, more PCB (English full name Printed Circuit Board, printed circuit board (PCB)) space can be taken;The utility model carries For technical scheme high-frequency signal is directly converted to using watchdog chip the signal of lower frequency, save space.
One of ordinary skill in the art will appreciate that:Realizing all or part of step of above-mentioned each method embodiment can lead to The related hardware of programmed instruction is crossed to complete.Foregoing program can be stored in a computer read/write memory medium.The journey Sequence upon execution, execution the step of including above-mentioned each method embodiment;And foregoing storage medium includes:ROM, RAM, magnetic disc or Person's CD etc. is various can be with the medium of store program codes.
Finally it should be noted that described above is only most preferred embodiment of the present utility model, not to this practicality It is new to do any formal limitation.Any those skilled in the art, technical solutions of the utility model model is not being departed from In enclosing, all using the way and technology contents of the disclosure above technical solutions of the utility model are made many possible variations and Simple replacement etc., these belong to the scope of technical solutions of the utility model protection.

Claims (5)

  1. A kind of 1. lowering freqyency device based on watchdog chip, it is characterised in that including:
    First high-frequency signal generation module, for producing the frequency signal of the first high frequency;
    Watchdog module, is configured to receive the first high-frequency signal, and first high-frequency signal is converted into high less than first First low frequency signal of frequency signal frequency;
    Counter module, it is arranged to be connected with the output end of the watchdog circuit module, the first low frequency letter can be received Number, and first low frequency signal is converted into the second low frequency signal less than the first low frequency signal frequency;
    Rear class low frequency signal modular converter, receive the second low frequency signal after the counter module conversion.
  2. 2. the lowering freqyency device according to claim 1 based on watchdog chip, it is characterised in that the watchdog circuit mould Block feeds in the dog time input if without feeding-dog signal setting, then house dog will export a pulse;And it is based on The watchdog circuit module feeds the dog time, and first high-frequency signal is converted directly into the described first low of preset frequency Frequency signal.
  3. 3. the lowering freqyency device according to claim 1 based on watchdog chip, it is characterised in that based on counter electricity The count pulse number of road module, first low frequency signal is converted into second low frequency signal of preset frequency.
  4. 4. the lowering freqyency device based on watchdog chip according to any one in claim 1-3, it is characterised in that described First high-frequency signal is the signal of MHz levels, and first low frequency signal is the signal of KHz levels, and second low frequency signal is Hz The signal of level.
  5. 5. the lowering freqyency device according to claim 1 based on watchdog chip, it is characterised in that the rear class low frequency signal Modular converter includes indicator lamp and drive circuit of indicator.
CN201720776226.XU 2017-06-29 2017-06-29 Lowering freqyency device based on watchdog chip Active CN207039557U (en)

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Application Number Priority Date Filing Date Title
CN201720776226.XU CN207039557U (en) 2017-06-29 2017-06-29 Lowering freqyency device based on watchdog chip

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Application Number Priority Date Filing Date Title
CN201720776226.XU CN207039557U (en) 2017-06-29 2017-06-29 Lowering freqyency device based on watchdog chip

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CN207039557U true CN207039557U (en) 2018-02-23

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113422600A (en) * 2021-08-23 2021-09-21 南京志杰通信技术有限公司 Analysis method suitable for digital isolator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113422600A (en) * 2021-08-23 2021-09-21 南京志杰通信技术有限公司 Analysis method suitable for digital isolator
CN113422600B (en) * 2021-08-23 2021-11-16 南京志杰通信技术有限公司 Analysis method suitable for digital isolator

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