CN206977564U - Interface expands plate - Google Patents

Interface expands plate Download PDF

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Publication number
CN206977564U
CN206977564U CN201721000726.0U CN201721000726U CN206977564U CN 206977564 U CN206977564 U CN 206977564U CN 201721000726 U CN201721000726 U CN 201721000726U CN 206977564 U CN206977564 U CN 206977564U
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CN
China
Prior art keywords
pin
interface
interfaces
pins
group
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201721000726.0U
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Chinese (zh)
Inventor
杨凡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Cloud River Technology Co Ltd
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Hangzhou Cloud River Technology Co Ltd
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Application filed by Hangzhou Cloud River Technology Co Ltd filed Critical Hangzhou Cloud River Technology Co Ltd
Priority to CN201721000726.0U priority Critical patent/CN206977564U/en
Application granted granted Critical
Publication of CN206977564U publication Critical patent/CN206977564U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

It the utility model is related to interface and expand plate, including:Circuit board, circuit board are provided with UART interface, SPI interface, SERVO interfaces, POW interfaces, PL group interfaces and PR group interfaces, and the UART interface and/or SERVO interfaces and/or SPI interface and/or POW interfaces are by setting pin independence lead line;Each interface is independently drawn, and is facilitated user while is used more group interfaces.

Description

Interface expands plate
Technical field
It the utility model is related to camera auxiliary products, and in particular to a kind of interface expands plate.
Background technology
The interface of camera sensing device expands that plate is varied, available for the function of extension video camera, specifically such as The interface of OpenMV camera sensing devices expands plate, generally includes 2 rows(Spacing 2.54mm 8 pins)Interface, and other interface ratios Such as SPI interface(Data-interface with clock signal), SERVO interfaces(It can be connect with the driving of controlled motor rotating speed or steering wheel angle Mouthful), UART interface(Universal asynchronous data-interface), POW interfaces, not connected, user is expanded in plate using existing interface to be appointed During 1 group of function of anticipating, all circuit sockets need to be got up and only use the several threads of wherein corresponding function, utilization rate is very low, Or by way of Du Pont's line is drawn, but so because being any connection not positioned, it is easy to cause connecing for circuit Wrong plug misses, and VCC(Positive source)Interface only has a line, it is also necessary to separated time in addition.Inconvenient user uses more group interfaces simultaneously.
Utility model content
It the utility model is related to interface and expand plate, facilitate user while use more group interfaces.
The utility model is achieved through the following technical solutions:
The utility model provides a kind of interface and expands plate, including:Circuit board, circuit board is provided with UART interface, SPI connects Mouth, SERVO interfaces, POW interfaces, PL group interfaces and PR group interfaces, the UART interface and/or SERVO interfaces and/or SPI connect Mouth and/or POW interfaces are by setting pin independence lead line.
Pass through above-mentioned technical proposal, SPI interface, SERVO interfaces, UART interface, POW interfaces can individually be drawn, side Just user uses more group interfaces simultaneously, multiple functional, easy to use.Wherein PL group interfaces, which are located on the left of circuit board, has one group to connect Mouthful, PR group interfaces are the group interfaces on the right side of circuit board.
As further improvement of the utility model, the PL group interfaces are located at the left side of circuit board, the PR group interfaces Positioned at the right side of circuit board, the centre position that the SPI interface is located at circuit board is to the left, and the SERVO interfaces are located at circuit board Centre position it is to the right, the UART interface be located at circuit board it is center-left under, the POW interfaces are located at the centre of circuit board Under to the right.Pass through above-mentioned technical proposal, the layout of each interface are advantageous to the arrangement of circuit, optimize each circuit.
As further improvement of the utility model, the UART interface is located at SPI interface and the interface of SERVO interfaces two Center-left lower section, the POW interfaces are located at the center-right lower section of SPI interface and the interface of SERVO interfaces two.Pass through above-mentioned skill Art scheme, it is reasonable that each interface is set, and circuit can be made further to optimize.
As further improvement of the utility model, the UART interface and the POW interfaces are horizontally set at circuit board On, the SPI interface, SERVO interfaces, PL group interfaces and PR group interfaces are longitudinally disposed on circuit board.Pass through above-mentioned technical side Case, each interface arrangement can make compact overall structure reasonable, optimize size and performance.
As further improvement of the utility model, the UART interface include RXD/SDA pins, TXD/SCL pins, GND pin and VCC pin;
The SPI interface includes MOSI pins, MISO pins, SLCK pins, NSS pins, GND pin and VCC pin;
The SERVO interfaces include the first group interface, the second group interface and the 3rd group interface, and first group interface includes SERVO1 pins, VCC pin and GND pin, the second group interface include SERVO2 pins, VCC pin and GND pin, the 3rd group Interface includes SERVO3 pins, VCC pin and GND pin;
The POW interfaces include GND pin and VCC pin;
The PL group interfaces include the 8 pin pins of PL-L rows and the 8 pin pins of PL-R rows, each row include MOSI pins, MISO pins, SLCK pins, NSS pins, TXD/SCL pins, RXD/SDA pins and two idle pin;The PR group interfaces bag The 8 pin pins of PR-L rows and the 8 pin pins of PR-R rows are included, each row includes SERVO3 pins, SERVO2 pins, SERVO1 and drawn Pin, VCC pin, GND pin and three idle pin;
The mark each pin of identical is connected, and each pin of the PL-R rows and PR-L rows are used to introduce circuit, described SPI interface, SERVO interfaces, UART interface, the pin of POW interfaces and PL-L rows, the pin of PR-R rows are used to lead line.
Pass through above-mentioned technical proposal, SPI interface are individually drawn and increase VCC and GND in line sequence, be conveniently used for connecting it His SPI equipment such as liquid crystal display, Wifi equipment;UART interface is individually drawn and increases VCC and GND in line sequence, is conveniently used for connecting The other equipments such as single-chip microcomputer;SERVO interfaces, which are individually grouped in extraction and line sequence, increases VCC and GND, is conveniently used for patch cord connection The equipment such as motor, steering wheel;Function is complete, easy to use.The pin of wherein PL-L rows is the row for being located at the left side in PL group interfaces Pin, the pin of PL-R rows is the row's pin for being located at the right in PL group interfaces, and the pin of PR-L rows is located in PR group interfaces One row's pin on the left side, the pin of PR-R rows is the row's pin for being located at the right in PR group interfaces.
As further improvement of the utility model, the circuit board is doubling plate, the connecting line of each GND pin Road is arranged at the first layer of doubling plate, in the VCC pin and the 3rd group interface in the second group interface of the SERVO interfaces The connection line of VCC pin is also disposed on the first layer of doubling plate, and the connection line of remaining each pin is arranged at the of doubling plate Two layers.Pass through above-mentioned technical proposal, two-tier circuit design facilitate route arrangement, are unlikely to crossing elimination.
As further improvement of the utility model, the VCC pin is 5V pins.
As further improvement of the utility model, the pin pin spacing of two row 8 of the PL group interfaces is 2.54mm, described The pin pin spacing of two row 8 of PR group interfaces is 2.54mm.
As further improvement of the utility model, the length of circuit board is 38mm-45mm, width 20-30mm.
As further improvement of the utility model, the length of the circuit board is 40.39mm, width 24.13mm.
Plate is expanded according to the utility model interface, each interface independence lead line, facilitates user directly to use, and set up Power circuit reduces the trouble of separated time, and layout designs are reasonable, multiple functional.
It is cited below particularly preferably real for above and other objects, features and advantages of the present utility model can be become apparent Example is applied, and coordinates institute's accompanying drawings, is described in detail below.
Brief description of the drawings
Fig. 1 is the schematic diagram that the interface that the utility model one embodiment provides expands plate.
Fig. 2 is the circuit design drawing that the interface that the utility model one embodiment provides expands plate.
Fig. 3 is the structural representation that the interface that the utility model one embodiment provides expands plate.
Embodiment
Further to illustrate that the utility model is to realize technological means and effect that predetermined purpose of utility model taken, Accompanying drawing and preferred embodiment are fastened below, to according to specific embodiment of the present utility model, structure, feature and its effect, in detail Describe in detail bright as after.It should be noted that referring to the drawings 2 it is left and right, upper and lower, it is left and right described in this specification, upper and lower, horizontal, It is vertical etc. to be for being illustrated more clearly that the technical characteristics of the utility model.
Interface expands plate, refers to Fig. 1 to Fig. 3, including:Circuit board 1, circuit board 1 be provided with UART interface, SPI interface, SERVO interfaces, POW interfaces, PL group interfaces and PR group interfaces, the UART interface and/or SERVO interfaces and/or SPI interface And/or POW interfaces are by setting pin independence lead line.In detail, in one embodiment, UART interface, SPI interface, SERVO interfaces, POW interfaces are respectively provided with pin independence lead line.In other embodiments, can be only by above-mentioned one of interface Or any two interfaces or wantonly three interfaces are independently arranged pinout road.
Preferably, the PL group interfaces are located at the left side of circuit board 1, and the PR group interfaces are located at the right side of circuit board 1, institute State SPI interface be located at circuit board 1 centre position it is to the left, the centre position that the SERVO interfaces are located at circuit board 1 is to the right, institute State UART interface be located at circuit board 1 it is center-left under, the POW interfaces be located at circuit board it is center-right under.
Preferably, the UART interface is located at the center-left lower section of SPI interface and the interface of SERVO interfaces two, the POW Interface is located at the center-right lower section of SPI interface and the interface of SERVO interfaces two.
Preferably, the UART interface and the POW interfaces are horizontally set on circuit board, the SPI interface, SERVO Interface, PL group interfaces and PR group interfaces are longitudinally disposed on circuit board.
Preferably, the UART interface includes RXD/SDA pins, TXD/SCL pins, GND pin and VCC pin;
The SPI interface includes MOSI pins, MISO pins, SLCK pins, NSS pins, GND pin and VCC pin;
The SERVO interfaces include the first group interface, the second group interface and the 3rd group interface, and first group interface includes SERVO1 pins, VCC pin and GND pin, the second group interface include SERVO2 pins, VCC pin and GND pin, the 3rd group Interface includes SERVO3 pins, VCC pin and GND pin;
The POW interfaces include GND pin and VCC pin;
The PL group interfaces include the 8 pin pins of PL-L rows and the 8 pin pins of PL-R rows, each row include MOSI pins, MISO pins, SLCK pins, NSS pins, TXD/SCL pins, RXD/SDA pins and two idle pin;The PR group interfaces bag The 8 pin pins of PR-L rows and the 8 pin pins of PR-R rows are included, each row includes SERVO3 pins, SERVO2 pins, SERVO1 and drawn Pin, VCC pin, GND pin and three idle pin;
The mark each pin of identical is connected, and each pin of the PL-R rows and PR-L rows are used to introduce circuit, described SPI interface, SERVO interfaces, UART interface, the pin of POW interfaces and PL-L rows, the pin of PR-R rows are used to lead line.
Preferably, the circuit board is doubling plate, and the connection line of each GND pin is arranged at the first of doubling plate Layer, the connection line of the VCC pin in the second group interface of the SERVO interfaces and the VCC pin in the 3rd group interface is also set The first layer of doubling plate is placed in, the connection line of remaining each pin is arranged at the second layer of doubling plate.
Preferably, the VCC pin is 5V pins.
Preferably, the pin pin spacing of two row 8 of the PL group interfaces is 2.54mm, and the pin of two row 8 of the PR group interfaces draws Pin spacing is 2.54mm.
Preferably, the length of circuit board is 38mm-45mm, width 20-30mm.
Preferably, the length of the circuit board is 40.39mm, width 24.13mm.
Specifically, Fig. 1 to Fig. 3 is referred to, PL-L rows, PL-R rows, PR-L rows, the pin of PR-R rows include 8, SPI The pin of interface is 6, and the pin of SERVO interfaces is 9, and the pin of UART interface is 4, and the pin of POW interfaces is 2, The mark each pin of identical is connected, and each pin of PL-R row and PR-L rows are used to introducing circuit, the SPI interface, SERVO interfaces, UART interface, the pin of POW interfaces and PL-L rows, the pin of PR-R rows are used to lead line.Each interface list Solely draw, be user-friendly each group interface.
It is described above, only it is preferred embodiment of the present utility model, not the utility model is made any formal Limitation, although the utility model is disclosed as above with preferred embodiment, but be not limited to the utility model, Ren Heben Art personnel, do not departing from the range of technical solutions of the utility model, made when using the technology contents of the disclosure above A little change or the equivalent embodiment for being modified to equivalent variations, as long as being without departing from the content of the technical scheme of the utility model, foundation Any simple modification, equivalent change and modification that the technical essence of the utility model is made to above example, still fall within this In the range of utility model technical scheme.

Claims (10)

1. interface expands plate, it is characterised in that including:Circuit board(1), circuit board(1)Be provided with UART interface, SPI interface, SERVO interfaces, POW interfaces, PL group interfaces and PR group interfaces, the UART interface and/or SERVO interfaces and/or SPI interface And/or POW interfaces are by setting pin independence lead line.
2. interface as claimed in claim 1 expands plate, it is characterised in that the PL group interfaces are located at circuit board(1)Left side, The PR group interfaces are located at circuit board(1)Right side, the SPI interface is located at circuit board(1)Centre position it is to the left, it is described SERVO interfaces are located at circuit board(1)Centre position it is to the right, the UART interface is located at circuit board(1)It is center-left under, institute State POW interfaces be located at circuit board it is center-right under.
3. interface as claimed in claim 2 expands plate, it is characterised in that the UART interface is located at SPI interface and SERVO connects The center-left lower section of two interfaces of mouth, the POW interfaces are located at the center-right lower section of SPI interface and the interface of SERVO interfaces two.
4. interface as claimed in claim 1 expands plate, it is characterised in that the UART interface and the POW interfaces are laterally set It is placed on circuit board, the SPI interface, SERVO interfaces, PL group interfaces and PR group interfaces are longitudinally disposed on circuit board.
5. the interface as described in claim any one of 1-4 expands plate, it is characterised in that the UART interface includes RXD/SDA Pin, TXD/SCL pins, GND pin and VCC pin;
The SPI interface includes MOSI pins, MISO pins, SLCK pins, NSS pins, GND pin and VCC pin;
The SERVO interfaces include the first group interface, the second group interface and the 3rd group interface, and first group interface includes SERVO1 pins, VCC pin and GND pin, the second group interface include SERVO2 pins, VCC pin and GND pin, the 3rd group Interface includes SERVO3 pins, VCC pin and GND pin;
The POW interfaces include GND pin and VCC pin;
The PL group interfaces, which include the 8 pin pins of PL-L rows and the 8 pin pins of PL-R rows, each row, includes MOSI pins, MISO Pin, SLCK pins, NSS pins, TXD/SCL pins, RXD/SDA pins and two idle pin;The PR group interfaces include PR- The 8 pin pins of L rows and the 8 pin pins of PR-R rows, each row include SERVO3 pins, SERVO2 pins, SERVO1 pins, VCC Pin, GND pin and three idle pin;
The mark each pin of identical is connected, and each pin of the PL-R rows and PR-L rows are used to introduce circuit, and the SPI connects Mouth, SERVO interfaces, UART interface, the pin of POW interfaces and PL-L rows, the pin of PR-R rows are used to lead line.
6. interface as claimed in claim 5 expands plate, it is characterised in that the circuit board is doubling plate, and each GND draws The connection line of pin is arranged at the first layer of doubling plate, the VCC pin in the second group interface of the SERVO interfaces and the 3rd group The connection line of VCC pin in interface is also disposed on the first layer of doubling plate, and the connection line of remaining each pin is arranged at double The second layer of laminate.
7. interface as claimed in claim 5 expands plate, it is characterised in that the VCC pin is 5V pins.
8. interface as claimed in claim 5 expands plate, it is characterised in that the pin pin spacing of two row 8 of the PL group interfaces is 2.54mm, the pin pin spacing of two row 8 of the PR group interfaces is 2.54mm.
9. the interface as described in claim any one of 1-4 expands plate, it is characterised in that the length of circuit board is 38mm-45mm, Width is 20-30mm.
10. interface as claimed in claim 9 expands plate, it is characterised in that the length of the circuit board is 40.39mm, width For 24.13mm.
CN201721000726.0U 2017-08-11 2017-08-11 Interface expands plate Expired - Fee Related CN206977564U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201721000726.0U CN206977564U (en) 2017-08-11 2017-08-11 Interface expands plate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201721000726.0U CN206977564U (en) 2017-08-11 2017-08-11 Interface expands plate

Publications (1)

Publication Number Publication Date
CN206977564U true CN206977564U (en) 2018-02-06

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CN201721000726.0U Expired - Fee Related CN206977564U (en) 2017-08-11 2017-08-11 Interface expands plate

Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108286989A (en) * 2018-04-13 2018-07-17 杭州云江科技有限公司 A kind of method and integrated module for correcting unmanned plane two-dimensional level speed

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108286989A (en) * 2018-04-13 2018-07-17 杭州云江科技有限公司 A kind of method and integrated module for correcting unmanned plane two-dimensional level speed
CN108286989B (en) * 2018-04-13 2023-12-22 杭州云江科技有限公司 Method for correcting two-dimensional horizontal speed of unmanned aerial vehicle and integrated module

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20180206

Termination date: 20200811

CF01 Termination of patent right due to non-payment of annual fee