CN206804823U - One kind is based on TCL scripts to multichannel FPGA test board host computers - Google Patents
One kind is based on TCL scripts to multichannel FPGA test board host computers Download PDFInfo
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- CN206804823U CN206804823U CN201720325485.0U CN201720325485U CN206804823U CN 206804823 U CN206804823 U CN 206804823U CN 201720325485 U CN201720325485 U CN 201720325485U CN 206804823 U CN206804823 U CN 206804823U
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- host computer
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- 238000012360 testing method Methods 0.000 title claims abstract description 36
- 238000013515 script Methods 0.000 title claims abstract description 15
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 12
- 101000746134 Homo sapiens DNA endonuclease RBBP8 Proteins 0.000 claims abstract description 4
- 101000969031 Homo sapiens Nuclear protein 1 Proteins 0.000 claims abstract description 4
- 102100021133 Nuclear protein 1 Human genes 0.000 claims abstract description 4
- 230000003993 interaction Effects 0.000 claims description 6
- 239000007787 solid Substances 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims 1
- 230000002452 interceptive effect Effects 0.000 abstract description 4
- 238000013461 design Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000012795 verification Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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Abstract
The utility model discloses one kind based on TCL scripts to multichannel FPGA test board host computers,Including host computer shell,Support base is connected with below the host computer shell,The upper surface of the support base is provided with fixing groove,The front of the host computer shell is inlaid with liquid crystal touch screen,The inside of the host computer shell is provided with surface-mounted integrated circuit,Core processor is welded with the surface-mounted integrated circuit,The core processor is connected with battery,The input of the battery is connected with USB interface,The USB interface is fixed on the side of host computer shell,The COM1 of core processor is connected with network connecting module,Signal output port is connected with voice module,The signal input part of the core processor is connected with logic analyser,The input of the logic analyser is connected with multichannel jtag port and UART ports,The utility model compatibility various ways,With readable strong interactive interface,Polylith test board can be operated simultaneously,Greatly improve testing efficiency.
Description
Technical field
Field of hardware is the utility model is related to, is specially a kind of upper to multichannel FPGA test boards based on TCL scripts
Machine.
Background technology
FPGA (Field-Programmable Gate Array), i.e. field programmable gate array, it be PAL,
The product further developed on the basis of the programming devices such as GAL, CPLD.It is as in application specific integrated circuit (ASIC) field
A kind of semi-custom circuit and occur, both solved the deficiency of custom circuit, overcome original programming device gate circuit again
The shortcomings that number is limited.In the hardware circuit design in modern times, FPGA application is more and more extensive；But modern FPGA design is opened
Hair, typically carried out based on NIOSII, but NIOSII has cumbersome address control, and typically current engineering can only be entered
Row test, poor compatibility, and test speed is slow, efficiency is low, leverages design overall time.
Utility model content
In order to overcome the shortcomings of prior art, the utility model provides a kind of TCL scripts that are based on and multichannel FPGA is surveyed
Test plate (panel) host computer, compatible various ways, there is readable strong interactive interface, polylith test board can be operated simultaneously,
Greatly improve testing efficiency.
Technical scheme is used by the utility model solves its technical problem：One kind is based on TCL scripts to multichannel FPGA
Test board host computer, including host computer shell, support base is connected with below the host computer shell, the support base
Upper surface, which is dug, fixing groove, for fixing test plate (panel) to be measured；The front of the host computer shell is inlaid with liquid crystal touch screen, described
The side of liquid crystal touch screen is inlaid with control button, and the inside of the host computer shell is provided with surface-mounted integrated circuit, described integrated
Be welded with core processor on circuit board, the power pins of the core processor are connected with battery, the battery it is defeated
Enter end and be connected with USB interface, the USB interface is fixed on the side of host computer shell, the COM1 connection of core processor
There is network connecting module, signal output port is connected with voice module, and the signal input part of the core processor, which is connected with, patrols
Volume analyzer, the input of the logic analyser are connected with multichannel jtag port and UART ports, the jtag port and
UART ports are embedded in the lower section of liquid crystal touch screen.
As a kind of preferable technical scheme of the utility model, the core processor uses Intel Duos i7-7007k
Processor, (SuSE) Linux OS is equipped with, and the data interaction end of core processor is also associated with 512G solid state hard disc.
As a kind of preferable technical scheme of the utility model, the network connecting module includes wireless network card, the nothing
Gauze card is built-in with 4G phonecards, and the data terminal of wireless network card is connected with wireless signal transceiver.
As a kind of preferable technical scheme of the utility model, the voice module includes VODER, the voice
The output end of synthesizer is connected with loudspeaker.
As a kind of preferable technical scheme of the utility model, the interaction end of the core processor be also circumscribed with keyboard and
Mouse.
Compared with prior art, the beneficial effects of the utility model are：The utility model is adopted by setting core processor
TCL scripts are based on (SuSE) Linux OS, host computer test system is optimized, extends the verification tool of combination；Pass through
Jtag port and UART ports are set, multichannel development board can be connected simultaneously, sequential configuration is carried out using logic analyser and divides
Analysis, realizes system integration and test or multi-channel test while carries out, and improves testing efficiency, saves the time；By setting network connection mould
Block, wireless data transmission is realized using wireless network card and wireless signal transceiver, suitable for various environment, be not limited to place bar
Part；By setting language module, using VODER and loudspeaker realize voice broadcast remind operation, be easy to tester and
When pinpoint the problems；The utility model compatibility various ways, there is readable strong interactive interface, can be to polylith test board simultaneously
Operated, greatly improve testing efficiency.
Brief description of the drawings
Fig. 1 is the utility model structure diagram；
Fig. 2 is surface-mounted integrated circuit modular structure schematic diagram.
In figure：1- host computer shells；2- support bases；3- fixing grooves；4- liquid crystal touch screens；5- control buttons；6- is integrated
Circuit board；7- core processors；8- batteries；9-USB interfaces；10- network connecting modules；11- voice modules；12- logics point
Analyzer；13-JTAG ports；14-UART ports；15- solid state hard discs；16- wireless network cards；17- wireless signal transceivers；18- languages
Sound synthesizer；19- loudspeakers；20- keyboards；21- mouses.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out
Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made
The every other embodiment obtained, belong to the scope of the utility model protection.
Embodiment：
As depicted in figs. 1 and 2, it is a kind of based on TCL scripts to multichannel FPGA test board host computers, including host computer shell 1,
The lower section of the host computer shell 1 is connected with support base 2, and the upper surface of the support base 3, which is dug, fixing groove 3, is used for
Fixed test plate (panel) to be measured；The front of the host computer shell 1 is inlaid with liquid crystal touch screen 4, and the side of the liquid crystal touch screen 4 is inlayed
There is control button 5, the inside of the host computer shell 1 is provided with surface-mounted integrated circuit 6, core is welded with the surface-mounted integrated circuit 6
Heart processor 7, the interaction end of the core processor 7 are also circumscribed with keyboard 20 and mouse 21；The support base 2 is used to fix
Host computer shell 1 is supported, the fixing groove 3 is convenient for test operation for fixing test plate (panel) to be measured, and the liquid crystal touch screen 4 is aobvious
Show current operation interface, the control button 5 is used to carry out switching on and shutting down or the selection of other functions, the surface-mounted integrated circuit 6
For by all circuits be integrated；Described 21 universal architectures of keyboard 20 and mouse, it is convenient for programming input operation；
The core processor 7 uses Intel Duo i7-7007k processors, is equipped with (SuSE) Linux OS, and core
The data interaction end of processor 7 is also associated with 512G solid state hard disc 15, and the power pins of the core processor 7 are connected with storage
Battery 8, the input of the battery 8 are connected with USB interface 9, and the USB interface 9 is fixed on the side of host computer shell 1,
It is that battery 8 is charged that the USB interface 9, which is used to connect external power source, and the battery 8 is that core processor 7 is powered, institute
Solid state hard disc 15 is stated to be used to carry out data random storage；
The signal input part of the core processor 7 is connected with logic analyser 12, the input of the logic analyser 12
End is connected with multichannel jtag port 13 and UART ports 14, and the jtag port 13 and UART ports 14 are embedded in liquid crystal touch screen
4 lower section, multiple FPGA backboards or development board can be connected simultaneously by jtag port 13 and UART ports 14, carried out simultaneously
Test operation；The system of Quartus-II softwares and probe are compiled when the core processor 7 is run using JTAG chains dynamic control
Device is collected, extends the verification tool of combination, and allows to control any internal signal and a completely dynamic debugging enironment is provided；
A powerful debugging enironment is provided plus logic analyser 12, is compiled using TCL scripts, improves program operation
Efficiency；
The COM1 of core processor 7 is connected with network connecting module 10, and signal output port is connected with voice module
11, the network connecting module 10 includes wireless network card 16, and the wireless network card 16 is built-in with 4G phonecards, and wireless network card 16
Data terminal be connected with wireless signal transceiver 17, the wireless network card 16 is connected to mobile communications network by 4G phonecards,
Signal caused by core processor 7 is converted into wireless signal and sent according to the channel configured by the wireless signal transceiver 17
Go out, communicated with other equipments such as long-range computers；The voice module 11 includes VODER 18, the voice
The output end of synthesizer 18 is connected with loudspeaker 19, and when test goes wrong or during failure, core processor 7 exports corresponding signal
To VODER 18, the VODER 18 converts electrical signals into voice signal and played again by loudspeaker 19, carries out
Real-time early warning is reminded.
Of the present utility model to be mainly characterized by, the utility model operates system by setting core processor, using Linux
System is based on TCL scripts, optimizes host computer test system, extends the verification tool of combination；By setting jtag port
With UART ports, multichannel development board can be connected simultaneously, sequential configuration and analysis are carried out using logic analyser, realize that system joins
Adjust or multi-channel test is carried out simultaneously, improve testing efficiency, save the time；By setting network connecting module, wireless network is utilized
Card and wireless signal transceiver realize wireless data transmission, suitable for various environment, are not limited to site condition；By setting language
Module is sayed, realizes that voice broadcast reminds operation using VODER and loudspeaker, is easy to tester to pinpoint the problems in time；This
Utility model compatibility various ways, there is readable strong interactive interface, polylith test board can be operated simultaneously, significantly
Improve testing efficiency.
It is obvious to a person skilled in the art that the utility model is not limited to the details of above-mentioned one exemplary embodiment, and
And in the case of without departing substantially from spirit or essential attributes of the present utility model, it can realize that this practicality is new in other specific forms
Type.Therefore, no matter from the point of view of which point, embodiment all should be regarded as exemplary, and is nonrestrictive, this practicality is new
The scope of type limits by appended claims rather than described above, it is intended that the equivalency fallen in claim is contained
All changes in justice and scope are included in the utility model.Any reference in claim should not be considered as limitation
Involved claim.
Claims (5)
1. one kind is based on TCL scripts to multichannel FPGA test board host computers, it is characterised in that：It is described including host computer shell (1)
Support base (2) is connected with below host computer shell (1), the upper surface of the support base (2), which is dug, fixing groove (3),
For fixing test plate (panel) to be measured；The front of the host computer shell (1) is inlaid with liquid crystal touch screen (4), the liquid crystal touch screen (4)
Side be inlaid with control button (5), the inside of the host computer shell (1) is provided with surface-mounted integrated circuit (6), the integrated electricity
Core processor (7) is welded with road plate (6), the power pins of the core processor (7) are connected with battery (8), described
The input of battery (8) is connected with USB interface (9), and the USB interface (9) is fixed on the side of host computer shell (1), core
The COM1 of heart processor (7) is connected with network connecting module (10), and signal output port is connected with voice module (11), institute
The signal input part for stating core processor (7) is connected with logic analyser (12), and the input of the logic analyser (12) connects
Multichannel jtag port (13) and UART ports (14) are connected to, the jtag port (13) and UART ports (14) are embedded in liquid crystal and touched
Touch the lower section of screen (4).
2. a kind of TCL scripts that are based on according to claim 1 are to multichannel FPGA test board host computers, it is characterised in that：Institute
State core processor (7) and use Intel Duo i7-7007k processors, be equipped with (SuSE) Linux OS, and core processor
(7) data interaction end is also associated with 512G solid state hard disc (15).
3. a kind of TCL scripts that are based on according to claim 1 are to multichannel FPGA test board host computers, it is characterised in that：Institute
Stating network connecting module (10) includes wireless network card (16), and the wireless network card (16) is built-in with 4G phonecards, and wireless network card
(16) data terminal is connected with wireless signal transceiver (17).
4. a kind of TCL scripts that are based on according to claim 1 are to multichannel FPGA test board host computers, it is characterised in that：Institute
Stating voice module (11) includes VODER (18), and the output end of the VODER (18) is connected with loudspeaker (19).
5. a kind of TCL scripts that are based on according to claim 1 are to multichannel FPGA test board host computers, it is characterised in that：Institute
The interaction end for stating core processor (7) is also circumscribed with keyboard (20) and mouse (21).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720325485.0U CN206804823U (en) | 2017-03-30 | 2017-03-30 | One kind is based on TCL scripts to multichannel FPGA test board host computers |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720325485.0U CN206804823U (en) | 2017-03-30 | 2017-03-30 | One kind is based on TCL scripts to multichannel FPGA test board host computers |
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| Publication Number | Publication Date |
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| CN206804823U true CN206804823U (en) | 2017-12-26 |
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| CN201720325485.0U Expired - Fee Related CN206804823U (en) | 2017-03-30 | 2017-03-30 | One kind is based on TCL scripts to multichannel FPGA test board host computers |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109444725A (en) * | 2019-01-11 | 2019-03-08 | 西安君信电子科技有限责任公司 | A kind of the multifunctional testing plate and test method of integrated circuit test device |
| CN111123084A (en) * | 2019-12-11 | 2020-05-08 | 中国电子科技集团公司第二十研究所 | TCL language-based digital circuit rapid test method |
| CN113176883A (en) * | 2021-04-13 | 2021-07-27 | 武汉华中数控股份有限公司 | FPGA (field programmable Gate array) programming method and system capable of automatically generating programming record |
-
2017
- 2017-03-30 CN CN201720325485.0U patent/CN206804823U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109444725A (en) * | 2019-01-11 | 2019-03-08 | 西安君信电子科技有限责任公司 | A kind of the multifunctional testing plate and test method of integrated circuit test device |
| CN111123084A (en) * | 2019-12-11 | 2020-05-08 | 中国电子科技集团公司第二十研究所 | TCL language-based digital circuit rapid test method |
| CN113176883A (en) * | 2021-04-13 | 2021-07-27 | 武汉华中数控股份有限公司 | FPGA (field programmable Gate array) programming method and system capable of automatically generating programming record |
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| Date | Code | Title | Description |
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171226 Termination date: 20200330 |
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| CF01 | Termination of patent right due to non-payment of annual fee |