CN206790612U - A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output - Google Patents

A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output Download PDF

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CN206790612U
CN206790612U CN201720490412.7U CN201720490412U CN206790612U CN 206790612 U CN206790612 U CN 206790612U CN 201720490412 U CN201720490412 U CN 201720490412U CN 206790612 U CN206790612 U CN 206790612U
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circuit
signal
frequency
satellite
input
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刘伟良
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Zhuhai Meixin Electronic Technology Co Ltd
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Zhuhai Meixin Electronic Technology Co Ltd
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Abstract

The utility model discloses a kind of frequency demultiplier circuit of six tunnel input satellite-signal list output, including the signal input part being sequentially connected electrically, first order amplifier circuit, second level amplifier circuit, third level amplifier, wave filter, frequency reducing chip and signal output part, the signal output part is connected with mu balanced circuit and DiSEqC circuit for detecting in turn, the DiSEqC circuit for detecting connects FET Bias voltage controllers, the two-way output end of the FET Bias voltage controllers is connected with DC on-off circuits, three tunnel output ends of the DiSEqC circuit for detecting are connected with the input of the DC on-off circuits, three tunnel output ends of the DC on-off circuits connect the first order amplifier circuit respectively, the second level amplifier circuit and the third level amplifier.The frequency demultiplier circuit of six tunnels input satellite-signal list output, realizes and receives and handle the function of three satellite-signals disclosed in the utility model, and reduce the quantity of IC components, circuit is simple, reduces manufacturing cost.

Description

A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output
Technical field
Field of microwave communication is the utility model is related to, more particularly to a kind of frequency demultiplier of six tunnels input satellite-signal list output Circuit.
Background technology
In early days because number of satellite is fewer, lnb (the LOW NOISE BLOCK DOWN of in the market CONVERTER, LNB, also it is commonly called as:Tuner) all it is that a conventional butterfly antenna receives a satellite-signal, butterfly antenna leads to The lnb process signal of an a dishful of star is crossed, with the substantial increase of more than ten years number of satellite, market is for a dishful of more The demand of the lnb of star is increasing.
Exemplified by receiving three satellite low noise frequency demultipliers, such frequency demultiplier collects three differences by a butterfly antenna The TV signal of satellite, and by these signal reflexs into the different waveguide pipe of the lnb for being arranged on butterfly antenna, And amplification and frequency reducing through lnb, these signals is reconciled by the top box of digital machine of interior and be reduced into image and sound Frequency signal, via television for play.It is that the DISEQC sent by set top box believes to receive three satellite-signal lnbs Number control the satellite TV signal of DISEQC circuit for detecting in frequency demultiplier and on-off circuit selection respective satellite.Existing three Satellite low noise frequency demultiplier passes through six road signal input parts, first order amplifier, second level amplifier, wave filter, three roads letter The respective frequency down circuit of number process carries out the amplification of satellite TV signal and by third level amplifier all the way, six road signals connection FET Bias voltage controllers export the high and low frequency segment signal of three satellites.Although above-mentioned frequency demultiplier can realize a frequency demultiplier Receive and handle the effect of three satellite-signals, but circuit includes three frequency reducing chips and connects the reference frequency of frequency reducing chip Crystal oscillator, three FET Bias voltage controller IC, the circuit is complicated, and cost of parts is high and frequency demultiplier volume is big.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of frequency demultiplier electricity of six tunnels input satellite-signal list output Road, realize and receive and handle the function of three satellite-signals, reduce the quantity of IC components, circuit is simple, reduces manufacturing cost.
In order to solve the above-mentioned technical problem, the technical solution of the utility model is:
A kind of frequency demultiplier circuit of six tunnel input satellite-signal list output, including be sequentially connected electrically signal input part, the First stage amplifier circuit, second level amplifier circuit, third level amplifier, wave filter, frequency reducing chip and signal output part, it is described Signal output part is connected with mu balanced circuit and DiSEqC circuit for detecting in turn, and the DiSEqC circuit for detecting connects FET biased electricals Pressure controller, the two-way output end of the FET Bias voltage controllers are connected with DC on-off circuits, the DiSEqC circuit for detecting The input connection that is connected with the DC on-off circuits of three tunnel output ends, three tunnel output ends of the DC on-off circuits connect respectively Connect the first order amplifier circuit, the second level amplifier circuit and the third level amplifier.
Preferably, the first order amplifier circuit includes three tunnel identical first order horizontal amplifiers and the first order is vertical Amplifier.
Preferably, the second level amplifier circuit includes three tunnel identical second level amplifiers.
Preferably, the frequency reducing chip electrically connects with reference frequency crystal oscillator.
Preferably, the reference frequency crystal oscillator is the paster crystal oscillator that frequency is 25MHZ.
Preferably, the wave filter is bandpass filter.
Using above-mentioned technical proposal, satellite-signal is by signal input part, first order amplifier circuit, second level amplifier Circuit, third level amplifier, wave filter, frequency reducing chip, wherein there was only frequency reducing chip all the way, it is independent instead of three tunnels of traditional product Frequency reducing chip, reduce the quantity of IC components, first order amplifier circuit, second level amplifier circuit and third level amplifier Bias voltage is provided by FET Bias voltage controllers, and two-way output end and the DC on-off circuits of FET Bias voltage controllers connect Connect, the input that three tunnel output ends of DiSEqC circuit for detecting are connected with DC on-off circuits connects, and three tunnels of DC on-off circuits are defeated Go out end and connect first order amplifier circuit, second level amplifier circuit and third level amplifier, the multichannel of DC on-off circuits respectively Output end controls multistage amplifier circuit, realizes that the multiple output ends of a DC on-off circuit, a FET Bias voltage controller are multiple Output end replaces three FET Bias voltage controllers of available circuit, reduces the quantity of IC components, realizes and receives and handle three The function of satellite-signal, circuit is simple, reduces manufacturing cost.
Brief description of the drawings
Fig. 1 is the frequency demultiplier circuit structure diagram that the tunnels of prior art Xia six input the output of satellite-signal list;
Fig. 2 is the frequency demultiplier circuit structure diagram that a kind of six tunnel of the present utility model inputs the output of satellite-signal list.
In figure, 1- signal input parts;2- first order amplifier circuits;3- second level amplifier circuit;The 4- third level is amplified Device;5- wave filters;7- signal output parts;8- mu balanced circuits;9-DiSEqC circuit for detecting;10-FET Bias voltage controllers;11- DC on-off circuits;12- first order horizontal amplifiers;13- first order vertical amplifiers;14- second level amplifier;15- frequency reducing cores Piece;16- reference frequency crystal oscillators.
Embodiment
Specific embodiment of the present utility model is described further below in conjunction with the accompanying drawings.Herein it should be noted that It is used to help understand the utility model for the explanation of these embodiments, but does not form to restriction of the present utility model.This Outside, as long as technical characteristic involved in each embodiment of the utility model disclosed below does not form conflict each other Can is mutually combined.
As shown in figure 1, the frequency down circuit of the tunnels of prior art Xia six input satellite-signal list output, including be sequentially connected electrically Six road signal input parts 1, six tunnel first order amplifier circuits 2, three tunnel second level amplifier circuits 3, three path filters 5, three Road frequency reducing chip 15 and all the way signal output part 7, signal output part 7 are connected with mu balanced circuit 8DiSEqC circuit for detecting 9 in turn, Three tunnel output ends of DiSEqC circuit for detecting 9 are connected with the input of DC on-off circuits 11, the three tunnels output of DC on-off circuits 11 End is connected to three road FET Bias voltage controllers 10, and the output end of FET Bias voltage controllers 10 connects the first order respectively Amplifier circuit 2 and second level amplifier circuit 3, first order amplifier circuit 2 include the horizontal amplification of the three tunnel identical first order Device 12 and first order vertical amplifier 13.Second level amplifier circuit 3 includes three tunnel identical second level amplifiers 14.Frequency demultiplier Chip 15 electrically connects with reference frequency crystal oscillator 16.
As shown in Fig. 2 a kind of frequency demultiplier circuit of six tunnels input satellite-signal list output disclosed in the utility model, including The signal input part 1 that is sequentially connected electrically, first order amplifier circuit 2, second level amplifier circuit 3, third level amplifier 4, filter Ripple device 5, frequency reducing chip 15 and signal output part 7, signal output part 7 are connected with mu balanced circuit 8 and DiSEqC circuit for detecting in turn 9, DiSEqC circuit for detecting 9 connection FET Bias voltage controllers 10, the two-way output end and DC of FET Bias voltage controllers 10 On-off circuit 11 is connected, and three tunnel output ends of DiSEqC circuit for detecting 9 are connected with the input of DC on-off circuits 11, DC switch electricity The three tunnel output ends on road 11 connect first order amplifier circuit 2, second level amplifier circuit 3 and third level amplifier 4 respectively. First order amplifier circuit 2 includes three tunnel identical first order horizontal amplifiers 12 and first order vertical amplifier 13.The second level Amplifier circuit 3 includes three tunnel identical second level amplifiers 14.Frequency reducing chip 15 electrically connects with reference frequency crystal oscillator 16.Frequency reducing The reference frequency crystal oscillator 16 of chip 15 is the paster crystal oscillator that frequency is 25MHZ, easy for installation, facilitates operating personnel to assemble.Wave filter 5 For bandpass filter.Satellite-signal is by signal input part 1, first order amplifier circuit 2, second level amplifier circuit the 3, the 3rd Level amplifier 4, wave filter 5, frequency reducing chip 15, wherein there was only frequency reducing chip 15 all the way, instead of three traditional tunnel independence frequency demultipliers Circuit, reduce the quantity of IC components, first order amplifier circuit 2, second level amplifier circuit 3 and third level amplifier 4 Bias voltage is provided by FET Bias voltage controllers 10, two-way output end and the DC on-off circuits of FET Bias voltage controllers 10 11 connections, the input that three tunnel output ends of DiSEqC circuit for detecting 9 are connected with DC on-off circuits 11 connect, DC on-off circuits 11 Three tunnel output ends connect first order amplifier circuit 2, second level amplifier circuit 3 and third level amplifier 4 respectively, DC switches Circuit 11 multi-channel output control multistage amplifier circuit, realize a DC on-off circuit 11 frequency reducing chip 15, instead of existing Three FET Bias voltage controllers 10 of circuit and three frequency reducing chips 15, the quantity of IC components is reduced, realize and receive and handle The function of three satellite-signals, circuit is simple, reduces manufacturing cost.
The operation principle of above-mentioned technical proposal is as follows:The vertical signal and horizontal signal of three satellite televisions amplify through three-level With enter frequency reducing chip 15 after bandpass filter, by the adjustable amplifications of the 33-43dB of frequency reducing chip 15, mixing and DC switch electricity Road, after be respectively outputted to signal output part 7, then by cable be connected to interior set top box, by the demodulation of set top box It is reduced into after image and voice signal by televising out.The satellite television letter of three satellite TV signal combinings together Number, the low-frequency range horizontal signal of output satellite 1 is then controlled by FET Bias voltage controllers 10 corresponding to three satellites, defended The high band horizontal signal of star 1, the low-frequency range vertical signal of satellite 1, the high band vertical signal of satellite 1;The horizontal letter of the low-frequency range of satellite 2 Number, the high band horizontal signal of satellite 2, the low-frequency range vertical signal of satellite 2, the high band vertical signal of satellite 2;The low-frequency range water of satellite 3 Ordinary mail number, the high band horizontal signal of satellite 3, the low-frequency range vertical signal of satellite 3, this 12 kinds of the high band vertical signal of satellite 3 are defended A kind of star TV signal signal therein, it can select to watch one of which satellite electricity by set top box in same time user Depending on the program in signal.
Embodiment of the present utility model is explained in detail above in association with accompanying drawing, but the utility model is not limited to be retouched The embodiment stated.For a person skilled in the art, it is right in the case where not departing from the utility model principle and spirit These embodiments carry out a variety of change, modification, replacement and modification, still fall within the scope of protection of the utility model.

Claims (6)

  1. A kind of 1. frequency demultiplier circuit of six tunnels input satellite-signal list output, it is characterised in that:Including the signal being sequentially connected electrically Input, first order amplifier circuit, second level amplifier circuit, third level amplifier, wave filter, frequency reducing chip and signal are defeated Go out end, the signal output part is connected with mu balanced circuit and DiSEqC circuit for detecting, the DiSEqC circuit for detecting connection in turn FET Bias voltage controllers, the two-way output end of the FET Bias voltage controllers is connected with DC on-off circuits, described Three tunnel output ends of DiSEqC circuit for detecting are connected with the input of the DC on-off circuits, and three tunnels of the DC on-off circuits are defeated Go out end and connect the first order amplifier circuit, the second level amplifier circuit and the third level amplifier respectively.
  2. 2. the frequency demultiplier circuit of input satellite-signal list output in six tunnels according to claim 1, it is characterised in that:Described First stage amplifier circuit includes three tunnel identical first order horizontal amplifiers and first order vertical amplifier.
  3. 3. the frequency demultiplier circuit of input satellite-signal list output in six tunnels according to claim 1, it is characterised in that:Described Two-stage amplifier circuit includes three tunnel identical second level amplifiers.
  4. 4. the frequency demultiplier circuit of input satellite-signal list output in six tunnels according to claim 1, it is characterised in that:The drop Frequency chip electrically connects with reference frequency crystal oscillator.
  5. 5. the frequency demultiplier circuit of input satellite-signal list output in six tunnels according to claim 4, it is characterised in that:The ginseng It is the paster crystal oscillator that frequency is 25MHZ to examine frequency crystal oscillator.
  6. 6. the frequency demultiplier circuit of input satellite-signal list output in six tunnels according to claim 1, it is characterised in that:The filter Ripple device is bandpass filter.
CN201720490412.7U 2017-05-04 2017-05-04 A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output Active CN206790612U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720490412.7U CN206790612U (en) 2017-05-04 2017-05-04 A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720490412.7U CN206790612U (en) 2017-05-04 2017-05-04 A kind of frequency demultiplier circuit of six tunnels input satellite-signal list output

Publications (1)

Publication Number Publication Date
CN206790612U true CN206790612U (en) 2017-12-22

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Family Applications (1)

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