CN207184716U - A kind of integrated more satellite reception phaselocked loop frequency demultipliers of C-band - Google Patents

Abstract

The utility model discloses a kind of integrated more satellite reception phaselocked loop frequency demultipliers of C-band, including PLL phase-locked loop chips IC1, control chip IC2 and electric capacity C3, one end connection input signal RFin of the electric capacity C3, electric capacity C3 other end connection PLL phase-locked loop chips IC1 pin RFin, the utility model use；Diseqc identification chips are integrated built in LNB frequency demultipliers, there are high sensitivity, automatic detection, forming characteristics.Can be achieved satellite receiver devices between LNB frequency demultipliers, only need a Cable connection, intermediary does not need external any adapter and distributor etc..Installation is succinct, reduces the layout of circuit, can reduce wire rod cost, reduce rate of breakdown, support environmental protection.Meet needs of the user to more satellite programmings；Can be by the control to receiver device, frequency demultiplier is internally integrated chip can automatic identification user's instructions；So as to export multigroup system control signal in LNB ports.So as to realize the video pictures for watching more satellite programmings.

Description

A kind of integrated more satellite reception phaselocked loop frequency demultipliers of C-band

Technical field

A kind of frequency demultiplier is the utility model is related to, specifically a kind of integrated more satellite reception phaselocked loop drops of C-band Frequency device.

Background technology

With science and technology and the development of life, the transmission of communication is also increasingly popularized, and the ratio of satellite television is watched in family Also more and more higher.Wherein, frequency demultiplier is to watch device essential to satellite television, but current C-band frequency demultiplier on the market Product its antinoise, antijamming capability, local oscillation are unstable；Loss or distortion, unstability in signals transmission.It is single The cost of the reception of satellite, installing space and auxiliary products etc. problem, can not increasingly meet the needs of client.

It is limited to the design of conventional satellite frequency demultiplier circuit and using theory.User is watching section using DVB During mesh, it is only capable of receiving a certain satellite-signal, watches that program selection is limited.

But also there is the scheme for solving only to watch single satellite in the market：But the more set antenna equipments of needs installation, （Area occupied is big）, pass through external variable connector product（It is attached using a plurality of Cabie）；Satellite programming is increased income to realize Selection.This mode expends the installation cost and environment space of antenna very much.Also need to undertake adopting for variable connector and a plurality of Cable Purchase cost.Centre has a plurality of Cable gone here and there, connected, installs complexity.And signal between a variety of parts after connecting；It is unfavorable for letter The factors such as transmission between number, the rise that fault rate can be caused.

Utility model content

The purpose of this utility model is to provide a kind of C-band integrated more satellite reception phaselocked loop frequency demultipliers, with Solve the problems, such as to propose in above-mentioned background technology.

To achieve the above object, the utility model provides following technical scheme：

A kind of integrated more satellite reception phaselocked loop frequency demultipliers of C-band, including PLL phase-locked loop chips IC1, control core Piece IC2 and electric capacity C3, the electric capacity C3 one end connect input signal RFin, electric capacity C3 other end connection PLL phaselocked loop cores Piece IC1 pin RFin, PLL phase-locked loop chip IC1 pin XTLA1 and XTLA2 connects motor SMD1 both ends, PLL lock phases respectively Ring core piece IC1 pin IF connections electric capacity C6, electric capacity C6 other end connection receiver, control chip IC2 pin LNB1 connections three Pole pipe Q3 base stage, triode Q3 emitter stage connection control chip IC2 pin VDD, triode Q3 colelctor electrode connection resistance R5, resistance the R5 other end connection resistance R3 and resistance R4, resistance the R3 other end connection PLL phase-locked loop chips IC1 pin 10, Resistance R4 other end connection PLL phase-locked loop chips IC1 pin 9 is simultaneously grounded, control chip IC2 pin VDD connection electric capacity C4, two The pin LNB2 connecting triodes Q1 of pole pipe D1 negative electrode, triode Q3 emitter stage and power vd D, control chip IC2 base stage, Triode Q1 colelctor electrode connection electric capacity C1 and the second frequency converter, control chip IC2 pin SET connection resistance R1, resistance R1's Other end connecting triode Q1 emitter stage and triode Q2 emitter stage, control chip IC2 pin LNB4 connecting triodes Q2 Base stage, triode Q2 colelctor electrode connection electric capacity C2 and the 4th frequency converter, control chip IC2 pin LNB3 connecting triodes Q4 Base stage, triode Q4 colelctor electrode connection electric capacity C7 and the 3rd frequency converter.

As preferred scheme of the present utility model：The model RDA3570 of the PLL phase-locked loop chips IC1, the control The model HS108Y-1 of chip IC 2.

Compared with prior art, the beneficial effects of the utility model are：The utility model uses；LNB frequency demultipliers are built-in to be collected Into Diseqc identification chips,（With high sensitivity, automatic detection, forming characteristics）.Satellite receiver devices can be achieved to drop to LNB Between frequency device, a Cable connection is only needed, intermediary does not need external any adapter and distributor etc..Installation is succinct, subtracts The layout of few circuit, wire rod cost can be reduced, reduce rate of breakdown, support environmental protection.Meet user to more satellite programmings Need；Can be by the control to receiver device, frequency demultiplier is internally integrated chip can automatic identification user's instructions；So that LNB ports export multigroup system control signal.So as to realize the video pictures for watching more satellite programmings.

Brief description of the drawings

Fig. 1 is circuit diagram of the present utility model.

Fig. 2 is the operating diagram of the design.

Embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment obtained, belong to the scope of the utility model protection.

Refer to Fig. 1-2, in the utility model embodiment, a kind of integrated more satellite reception phaselocked loops drops of C-band Frequency device, including PLL phase-locked loop chips IC1, control chip IC2 and electric capacity C3, the electric capacity C3 one end connection input signal RFin, electric capacity the C3 other end connection PLL phase-locked loop chips IC1 pin RFin, PLL phase-locked loop chip IC1 pin XTLA1 and XTLA2 connects motor SMD1 both ends respectively, and PLL phase-locked loop chips IC1 pin IF connections electric capacity C6, electric capacity the C6 other end connect Connect receiver, control chip IC2 pin LNB1 connecting triodes Q3 base stage, triode Q3 emitter stage connection control chip IC2 pin VDD, triode Q3 colelctor electrode connection resistance R5, resistance the R5 other end connection resistance R3 and resistance R4, resistance R3 Other end connection PLL phase-locked loop chips IC1 pin 10, resistance R4 other end connection PLL phase-locked loop chips IC1 pin 9 is simultaneously Ground connection, control chip IC2 pin VDD connection electric capacity C4, diode D1 negative electrode, triode Q3 emitter stage and power vd D, control Coremaking piece IC2 pin LNB2 connecting triodes Q1 base stage, triode Q1 colelctor electrode connection electric capacity C1 and the second frequency converter, control The transmitting of coremaking piece IC2 pin SET connections resistance R1, resistance the R1 other end connecting triode Q1 emitter stage and triode Q2 Pole, control chip IC2 pin LNB4 connecting triodes Q2 base stage, triode Q2 colelctor electrode connection electric capacity C2 and the 4th frequency conversion Device, control chip IC2 pin LNB3 connecting triodes Q4 base stage, triode Q4 colelctor electrode connection electric capacity C7 and the 3rd frequency conversion Device.

PLL phase-locked loop chips IC1 model RDA3570, the model HS108Y-1 of the control chip IC2.

Operation principle of the present utility model is：Satellite TV signal is after FET, progress low noise amplification, transmission To IC1（PLL phase-locked loop chips）, obtain low noise, demodulation IF signals needed for satellite receiving equipment precisely, stable.When watching A During satellite programming：User instruction receiver output mode Diseqc-1 direct current carriers signal, through amplifying inside IC2 --- it is whole Shape --- decoding；Outputting drive voltage promotes Q3, filtered electric capacity C8 output voltage control signals；So as to drive LNB to work, in fact The Vertical/Horizontal Whole frequency bands of existing A satellite programmings receive.When user need to watch B satellite programmings, open receiver Diseqc-2 instructions, IC2 by the 7th pin position output control signal, promote Q1 filtered electric capacity C1 outputs, so as to control LNB2, Reach and watch B satellite-signal pictures.When watching C satellite programmings；Open receiver Diseqc-3；IC2 automatically selects, from 3 pin positions Output control voltage drives LNB3, reaches all TV programme for watching C satellites after promoting Q4 filtered.Receiver is sent When Diseqc-4 is instructed, IC2 its 6 pin output control voltage, promote Q2 drivings LNB4, can now watch all of D satellites Program.

Claims (2)

1. a kind of integrated more satellite reception phaselocked loop frequency demultipliers of C-band, including PLL phase-locked loop chips IC1, control chip IC2 and electric capacity C3, it is characterised in that one end connection the input signal RFin, electric capacity C3 of the electric capacity C3 other end connection PLL Phase-locked loop chip IC1 pin RFin, PLL phase-locked loop chip IC1 pin XTLA1 and XTLA2 connects motor SMD1 both ends respectively, PLL phase-locked loop chips IC1 pin IF connections electric capacity C6, electric capacity C6 other end connection receiver, control chip IC2 pin LNB1 Connecting triode Q3 base stage, triode Q3 emitter stage connection control chip IC2 pin VDD, triode Q3 colelctor electrode connect Connecting resistance R5, resistance the R5 other end connection resistance R3 and resistance R4, resistance R3 other end connection PLL phase-locked loop chips IC1 Pin 10, resistance R4 other end connection PLL phase-locked loop chips IC1 pin 9 is simultaneously grounded, and control chip IC2 pin VDD connections are electric Hold C4, diode D1 negative electrode, triode Q3 emitter stage and power vd D, control chip IC2 pin LNB2 connecting triodes Q1 Base stage, triode Q1 colelctor electrode connection electric capacity C1 and the second frequency converter, control chip IC2 pin SET connection resistance R1 be electric Hinder R1 other end connecting triode Q1 emitter stage and triode Q2 emitter stage, control chip IC2 pin LNB4 connections three Pole pipe Q2 base stage, triode Q2 colelctor electrode connection electric capacity C2 and the 4th frequency converter, control chip IC2 pin LNB3 connections three Pole pipe Q4 base stage, triode Q4 colelctor electrode connection electric capacity C7 and the 3rd frequency converter.

2. the integrated more satellite reception phaselocked loop frequency demultipliers of C-band according to claim 1, it is characterised in that institute State PLL phase-locked loop chips IC1 model RDA3570, the model HS108Y-1 of the control chip IC2.