CN206712931U - A kind of high frequency tuner circuit and tuner - Google Patents
A kind of high frequency tuner circuit and tuner Download PDFInfo
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- CN206712931U CN206712931U CN201720334418.5U CN201720334418U CN206712931U CN 206712931 U CN206712931 U CN 206712931U CN 201720334418 U CN201720334418 U CN 201720334418U CN 206712931 U CN206712931 U CN 206712931U
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- high frequency
- tuner circuit
- frequency tuner
- signal
- module
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Abstract
The utility model discloses a kind of high frequency tuner circuit and tuner.Rf signal reception module that the high frequency tuner circuit includes being sequentially connected, radiofrequency signal amplification module, radiofrequency signal filtration module, phaselocked loop framework process chip, intermediate-freuqncy signal output module, the input of the phaselocked loop framework process chip is also associated with clock crystal oscillator；The radiofrequency signal filtration module uses two-way parallel coupling microstrip bandpass filter.The high frequency tuner circuit uses PLL conceptual designs, using two-way parallel coupling microstrip bandpass filter come the effect of realizing band logical and mirror mutually suppresses, not only realize the purpose of product passband filtering, simultaneously also reasonably using the empty avoiding of cavity shake chamber formed shield effectiveness, there is certain filtering function for low-frequency interference signal, parasitic capacitance, inductance etc..
Description
Technical field
It the utility model is related to communication frequency demultiplier field, more particularly to a kind of high frequency tuner circuit and tuner.
Background technology
Because of market user's competitiveness demand, DRO schemes were used in the past（Resolution element）The tuner product of design can not
Meet production cost competitive advantage；And product stability is affected by environment big.With widely using for Satellite Product, tuner is set
Meter is in PLL schemes（Phaselocked loop）Technology is also more and more ripe, and product traction is also in step lifting enough；But existing PLL
Scheme tuner still adopts the design match pattern of DRO schemes, and product has not given play to PLL schemes completely on design cost
Advantage.
Utility model content
In order to solve above-mentioned the deficiencies in the prior art, the utility model provides a kind of high frequency tuner circuit and tuner.The height
Frequency head circuit uses PLL conceptual designs, and band logical is realized and mirror mutually suppresses using two-way parallel coupling microstrip bandpass filter
Effect, not only realize product passband filtering purpose, while also reasonably using the empty avoiding of cavity shake chamber formed shield effectiveness,
There is certain filtering function for low-frequency interference signal, parasitic capacitance, inductance etc..
Technical problem to be solved in the utility model is achieved by the following technical programs：
A kind of high frequency tuner circuit, including be sequentially connected rf signal reception module, radiofrequency signal amplification module, radio frequency letter
Number filtration module, phaselocked loop framework process chip, intermediate-freuqncy signal output module, the input of the phaselocked loop framework process chip
It is also associated with clock crystal oscillator；The radiofrequency signal filtration module uses two-way parallel coupling microstrip bandpass filter.
Further, the rf signal reception module includes horizontally-polarized antenna and vertical polarized antenna.
Further, the radiofrequency signal amplification module includes first stage amplifier and two-stage amplifier.
Further, the clock crystal oscillator is 25MHz crystal oscillators.
Further, the input of the two-way parallel coupling microstrip bandpass filter is also associated with filter capacitor.
Further, the intermediate frequency output module includes four road intermediate frequency outputs or the output of two-way intermediate frequency.
Further, the high frequency tuner circuit also includes power supply circuit, and the power supply circuit includes defeated with the intermediate-freuqncy signal
The regulator block per the output connection of intermediate-freuqncy signal all the way gone out in module, each two regulator block are connected to a compound diode, institute
Compound diode is stated to be connected with the phaselocked loop framework process chip.
Further, the model RT320M or RT340M of the phaselocked loop framework process chip.
A kind of tuner, including tuner cavity and the wiring board that is arranged on the tuner cavity, the wiring board
It is upper that above-mentioned high frequency tuner circuit is set.
Further, the clock crystal oscillator is arranged on the back side of the wiring board.
The utility model has the advantages that：The high frequency tuner circuit uses PLL conceptual designs, using two-way parallel coupling
The effect for closing microstrip bandpass filter to realize band logical and mirror mutually suppresses, the purpose of product passband filtering is not only realized, simultaneously
Also reasonably using the empty avoiding of cavity shake chamber formed shield effectiveness, for low-frequency interference signal, parasitic capacitance, inductance etc. have one
Fixed filtering function.
Brief description of the drawings
Fig. 1 is the block diagram of the high frequency tuner circuit of two-way provided by the utility model output；
Fig. 2 is the circuit theory diagrams of the high frequency tuner circuit of two-way provided by the utility model output；
Fig. 3 is the vertical polarized antenna of the circuit theory diagrams of the high frequency tuner circuit shown in Fig. 2, vertical polarization signal amplification list
The partial enlarged drawing of member and vertical polarization signal filter unit；
Fig. 4 is the horizontally-polarized antenna of the circuit theory diagrams of the high frequency tuner circuit shown in Fig. 2, horizontal polarization signals amplification list
The partial enlarged drawing of member and horizontal polarization signals filter unit；
Fig. 5 is the filter capacitor of the circuit theory diagrams of the high frequency tuner circuit shown in Fig. 2 and two-way parallel coupling micro-strip band logical
The partial enlarged drawing of wave filter；
Fig. 6 is the partial enlarged drawing of the phaselocked loop framework process chip of the circuit theory diagrams of the high frequency tuner circuit shown in Fig. 2；
Fig. 7 is the intermediate-freuqncy signal output module of circuit theory diagrams and the office of power supply circuit of the high frequency tuner circuit shown in Fig. 2
Portion's enlarged drawing；
Fig. 8 is the partial enlarged drawing of the clock crystal oscillator of the circuit theory diagrams of the high frequency tuner circuit shown in Fig. 2；
Fig. 9 is the block diagram of the high frequency tuner circuit of four tunnel provided by the utility model output；
Figure 10 is the circuit of the high frequency tuner circuit of four tunnel provided by the utility model output away from figure；
Figure 11 is the vertical polarized antenna of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10, the amplification of vertical polarization signal
The partial enlarged drawing of unit and vertical polarization signal filter unit；
Figure 12 is the horizontally-polarized antenna of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10, horizontal polarization signals amplification
The partial enlarged drawing of unit and horizontal polarization signals filter unit；
Figure 13 is the filter capacitor of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10 and two-way parallel coupling micro-strip band
The partial enlarged drawing of bandpass filter；
Figure 14 is the partial enlargement of the phaselocked loop framework process chip of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10
Figure；
Figure 15 is the intermediate-freuqncy signal output module and power supply circuit of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10
Partial enlarged drawing；
Figure 16 is the partial enlarged drawing of the clock crystal oscillator of the circuit theory diagrams of the high frequency tuner circuit shown in Figure 10；
Figure 17 is the stereogram 1 of the tuner with two delivery outlets provided by the utility model；
Figure 18 is the stereogram 2 of the tuner with two delivery outlets provided by the utility model；
Figure 19 is the stereogram 1 of the tuner with four delivery outlets provided by the utility model；
Figure 20 is the stereogram 2 of the tuner with four delivery outlets provided by the utility model.
Embodiment
The utility model is described in detail with reference to the accompanying drawings and examples.
Embodiment one
As illustrated in fig. 1 and 2, a kind of high frequency tuner circuit, including rf signal reception module 1, the radiofrequency signal being sequentially connected
Amplification module 2, radiofrequency signal filtration module 3, phaselocked loop framework process chip 4, intermediate-freuqncy signal output module 6, the phaselocked loop
The input of framework process chip 4 is also associated with clock crystal oscillator 5；The radiofrequency signal filtration module 3 uses two-way parallel coupling
Microstrip bandpass filter 34.
The high frequency tuner circuit uses PLL（Phaselocked loop）Conceptual design, using two-way parallel coupling microstrip bandpass filter 34
Come the effect for realizing band logical and mirror mutually suppresses, the purpose of product passband filtering is not only realized, while also reasonably utilizes cavity
Empty avoiding shake chamber formed shield effectiveness, there is certain filtering function for low-frequency interference signal, parasitic capacitance, inductance etc..
As shown in figures 3-8, the rf signal reception module 1 includes horizontally-polarized antenna 12 and vertical polarized antenna 11,
Be respectively used to reception space both horizontally and vertically on ku waveband radio frequency signals, ku audio range frequencies are 10.7 ~ 12.75GHz；
The radiofrequency signal amplification module 2 includes horizontal polarization signals amplifying unit 22 and vertical polarization signal amplification unit
21, the horizontal polarization signals amplifying unit 22 and vertical polarization signal amplification unit 21 use dual-stage amplifier structure, use
In the ku waveband radio frequency signals that amplification receives；
The radiofrequency signal filtration module 3 includes horizontal polarization signals filter unit 32 and vertical polarization signal filter unit
31, horizontal polarization signals filter unit 32 and vertical polarization the signal filter unit 31 uses filter capacitor 33（3pF）+ bis-
The structure being connected to parallel coupling microstrip bandpass filter 34, for filtering out the radiofrequency signal outside 10.7 ~ 12.75GHz；
The phaselocked loop framework process chip 4 is the model RT320M of Taiwan Rafael Microelectronics Co., Ltd. production
Tuner chip, using the phaselocked loop frameworks of the output of 2 input 2, be integrated with radio frequency work(point, the vibration of low-and high-frequency local oscillator, mixing, in
The functions such as frequency filtering, intermediate frequency amplification and switching switch；
The clock crystal oscillator 5 uses 25MHz crystal oscillators, for exciting and starting in the phaselocked loop framework process chip 4
Portion's logic circuit；After the phaselocked loop framework process chip 4 excites startup by the clock crystal oscillator 5, by the radio frequency after amplification
Signal carries out work(point, forms low-frequency band（10.7GHz~11.7GHz）And high frequency band（11.7GHz~12.75GHz）, and to low
Frequency wave band produces 9.75GHz low-frequency oscillation and the 10.6GHz higher-order of oscillation is produced to high frequency band, then carries out being mixed simultaneously shape
Into two-way intermediate-freuqncy signal 0.95GHz ~ 1.95GHz and 1.1GHz ~ 2.15GHz, and exported after being filtered to two-way intermediate-freuqncy signal
To the intermediate-freuqncy signal output module 6；
The intermediate-freuqncy signal output module 6 exports including two-way intermediate-freuqncy signal, is connected to external DVB groups 7, the DVB
It is in audio signal and vision signal that group 7, which is responsible for that intermediate-freuqncy signal is received to and handled decoding,.
The high frequency tuner circuit uses filter capacitor 33 in the radiofrequency signal filtration module 3（3pF）+ two-way parallel coupling
The form of microstrip bandpass filter 34 is filtered to radiofrequency signal, passes through filter capacitor 33（3pF）Low-frequency interference signal is pressed down
Two-way parallel coupling microstrip bandpass filter 34 is output to after system, then carries out the processing of band logical frequency filtering and mirror image suppression.Existing
In some PLL schemes high frequency tuner circuits, to reach identical filter effect, and mutually suppress function with mirror, generally require use
The parallel wave filter of at least three ranks or hair clip wave filter, can be only achieved effective purpose.
As shown in figure 8, the high frequency tuner circuit also includes power supply circuit 8, the power supply circuit 8 include respectively with the intermediate frequency
Signal output module 6 two-way intermediate-freuqncy signal output connection the first regulator block and the second regulator block, first regulator block and
Second regulator block is connected to a compound diode, and the compound diode is connected with the phaselocked loop framework process chip 4.
In the high frequency tuner circuit during completing to receive and transmission handles radiofrequency signal, the external DVB groups 7 were both
It is the decoding end of output signal, and the power end of tuner, the regulator block are used for DVB and stable work provided to elements at different levels
Make voltage, the compound diode is used to prevent DVB reversely returns to the operating voltage that elements at different levels export from altering.
In the prior art, the operating voltage to prevent regulator block from being exported to each anterior member of high frequency tuner circuit is reversely returned
Alter, each regulator block is respectively connected with a unilateral diode, and any one-channel signal is both needed to match unidirectional two pole through regulator block output
Guan Laixiang chips at different levels and amplifier power supply；When unilateral diode is respectively configured in the regulator block, high-frequency circuit configuration
Area occupied is big, and material cost is high.
High frequency tuner circuit of the present utility model in voltage after regulator block voltage stabilizing output, voltage that compound diode is formed
Connection line input port is become all the way by the two-way of script, can not only cross the production cost for reducing tuner, and DVB powers
The area occupied of circuit reduces, and is significantly reduced with IF output signal crosspoint, during so as to realize pcb board layout, output port
Intermediate-freuqncy signal outlet line and DVB power supply circuit 8 be effectively isolated, improve the antijamming capability and stably of product signal itself
Property, and reduce the area of circuit, simplify circuit design.
Embodiment two
As shown in Figures 9 and 10, a kind of high frequency tuner circuit, including rf signal reception module 1, the radiofrequency signal being sequentially connected
Amplification module 2, radiofrequency signal filtration module 3, phaselocked loop framework process chip 4, intermediate-freuqncy signal output module 6, the phaselocked loop
The input of framework process chip 4 is also associated with clock crystal oscillator 5；The radiofrequency signal filtration module 3 uses two-way parallel coupling
Microstrip bandpass filter 34.
The high frequency tuner circuit uses PLL（Phaselocked loop）Conceptual design, using filtering in the radiofrequency signal filtration module 3
Electric capacity 33（3pF）The form of+two-way parallel coupling microstrip bandpass filter 34 is filtered to radiofrequency signal, passes through filter capacitor
33（3pF）Two-way parallel coupling microstrip bandpass filter 34 is output to after low-frequency interference signal is suppressed, then carries out band logical frequency
Filtering process and mirror image suppress.In existing PLL schemes high frequency tuner circuit, to reach identical filter effect, and there is mirror
Mutually suppress function, generally require using the parallel wave filter of at least three ranks or hair clip wave filter, can be only achieved effective purpose；This practicality
New high frequency tuner circuit using two-way parallel coupling microstrip bandpass filter 34 come the effect of realizing band logical and mirror mutually suppresses, no
Only realize product passband filtering purpose, while also reasonably using the empty avoiding of cavity shake chamber formed shield effectiveness, for low
Frequency interference signal, parasitic capacitance, inductance etc. have certain filtering function.
As illustrated in figures 11-16, the rf signal reception module 1 includes horizontally-polarized antenna 12 and vertical polarized antenna
11, be respectively used to reception space both horizontally and vertically on ku waveband radio frequency signals, ku audio range frequencies be 10.7 ~
12.75GHz；
The radiofrequency signal amplification module 2 includes horizontal polarization signals two-stage amplifying unit and vertical polarization signal two-stage is put
Big unit, for amplifying the ku waveband radio frequency signals received；
The radiofrequency signal filtration module 3 includes horizontal polarization signals filter unit 32 and vertical polarization signal filter unit
31, horizontal polarization signals filter unit 32 and vertical polarization the signal filter unit 31 uses filter capacitor 33（3pF）+ bis-
The structure being connected to parallel coupling microstrip bandpass filter 34, for filtering out the radiofrequency signal outside 10.7 ~ 12.75GHz；
The phaselocked loop framework process chip 4 is the model RT340M of Taiwan Rafael Microelectronics Co., Ltd. production
Tuner chip, using the phaselocked loop frameworks of the output of 2 input 4, be integrated with radio frequency work(point, the vibration of low-and high-frequency local oscillator, mixing, in
The functions such as frequency filtering, intermediate frequency amplification and switching switch；
The clock crystal oscillator 5 uses 25MHz crystal oscillators, for exciting and starting in the phaselocked loop framework process chip 4
Portion's logic circuit；After the phaselocked loop framework process chip 4 excites startup by the clock crystal oscillator 5, by the radio frequency after amplification
Signal carries out work(point, forms low-frequency band（10.7GHz~11.7GHz）And high frequency band（11.7GHz~12.75GHz）, and to low
Frequency wave band produces 9.75GHz low-frequency oscillation and the 10.6GHz higher-order of oscillation is produced to high frequency band, then carries out being mixed simultaneously shape
Cheng Silu intermediate-freuqncy signals 0.95GHz, 1.95GHz, 1.1GHz and 2.15GHz, the tunnel intermediate-freuqncy signals of Bing Dui tetra- export after being filtered
To the intermediate-freuqncy signal output module 6；
The intermediate-freuqncy signal output module 6 includes four tunnel intermediate-freuqncy signal outputs, is connected to external DVB groups 7, the DVB
It is in audio signal and vision signal that group 7, which is responsible for that intermediate-freuqncy signal is received to and handled decoding,.
The high frequency tuner circuit uses filter capacitor 33 in the radiofrequency signal filtration module 3（3pF）+ two-way parallel coupling
The form of microstrip bandpass filter 34 is filtered to radiofrequency signal, passes through filter capacitor 33（3pF）Low-frequency interference signal is pressed down
Two-way parallel coupling microstrip bandpass filter 34 is output to after system, then carries out the processing of band logical frequency filtering and mirror image suppression.Existing
In some PLL schemes high frequency tuner circuits, to reach identical filter effect, and mutually suppress function with mirror, generally require use
The parallel wave filter of at least three ranks or hair clip wave filter, can be only achieved effective purpose.
As shown in figure 16, the high frequency tuner circuit also includes power supply circuit 8, the power supply circuit 8 include respectively with it is described in
The first regulator block, the second regulator block, the 3rd regulator block and the 4th of four tunnel intermediate-freuqncy signal output connections of frequency signal output module 6
Regulator block, first regulator block and the second regulator block are connected to the first compound diode, the 3rd regulator block and the 4th steady
Briquetting is connected to the second compound diode, first compound diode and the second compound diode respectively with the phaselocked loop frame
Structure process chip 4 connects.
In the high frequency tuner circuit during completing to receive and transmission handles radiofrequency signal, the external DVB groups 7 were both
It is the decoding end of output signal, and the power end of tuner, the regulator block are used for DVB and stable work provided to elements at different levels
Make voltage, the compound diode is used to prevent DVB reversely returns to the operating voltage that elements at different levels export from altering.
In the prior art, the operating voltage to prevent regulator block from being exported to each anterior member of high frequency tuner circuit is reversely returned
Alter, each regulator block is respectively connected with a unilateral diode, and any one-channel signal is both needed to match unidirectional two pole through regulator block output
Guan Laixiang chips at different levels and amplifier power supply；When unilateral diode is respectively configured in the regulator block, high-frequency circuit configuration
Area occupied is big, and material cost is high.
High frequency tuner circuit of the present utility model in voltage after regulator block voltage stabilizing output, voltage that compound diode is formed
Connection line input port becomes two-way by four tunnels of script, can not only cross the production cost for reducing tuner, and DVB powers
The area occupied of circuit reduces, and is significantly reduced with IF output signal crosspoint, during so as to realize pcb board layout, output port
Intermediate-freuqncy signal outlet line and DVB power supply circuit 8 be effectively isolated, improve the antijamming capability and stably of product signal itself
Property, and reduce the area of circuit, simplify circuit design.
Embodiment three
As shown in FIG. 17 and 18, a kind of tuner, including tuner cavity and the line that is arranged on the tuner cavity
Road plate, the high frequency tuner circuit described in embodiment one or embodiment two is set on the wiring board, and the tuner cavity includes
Waveguide 9, the waveguide mouth 10 and loading plate 11 being connected respectively with the both ends of waveguide 9, the wiring board are arranged on described hold
On support plate 11；The clock crystal oscillator 5 is arranged on the back side of the wiring board.
Wherein, as shown in figure 17 is the tuner with two delivery outlets 12, suitable for the height described in embodiment one
Frequency head circuit, as shown in figure 18 is the tuner with four delivery outlets 12, suitable for the tuner described in embodiment two
Circuit.
Embodiment described above only expresses embodiment of the present utility model, and its description is more specific and detailed, but simultaneously
Therefore the limitation to the utility model patent scope can not be interpreted as, as long as using equivalent substitution or the form of equivalent transformation institute
The technical scheme of acquisition, it all should fall within the scope of protection of the utility model.
Claims (10)
1. a kind of high frequency tuner circuit, including rf signal reception module, radiofrequency signal amplification module, the radiofrequency signal being sequentially connected
Filtration module, phaselocked loop framework process chip, intermediate-freuqncy signal output module, the input of the phaselocked loop framework process chip is also
It is connected with clock crystal oscillator；Characterized in that, the radiofrequency signal filtration module uses two-way parallel coupling microstrip bandpass filter.
2. high frequency tuner circuit according to claim 1, it is characterised in that the rf signal reception module includes horizontal pole
Change antenna and vertical polarized antenna.
3. high frequency tuner circuit according to claim 1, it is characterised in that the radiofrequency signal amplification module is put including one-level
Big device and two-stage amplifier.
4. high frequency tuner circuit according to claim 1, it is characterised in that the clock crystal oscillator is 25MHz crystal oscillators.
5. high frequency tuner circuit according to claim 1, it is characterised in that the two-way parallel coupling microstrip bandpass filter
Input be also associated with filter capacitor.
6. high frequency tuner circuit according to claim 1, it is characterised in that it is defeated that the intermediate frequency output module includes four road intermediate frequencies
Go out or two-way intermediate frequency exports.
7. high frequency tuner circuit according to claim 1, it is characterised in that the high frequency tuner circuit also includes power supply circuit, institute
Stating power supply circuit includes and the regulator block per the output connection of intermediate-freuqncy signal all the way in the intermediate-freuqncy signal output module, each two
Regulator block is connected to a compound diode, and the compound diode is connected with the phaselocked loop framework process chip.
8. high frequency tuner circuit according to claim 1, it is characterised in that the model of the phaselocked loop framework process chip
RT320M or RT340M.
9. a kind of tuner, it is characterised in that including tuner cavity and the wiring board being arranged on the tuner cavity, institute
State and any described high frequency tuner circuit in claim 1-8 is provided with wiring board.
10. tuner according to claim 9, it is characterised in that the clock crystal oscillator is arranged on the back of the body of the wiring board
Face.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720334418.5U CN206712931U (en) | 2017-03-31 | 2017-03-31 | A kind of high frequency tuner circuit and tuner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720334418.5U CN206712931U (en) | 2017-03-31 | 2017-03-31 | A kind of high frequency tuner circuit and tuner |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206712931U true CN206712931U (en) | 2017-12-05 |
Family
ID=60467490
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720334418.5U Expired - Fee Related CN206712931U (en) | 2017-03-31 | 2017-03-31 | A kind of high frequency tuner circuit and tuner |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206712931U (en) |
-
2017
- 2017-03-31 CN CN201720334418.5U patent/CN206712931U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171205 |