CN206411602U - A kind of CPU power supply circuits - Google Patents

A kind of CPU power supply circuits Download PDF

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Publication number
CN206411602U
CN206411602U CN201621083628.3U CN201621083628U CN206411602U CN 206411602 U CN206411602 U CN 206411602U CN 201621083628 U CN201621083628 U CN 201621083628U CN 206411602 U CN206411602 U CN 206411602U
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China
Prior art keywords
cpu
voltage
module
vrm
decoder
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Expired - Fee Related
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CN201621083628.3U
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Chinese (zh)
Inventor
冯国宝
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Zhejiang Dahua Technology Co Ltd
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Zhejiang Dahua Technology Co Ltd
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Abstract

The utility model discloses a kind of CPU power supply circuits, it is characterised in that including:Central processor CPU, power module, control module, VRM Voltage Regulator Module, bypass equipment;Power module, is connected with bypass equipment and VRM Voltage Regulator Module respectively, for being that bypass equipment and VRM Voltage Regulator Module provide the first supply voltage;The VRM Voltage Regulator Module, is connected with power module, control module and CPU respectively, for first supply voltage of control signal and the power module output exported according to control module, generates the second supply voltage that the CPU is used;Control module, for generating control signal according to CPU reference signal, and is transferred to the VRM Voltage Regulator Module by the control signal;The CPU, for providing the reference signal for the control module, and receives second supply voltage of the VRM Voltage Regulator Module output, can not be CPU and miscellaneous equipment while the problem of powering to solve a power supply.

Description

A kind of CPU power supply circuits
Technical field
The utility model embodiment is related to the design of embedded system, more particularly to a kind of CPU power supply circuits.
Background technology
Prior art is powered by power source special chip to CPU, such as x86 low power consumption CPUs, its power source special chip Typically by can support SVID (Serial Voltage Identification, series voltage identification) agreement VR (VCORE, Core voltage) controller realizes, and pass through SVID buses and realize dynamic regulation to supply voltage.In addition, for insertion The nuclear-electric power supply of CPU in formula system is also to use similar mode, such as utilizes I2C (Inter-Integrated Circuit, two lines Formula universal serial bus) realize that the dynamic of voltage is adjusted.The shortcoming of power source special chip is that output voltage purposes is single, that is, is only used for Powered for CPU.And the other equipment in electronic equipment, also need to be powered using other power supplys such as DSP, thus it is existing CPU power supply plans there is the problem of power supply can not simultaneously power for CPU and miscellaneous equipment.
Utility model content
The utility model embodiment provides a kind of CPU power supply circuits, can not be CPU and other to solve a power supply The problem of equipment is powered simultaneously.
A kind of CPU power supply circuits that the utility model embodiment is provided, including:CPU, power module, control module, voltage Adjustment module, bypass equipment;
The power module, is connected with the bypass equipment and the VRM Voltage Regulator Module respectively, for for the bypass Equipment and the VRM Voltage Regulator Module provide the first supply voltage;
The VRM Voltage Regulator Module, is connected with the power module, the control module and the CPU, for root respectively The control signal exported according to the control module and first supply voltage of power module output, generate the CPU The second supply voltage used;
The control module, for generating control signal according to the reference signal of the CPU, and the control signal is passed It is defeated by the VRM Voltage Regulator Module;
The CPU, for providing the reference signal for the control module, and receives the VRM Voltage Regulator Module output Second supply voltage.
Only one of which power module, the confession of CPU and bypass equipment in the CPU power supply circuits that the utility model embodiment is provided Power supply derives from the power module, and bypass equipment is directly powered by the power module, the output voltage warp of the power module Overvoltage adjustment module be adjusted it is adjusted after voltage, voltage after the regulation as CPU core voltage, wherein, VRM Voltage Regulator Module is that the output voltage of power module is adjusted the control signal exported according to control module, because control The input of molding block and CPU reference signal output end are connected, so control module can be generated according to CPU reference signal Control signal, it is seen then that the CPU power supply circuits that the utility model embodiment is provided can accomplish that a source is used, and be conducive to whole list The integrated optimization of plate system voltage.
Brief description of the drawings
, below will be to needed for embodiment description in order to illustrate more clearly of the technical scheme in the utility model embodiment The accompanying drawing to be used is briefly introduced, it should be apparent that, drawings in the following description are only some implementations of the present utility model Example, on the premise of not paying creative work, can also be according to these accompanying drawings for one of ordinary skill in the art Obtain other accompanying drawings.
A kind of structural representation one for CPU power supply circuits that Fig. 1 provides for the utility model embodiment;
A kind of structural representation two for CPU power supply circuits that Fig. 2 provides for the utility model embodiment.
Embodiment
In order that the purpose of this utility model, technical scheme and advantage are clearer, below in conjunction with accompanying drawing to this practicality It is new to be described in further detail, it is clear that described embodiment is only a part of embodiment of the utility model, rather than Whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making creative work Under the premise of all other embodiment for being obtained, belong to the scope of the utility model protection.
In order to realize that a power module can be for CPU and bypass equipment while the power supply circuit powered, the utility model By improving the circuit structure of power supply circuit, using the reference signal for controlling circuit to gather reflection CPU working conditions in real time, and then Control signal is generated, VRM Voltage Regulator Module enters horizontal-linearity control according to control signal to the output voltage of power module, so that raw Into the core voltage required for CPU.
To achieve these goals, Fig. 1 shows a kind of structure for CPU power supply circuits that the utility model embodiment is provided Schematic diagram.
As shown in figure 1, the power supply circuit is specifically included:CPU101, power module 102, bypass equipment 103, voltage-regulation Module 104, control module 105.Wherein, the output end U4_V0 of power module 102 and bypass equipment 103 input and voltage The input Vin2 connections of adjustment module 104 second.The input Vin and CPU101 of control module 105 reference signal output end Connection, then control module 105 is according to CPU reference signal generation control signal.The first input end of VRM Voltage Regulator Module 104 Vin1 is connected with the output end vo ut of control module 105, and VRM Voltage Regulator Module 104 is according to the Vin1 control signals received and Vin2 Core voltage needed for the supply voltage generation CPU next stage of reception, the VRM Voltage Regulator Module 104 is defeated by output end vo ut Go out to CPU.
Because VRM Voltage Regulator Module 104 can be field effect transistor metal-oxide-semiconductor, thus can be by the defeated of power module 102 Go out to hold Vout export voltage U4_VO and CPU101 current VCORE between pressure difference can drop on metal-oxide-semiconductor, realize power supply mould Block 102 is that CPU101 powers in real time.
Further, the control module includes decoder 106 and closed loop module 107, as shown in Fig. 2 the decoder 106 input is connected with the core voltage dynamic regulation EBI of the CPU, the decoder 106, described for parsing The data of CPU core voltage dynamic regulation EBI output, generate reference voltage signal;
The first input end Vin1 of the closed loop module 107 is connected with the output end U2_V0 of the decoder, the closed loop Second input Vin2 of module 107 is connected with the core voltage acquisition interface of the CPU, the output of the closed loop module 107 End is connected with the first input end Vin1 of the VRM Voltage Regulator Module 104, the closed loop module 107, for according to the decoding The reference voltage U2_V0 of the device output and real-time kernel voltage signal Vin2 of core voltage acquisition interface output, generation control Signal U3_V0 processed.
In addition, the input of VRM Voltage Regulator Module 104 receive closed loop module 107 output control signal after, to electricity The supply voltage of source module 102 enters horizontal-linearity control, such as the output of power module 102 supply voltage is 1.2V, and CPU is currently needed 1.1V is wanted, then there are 0.1V drops on voltage voltage regulating module.
Further, the VRM Voltage Regulator Module can be field effect transistor metal-oxide-semiconductor and inductance or electricity for electric power storage Hold;The metal-oxide-semiconductor is used to drop the pressure difference between first supply voltage and second supply voltage in the metal-oxide-semiconductor On, the closed loop module can be comparator.As shown in Fig. 2 when the Vin1 ends of comparator 107 are more than Vin2 ends, U3_VO is High level, then metal-oxide-semiconductor 104 is conducting state, meanwhile, electric capacity or inductance are electrically charged.Now power module 102 can pass through 104 convey electric current to CPU101.CPU101 core voltage VCORE can be raised, and VCORE_SENSE is the current electricity of the CPU Pressure, is equal to core voltage VCORE, exists as a collection feedback point.The input Vin2 meetings of comparator 107 in figure Raised with VCORE rise.When Vin2 is raised to more than Vin1, U3_VO is output as low level, and metal-oxide-semiconductor 104 can end, At this moment, electric capacity or inductance are discharged, and voltage is provided for CPU VCORE, so now CPU VCORE can gradually drop again Low, so repeatedly, until CPU VCORE is no better than the U2_VO of decoder 106, metal-oxide-semiconductor can be in and quickly open and end State, at this moment the pressure difference between the U4_VO and CPU of power module 102 VCORE can drop on metal-oxide-semiconductor 104, while power supply It can also be that other equipment supplies power supply in system that module 102, which is, realize a source and use.
Further, after the completion of the series voltage identification protocol initialization of the CPU, the CPU passes through the kernel Voltage dynamic regulation EBI is transmitted to the input of the decoder 106 and instructed, and the instruction is indicated for the CPU The data of required voltage swing, then decoder 106, are carried out specifically for the instruction for receiving the decoder input Digital-to-analogue conversion, generates reference voltage.
Specifically, CPU101 passes through core voltage dynamic regulation bus after the completion of the initialization of series voltage identification protocol The instruction of voltage needed for interface output indication CPU, this instruction can be serial binary data, and then decoder 106 connects This instruction is received, decoder 106 can be digital analog converter, and the digital analog converter is total for receiving core voltage dynamic regulation The SERIAL BINARY DATA that line interface is sent to itself, and the reference voltage that the SERIAL BINARY DATA is converted into simulating.
Further, before the series voltage identification protocol initialization of the CPU is completed, the decoder 106 is also used In generation initial reference voltage Vboot;The closed loop module 107, is additionally operable to receive the initial reference electricity of the decoder output Pressure, and according to the initial reference voltage and the CPU of collection current voltage, generate the control signal;
The VRM Voltage Regulator Module 104, is additionally operable to the supply voltage according to power module output and the control The initial supply voltage of CPU described in signal generation processed, and the output end of the VRM Voltage Regulator Module 104 connects the CPU's Core voltage input, also can be able to be in the case where CPU series voltage identification protocol is not initialized thus CPU provides initial power supply.
It should be noted that the core voltage dynamic regulation EBI can be total for SVID EBIs either I2C Line interface, the CPU enters behavior SVID protocol initializings either I2C protocol initializings, in addition, power module 102 can be For DC/DC power modules.
To sum up, only one of which power module in the CPU power supply circuits that the utility model embodiment is provided, CPU and bypass are set Standby power supply derives from the power module, and bypass equipment is directly powered by the power module, the output of the power module Voltage by VRM Voltage Regulator Module be adjusted it is adjusted after voltage, voltage after the regulation as CPU core voltage, Wherein, VRM Voltage Regulator Module is that the output voltage of power module is adjusted the control signal exported according to control module, Because the input of control module and CPU reference signal output end are connected, control module can be believed according to CPU reference Number generation control signal, it is seen then that the utility model embodiment provide CPU power supply circuits can accomplish a source use, while It is that one kind of traditional VR controller power supply modes is simplified, is conducive to the integrated optimization of whole single board system voltage.
Although having been described for preferred embodiment of the present utility model, those skilled in the art once know substantially Creative concept, then can make other change and modification to these embodiments.So, appended claims are intended to be construed to bag Include preferred embodiment and fall into having altered and changing for the utility model scope.
Obviously, those skilled in the art can carry out various changes and modification without departing from this practicality to the utility model New spirit and scope.So, if these modifications and variations of the present utility model belong to the utility model claim and Within the scope of its equivalent technologies, then the utility model is also intended to comprising including these changes and modification.

Claims (10)

1. a kind of CPU power supply circuits, it is characterised in that including:Central processor CPU, power module, control module, voltage are adjusted Save module, bypass equipment;
The power module, is connected with the bypass equipment and the VRM Voltage Regulator Module respectively, for for the bypass equipment The first supply voltage is provided with the VRM Voltage Regulator Module;
The VRM Voltage Regulator Module, is connected with the power module, the control module and the CPU, for according to institute respectively The control signal of control module output and first supply voltage of power module output are stated, the CPU is generated and uses The second supply voltage;
The control module, for generating control signal according to the reference signal of the CPU, and the control signal is transferred to The VRM Voltage Regulator Module;
The CPU, for providing the reference signal for the control module, and receives the institute of the VRM Voltage Regulator Module output State the second supply voltage.
2. circuit as claimed in claim 1, it is characterised in that the control module includes decoder and closed loop module;
The decoder is connected with the CPU, for parsing the reference signal received, and according to the reference after parsing Signal generation reference voltage;
The closed loop module is connected with the CPU and the decoder, current voltage and institute for the CPU according to collection Reference voltage is stated, the control signal is generated, the control signal is the current voltage and the reference voltage according to the CPU Between voltage difference determine low and high level state.
3. circuit as claimed in claim 2, it is characterised in that the VRM Voltage Regulator Module is field effect transistor metal-oxide-semiconductor;
The metal-oxide-semiconductor is used to drop the pressure difference between first supply voltage and second supply voltage in the metal-oxide-semiconductor On.
4. circuit as claimed in claim 3, it is characterised in that the closed loop module is comparator, when the reference voltage is big In the current voltage of the CPU, then the closed loop module generates high level, so that the metal-oxide-semiconductor is turned on;
When the reference voltage is less than the current voltage of the CPU, then the closed loop module generates low level, so that the MOS Pipe ends.
5. the circuit as described in any one of Claims 1-4, it is characterised in that the reference signal is the nuclear power from the CPU Press what dynamic regulation EBI was obtained.
6. circuit as claimed in claim 2, it is characterised in that completed when the series voltage identification protocol of the CPU is initialized Afterwards, the CPU is transmitted to the input of the decoder by core voltage dynamic regulation EBI and instructed, and the instruction is Data for indicating the voltage swing required for the CPU;
The decoder, carries out digital-to-analogue conversion specifically for the instruction for receiving the decoder input, generates reference voltage.
7. circuit as claimed in claim 6, it is characterised in that the decoder is digital analog converter, the digital analog converter For receiving the SERIAL BINARY DATA that core voltage dynamic regulation EBI is sent to itself, and by the serial binary Reference voltage of the data conversion into simulation.
8. circuit as claimed in claim 2, it is characterised in that completed when the series voltage identification protocol of the CPU is initialized Before, the decoder is additionally operable to generate initial reference voltage;
The closed loop module, is additionally operable to receive the initial reference voltage of the decoder output, and according to initial reference electricity The current voltage of pressure and the CPU of collection, generates the control signal;
The VRM Voltage Regulator Module, is additionally operable to the supply voltage and the control signal life exported according to the power module Output end into the initial supply voltage of the CPU, and the VRM Voltage Regulator Module connects the core voltage input of the CPU End.
9. circuit as claimed in claim 5, it is characterised in that the core voltage dynamic regulation EBI is that SVID buses connect Mouth either I2C EBIs.
10. circuit as claimed in claim 1, it is characterised in that the power module is DC/DC power modules.
CN201621083628.3U 2016-09-27 2016-09-27 A kind of CPU power supply circuits Expired - Fee Related CN206411602U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621083628.3U CN206411602U (en) 2016-09-27 2016-09-27 A kind of CPU power supply circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621083628.3U CN206411602U (en) 2016-09-27 2016-09-27 A kind of CPU power supply circuits

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109917704A (en) * 2019-02-25 2019-06-21 湖南长高思瑞自动化有限公司 Fault detector acquisition unit and control method based on STM32L433 low power consumption control device
CN114063757A (en) * 2021-11-24 2022-02-18 福州创实讯联信息技术有限公司 INTEL SVID power supply replacement method and device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109917704A (en) * 2019-02-25 2019-06-21 湖南长高思瑞自动化有限公司 Fault detector acquisition unit and control method based on STM32L433 low power consumption control device
CN114063757A (en) * 2021-11-24 2022-02-18 福州创实讯联信息技术有限公司 INTEL SVID power supply replacement method and device

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Granted publication date: 20170815

Termination date: 20210927