CN206401319U - A kind of array base palte, display panel and display device - Google Patents

A kind of array base palte, display panel and display device Download PDF

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Publication number
CN206401319U
CN206401319U CN201720092499.2U CN201720092499U CN206401319U CN 206401319 U CN206401319 U CN 206401319U CN 201720092499 U CN201720092499 U CN 201720092499U CN 206401319 U CN206401319 U CN 206401319U
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China
Prior art keywords
cabling
sub
connecting portion
area
array base
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Active
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CN201720092499.2U
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Chinese (zh)
Inventor
霍培荣
方业周
徐敬义
孙世成
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN201720092499.2U priority Critical patent/CN206401319U/en
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Abstract

The utility model embodiment provides a kind of array base palte, display panel and display device, is related to display technology field, it is possible to decrease positioned at the resistance of the signal line leads of fanout area.Array base palte is divided into drive circuit area, fanout area and viewing area, including:Underlay substrate, is sequentially formed at the second conductive layer, insulating barrier and the first conductive layer on underlay substrate;First conductive layer includes a plurality of first signal wire, the first sub- cabling positioned at fanout area, the second sub- cabling positioned at drive circuit area positioned at viewing area, second conductive layer includes connecting portion, first sub- cabling and the second sub- cabling are electrically connected through insulating barrier with connecting portion, first sub- cabling, the second sub- cabling and connecting portion collectively form the first signal line leads, and the first signal line leads are connected with the first signal wire;Wherein, connecting portion extends to length of the part of fanout area on the bearing of trend of the first signal wire and at least accounts for the 1/10 of width of the fanout area on the bearing of trend of the first signal wire.

Description

A kind of array base palte, display panel and display device
Technical field
The utility model is related to display technology field, more particularly to a kind of array base palte, display panel and display device.
Background technology
Array base palte is the chief component of display panel, as shown in figure 1, array base palte include drive circuit area 01, Fanout area (fanout areas) 02 and viewing area 03.Fig. 1 illustrates drive circuit area 01 in display panel, fanout area 02 and display Position relationship between the three of area 03.Wherein, viewing area 03 includes many bar insulations grid line and data wire arranged in a crossed manner, and in grid Insulating barrier is provided between line and data wire, these grid lines and data wire all extend to fanout area 02.Drive circuit area 01 can be with Including the gate driving circuit (for example, it may be multiple grid drive chips) for providing gated sweep signal for each grid line with And for providing the source electrode drive circuit (for example, it may be multiple source driving chips) of data voltage signal for each data wire.
Wherein, the signal wire positioned at viewing area 03 passes through the signal line leads positioned at fanout area 02 and drive circuit area 01 Driving chip is connected.Typically adopted with the signal line leads at the boundary position of fanout area 02 positioned at drive circuit area 01 in the prior art With the design method of wire jumper.Specifically, as shown in Fig. 2 forming connecting portion close to the position of fanout area 02 in drive circuit area 01 10, insulating barrier 30 is formed on connecting portion 10, the first sub- cabling is formed on insulating barrier 30 and positioned at the position of fanout area 02 201, form the second sub- cabling 202, the first sub- cabling 201 and the on insulating barrier 30 and positioned at the position of drive circuit area 01 Two sub- cablings 202 are connected by the via on insulating barrier 30 with connecting portion 10, the first sub- cabling 201, the second sub- cabling 202, company Socket part 10 collectively forms signal line leads.
Because the wiring of fanout area 02 is than comparatively dense, so that the narrower in width of the signal line leads of fanout area 02, because And cause the resistance for being located at the signal line leads of fanout area 02 larger, and loss of the larger then signal of resistance in transmitting procedure is just It is bigger, and then by the intensive wiring region of fanout area 02 signal can be caused to have larger loss in signal.
Utility model content
Embodiment of the present utility model provides a kind of array base palte, display panel and display device, it is possible to decrease positioned at being fanned out to The resistance of the signal line leads in area.
To reach above-mentioned purpose, embodiment of the present utility model is adopted the following technical scheme that:
First aspect is divided into drive circuit area, fanout area and viewing area there is provided a kind of array base palte, the array base palte, Array base palte includes:Underlay substrate, is sequentially formed at the second conductive layer, insulating barrier and the first conduction on the underlay substrate Layer;First conductive layer includes:A plurality of first signal wire positioned at the viewing area, the first son positioned at the fanout area are walked Line, the second sub- cabling positioned at the drive circuit area, second conductive layer include:Connecting portion, the first sub- cabling and The second sub- cabling is electrically connected through the insulating barrier with the connecting portion, and the first sub- cabling, second son are walked Line and the connecting portion collectively form the first signal line leads, and first signal line leads are connected with first signal wire; Wherein, the connecting portion extends to length of the part of the fanout area on the bearing of trend of first signal wire and at least accounted for The 1/10 of width of the fanout area on the bearing of trend of first signal wire.
It is preferred that, second conductive layer also includes:A plurality of and first signal wire positioned at the viewing area intersects And the secondary signal line of insulation.
It is preferred that, the connecting portion is extended at the boundary position of the fanout area and the viewing area.
It is preferred that, first signal wire is grid line, and the secondary signal line is data wire;Or, first signal Line is data wire, and the secondary signal line is grid line.
It is preferred that, the connecting portion exists in the border of orthographic projection of the part on the underlay substrate of the fanout area Within the border of orthographic projection of the first sub- cabling on the underlay substrate.
It is preferred that, the insulating barrier is located at the part hollow out between the described first sub- cabling and the connecting portion.
It is preferred that, along the bearing of trend of first signal wire, the end of the connecting portion and the described second sub- cabling End is concordant.
It is further preferred that the insulating barrier is located at the part hollow out between the described second sub- cabling and the connecting portion.
There is provided a kind of display panel, including above-mentioned array base palte for second aspect.
There is provided a kind of display device, including above-mentioned display panel for the third aspect.
The utility model embodiment provides a kind of array base palte, display panel and display device, because the first son of connection is walked The connecting portion of line and the second sub- cabling extends to fanout area, and connecting portion extends to part the prolonging in the first signal wire of fanout area The length on direction at least accounts for width of the fanout area on the bearing of trend of the first signal wire 1/10 is stretched, relative to existing skill Art, the utility model embodiment extends connecting portion, walks one resistance of line parallel equivalent to the first son, just can so subtract The resistance of small the first signal line leads positioned at fanout area, so that loss reduction when signal is transferred through fanout area, And then ensure that signal can be transmitted preferably to viewing area.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art Or the accompanying drawing used required in description of the prior art is briefly described, it should be apparent that, drawings in the following description are only It is some embodiments of the present utility model, for those of ordinary skill in the art, is not paying the premise of creative work Under, other accompanying drawings can also be obtained according to these accompanying drawings.
A kind of structural representation of the part for array base palte that Fig. 1 provides for prior art;
A kind of structural representation for array base palte that Fig. 2 provides for prior art;
A kind of structural representation one for array base palte that Fig. 3 (a) provides for the utility model embodiment;
A kind of structural representation two for array base palte that Fig. 3 (b) provides for the utility model embodiment;
A kind of structural representation three for array base palte that Fig. 4 provides for the utility model embodiment;
A kind of structural representation four for array base palte that Fig. 5 provides for the utility model embodiment;
A kind of structural representation five for array base palte that Fig. 6 provides for the utility model embodiment.
Reference:
01- drive circuit areas;02- fanout areas;03- viewing areas;10- connecting portions;The sub- cablings of 201- first, of 202- second Cabling;30- insulating barriers;40- underlay substrates.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment obtained, belongs to the scope of the utility model protection.
The utility model embodiment provides a kind of array base palte, and the array base palte is divided into drive circuit area 01, fanout area 02 and viewing area 03, as shown in figures 3 to 6, array base palte includes:Underlay substrate 40, is sequentially formed on underlay substrate 40 Two conductive layers, the conductive layer of insulating barrier 30 and first;First conductive layer includes:A plurality of first signal wire (this positioned at viewing area 03 Do not illustrate the first signal wire in utility model accompanying drawing 3- Fig. 6), the first sub- cabling 201 positioned at fanout area 02, positioned at driving electricity The second sub- cabling 202 in road area 01, the second conductive layer includes:Connecting portion 10, the first sub- cabling 202 of sub- cabling 201 and second is equal Electrically connected through insulating barrier 30 with connecting portion 10, the first sub- cabling 201, the second sub- cabling 202 and connecting portion 10 collectively form One signal line leads, the first signal line leads are connected with the first signal wire;Wherein, connecting portion 10 extends to the part of fanout area 02 Length on the bearing of trend of the first signal wire at least accounts for width of the fanout area 02 on the bearing of trend of the first signal wire 1/10。
It should be noted that the first, the first conductive layer includes:First signal wire, the first sub- cabling of sub- cabling 201 and second 202, because the first signal wire, the first sub- cabling 202 of sub- cabling 201 and second are located at same layer, therefore the first signal wire, first The sub- cabling 202 of sub- cabling 201 and second can be formed simultaneously, so as to simplify the manufacture craft of array base palte.
The second, the second sub- cabling 202 is connected with driving chip, and the first sub- cabling 201 is connected with the first signal wire, the first son Cabling 201, the second sub- cabling 202 and connecting portion 10 collectively form the first signal line leads, the driving exported from driving chip Signal is transmitted to the first signal wire by the first signal line leads.
3rd, connecting portion 10 can simultaneously be formed with the film layer positioned at viewing area 03, can also additionally be independently formed.
Herein, for connecting portion 10 shape without limit, as long as can be by the first sub- cabling of sub- cabling 201 and second 202 are electrically connected.It is preferred that, connecting portion 10 is shaped as strip.
4th, connecting portion 10, which extends to length of the part of fanout area 02 on the bearing of trend of the first signal wire, to be As shown in Fig. 3 (a), equal to 1/10 or such as Fig. 3 of width of the fanout area 02 on the bearing of trend of the first signal wire (b) shown in, more than the 1/10 of width of the fanout area 02 on the bearing of trend of the first signal wire.Because viewing area 03 includes multilayer Signal wire, the influence in order to avoid connecting portion 10 to signal wire in viewing area 03, thus as shown in Fig. 3 (b), connecting portion 10 is most long At the boundary position that fanout area 02 and viewing area 03 can be extended to.
In the prior art, as shown in Fig. 2 the length of connecting portion 10 is a, this practical embodiment is by taking Fig. 3 (a) as an example, connection The length in portion 10 is b, because b is more than a, and the length accordingly, with respect to prior art the utility model embodiment connecting portion 10 increases Plus.
In the prior art, reduce the method for resistance have increase metal cross-sectional area, reduce metal length, using conductance more Small metal material.Due to the length increase of connecting portion 10, so that the cross-sectional area of the first signal line leads increases, thus Resistance positioned at the first signal line leads of fanout area 02 reduces.The utility model embodiment, by positioned at the connection of fanout area 02 The length in portion 10 increases, equivalent to giving the first sub- cabling 201 resistance in parallel, so that the electricity of the first signal line leads Resistance reduces.
5th, for the first signal wire type without limiting, can be data wire or grid line, certainly It can be other types of signal wire.
The utility model embodiment provides a kind of array base palte, due to the first sub- cabling 202 of sub- cabling 201 and second of connection Connecting portion 10 extend to fanout area 02, and connecting portion 10 extends to bearing of trend of the part in the first signal wire of fanout area 02 On length at least account for the 1/10 of width of the fanout area 02 on the bearing of trend of the first signal wire, relative to prior art, this Utility model embodiment extends connecting portion 10, equivalent to giving the first sub- cabling 201 resistance in parallel, just can so subtract The resistance of small the first signal line leads positioned at fanout area 02, so that loss drop when signal is transferred through fanout area 02 It is low, and then ensure that signal can be transmitted preferably to viewing area 03.
It is preferred that, the second conductive layer also includes:Positioned at viewing area 03 it is a plurality of intersect and insulate with the first signal wire Binary signal line.
Wherein, for secondary signal line type without limiting, example, when the first signal wire is data wire, the Binary signal line can be for example grid line, and now the first signal line leads are data cable lead wire;When the first signal wire is grid line, Secondary signal line can be for example data wire, and now the first signal line leads are grid line lead.
Herein, the first signal wire and the insulation of secondary signal line, i.e. be formed with absolutely between the first signal wire and secondary signal line Edge layer, and insulating barrier 30 is also formed between the first conductive layer and the second conductive layer, between the first conductive layer and the second conductive layer Insulating barrier 30 can be between the first signal wire and secondary signal line insulating barrier formed simultaneously.
The utility model embodiment, because a plurality of and the first signal wire that the second conductive layer is also included positioned at viewing area 03 is handed over Fork and the secondary signal line of insulation, secondary signal line and connecting portion 10 are located at same layer, thus can form secondary signal line While formed connecting portion 10, so as to simplify the manufacture craft of array base palte.
It is preferred that, such as shown in Fig. 3 (b), connecting portion 10 is extended at the boundary position of fanout area 02 and viewing area 03.
Herein, connecting portion 10 extends to fanout area 02 and at the boundary position of viewing area 03, i.e., connecting portion 10 is passed through and is fanned out to Area 02.
The utility model embodiment, when connecting portion 10 is extended at boundary position of the fanout area 02 with viewing area 03, even Length of the socket part 10 in fanout area 02 reaches maximum, therefore the resistance being connected in parallel on the first sub- cabling 201 is also maximum, thus can be with Make the first signal line leads positioned at fanout area 02 resistance reduction it is more, and then can cause when signal is transmitted by being fanned out to The loss in area 02 is less.
It is preferred that, connecting portion 10 is located at the border of orthographic projection of the part of fanout area 02 on underlay substrate 40 in the first son Within the border of orthographic projection of the cabling 201 on underlay substrate 40.
Wherein, connecting portion 10 is located at the border of orthographic projection of the part on underlay substrate 40 of fanout area 02 and walked in the first son Within the border of orthographic projection of the line 201 on underlay substrate 40, i.e., connecting portion 10 is formed at first positioned at the part of fanout area 02 The underface of sub- cabling 201.
The utility model embodiment, because fanout area 02 includes a plurality of signal line leads, is fanned out to if connecting portion 10 is located at The part in area 02 is arranged on the lower section of other signal line leads, may influence whether other signal line leads, thus preferably makes company Socket part 10 is located at the border of orthographic projection of the part on underlay substrate 40 of fanout area 02 in the first sub- cabling 201 in underlay substrate Within the border of orthographic projection on 40, to avoid influence of the connecting portion 10 to other signal line leads.
It is preferred that, as shown in figure 4, insulating barrier 30 is located at the part hollow out between the first sub- cabling 201 and connecting portion 10.
Wherein, insulating barrier 30 is located at the part hollow out between the first sub- cabling 201 and connecting portion 10, i.e., in the first sub- cabling Insulating barrier 30 is not provided between 201 and connecting portion 10, the insulating barrier 30 of other positions is still set.
The utility model embodiment, is engraved because insulating barrier 30 is located at the part between the first sub- cabling 201 and connecting portion 10 Sky, therefore the contact area increase of the first sub- cabling 201 and connecting portion 10, it is thus possible to be located at the first signal line leads and be fanned out to It is more that the resistance of the part in area 02 is reduced, and then can more effectively reduce loss of the signal when transmitting to fanout area 02.
It is preferred that, as shown in figure 5, along the bearing of trend of the first signal wire, the end of connecting portion 10 and the second sub- cabling 202 End it is concordant.
Wherein, the end of connecting portion 10 is concordant with the end of the second sub- cabling 202, that is, refers to along perpendicular to underlay substrate 40 Direction, 202 end of the orthographic projection of the end of connecting portion 10 on underlay substrate 40 and the second sub- cabling is in underlay substrate 40 On orthographic projection it is overlapping.
It should be noted that along the bearing of trend of the first signal wire, connecting portion 10 includes two ends, an end extension To fanout area 02, another end extends to drive circuit area 01, due to the end and the end of the second sub- cabling 202 of connecting portion 10 Portion is concordant, and therefore, the end of connecting portion 10 is the end for referring to extending to drive circuit area 01 herein.Along the first signal wire Bearing of trend, the second sub- cabling 202 includes two ends, an end close to fanout area 02, an end away from fanout area 02, In order to ensure the second sub- cabling 202 is electrically connected with connecting portion 10, the end of the second sub- cabling 202 is referred to away from fanout area herein 02 end.
The utility model embodiment, due to the bearing of trend along the first signal wire, the end of connecting portion 10 is walked with the second son The end of line 202 is concordant, therefore compared with the prior art, length of the connecting portion 10 in drive circuit area 01 increases, equivalent to position The second sub- cabling 202 in drive circuit area 01 resistance in parallel, just can so reduce positioned at drive circuit area 01 The resistance of first signal line leads, so that loss reduction when signal is transferred through drive circuit area 01.
It is preferred that, as shown in fig. 6, insulating barrier 30 is located at the part hollow out between the second sub- cabling 202 and connecting portion 10.
Wherein, insulating barrier 30 is located at the part hollow out between the second sub- cabling 202 and connecting portion 10, i.e., in the second sub- cabling Insulating barrier 30 is not provided between 202 and connecting portion 10, the insulating barrier 30 of other positions is still set.
The utility model embodiment, is engraved because insulating barrier 30 is located at the part between the second sub- cabling 202 and connecting portion 10 Sky, therefore the contact area increase of the second sub- cabling 202 and connecting portion 10, it is thus possible to the first signal line leads is located at driving It is more that the resistance of the part of circuit region 01 is reduced, and then can more effectively reduce signal in the transmitting procedure of drive circuit area 01 In loss.
The utility model embodiment provides a kind of display panel, including above-mentioned array base palte.
Wherein, for display panel type without limit, display panel can be liquid crystal display panel (Liquid Crystal Display, abbreviation LCD) or organic electroluminescent diode display panel (Organic Light Emitting Diode, abbreviation OLED).
When display panel is liquid crystal display panel, liquid crystal display panel includes array base palte, to box substrate and filling In array base palte and to the liquid crystal layer between box substrate, wherein, colored film layer can be arranged on array base palte, can also be set On to box substrate, array base palte includes thin film transistor (TFT) and pixel electrode, and thin film transistor (TFT) includes source electrode, drain electrode and active Layer, drain electrode is electrically connected with pixel electrode;When display panel is organic electroluminescent diode display panel, organic electroluminescent Diode display panel includes array base palte and package substrate, and array base palte includes negative electrode, organic material functional layer and anode, battle array Row substrate can also include thin film transistor (TFT), and the drain electrode of thin film transistor (TFT) is electrically connected with anode.
The utility model embodiment provides a kind of display panel, because display panel includes array base palte, and array base palte The connecting portion 10 of the first sub- cabling 202 of sub- cabling 201 and second of upper connection extends to fanout area 02, and connecting portion 10 extends to fan Go out length of the part in area 02 on the bearing of trend of the first signal wire and at least account for fanout area 02 in the extension side of the first signal wire The 1/10 of upward width, relative to prior art, the utility model embodiment extends connecting portion 10, equivalent to the first son The resistance in parallel of cabling 201, just can so reduce the resistance of the first signal line leads positioned at fanout area 02, so as to Loss reduction during make it that signal is transferred through fanout area 02, and then ensure that signal can be transmitted preferably to viewing area 03 It is interior.
The utility model embodiment also provides a kind of display device, including above-mentioned display panel.
No matter the display device that the utility model embodiment is provided can be display motion (for example, video) or fixed (for example, rest image) no matter and the image of word or picture any device.More particularly, it is contemplated that the embodiment It may be implemented in a variety of electronic installations or associated with a variety of electronic installations, a variety of electronic installations are such as (but not limited to) moved Phone, wireless device, personal digital assistant (PDA), hand-held or portable computer, gps receiver/omniselector, camera, MP3 player, video camera, game console, wrist-watch, clock, calculator, televimonitor, flat-panel monitor, computer monitor Device, automotive displays (for example, odometer display etc.), navigator, Cockpit Control Unit and/or display, camera view it is aobvious Show the device display of rear view camera (for example, in vehicle), electronic photographs, electronic bill-board or direction board, projecting apparatus, building knot Structure, packaging and aesthetic structures (for example, for display of the image of a jewelry) etc., can also be the display parts such as display panel Part.
The utility model embodiment provides a kind of display device, because display device includes display panel, display panel bag Array base palte is included, and the connecting portion 10 that the first sub- cabling 202 of sub- cabling 201 and second is connected on array base palte extends to fanout area 02, and connecting portion 10 extends to length of the part of fanout area 02 on the bearing of trend of the first signal wire and at least accounts for fanout area 02 1/10 of width on the bearing of trend of the first signal wire, relative to prior art, the utility model embodiment is by connecting portion 10 extensions, equivalent to giving the first sub- cabling 201 resistance in parallel, just can so reduce the first letter positioned at fanout area 02 The resistance of number line lead, so that loss reduction when signal is transferred through fanout area 02, and then ensure that signal can be with Preferably transmit to viewing area 03.
It is described above, embodiment only of the present utility model, but protection domain of the present utility model do not limit to In this, any one skilled in the art can readily occur in change in the technical scope that the utility model is disclosed Or replace, it should all cover within protection domain of the present utility model.Therefore, protection domain of the present utility model should be with the power The protection domain that profit is required is defined.

Claims (10)

1. a kind of array base palte, the array base palte is divided into drive circuit area, fanout area and viewing area, it is characterised in that including: Underlay substrate, is sequentially formed at the second conductive layer, insulating barrier and the first conductive layer on the underlay substrate;
First conductive layer includes:A plurality of first signal wire positioned at the viewing area, the first son positioned at the fanout area Cabling, the second sub- cabling positioned at the drive circuit area,
Second conductive layer includes:Connecting portion, the first sub- cabling and the second sub- cabling run through the insulating barrier Electrically connected with the connecting portion, the first sub- cabling, the second sub- cabling and the connecting portion collectively form the first signal Line lead, first signal line leads are connected with first signal wire;
Wherein, the connecting portion extends to length of the part of the fanout area on the bearing of trend of first signal wire extremely The 1/10 of width of the fanout area on the bearing of trend of first signal wire is accounted for less.
2. array base palte according to claim 1, it is characterised in that second conductive layer also includes:Positioned at described aobvious Show a plurality of secondary signal line for intersecting and insulating with first signal wire in area.
3. array base palte according to claim 1, it is characterised in that the connecting portion extend to the fanout area with it is described At the boundary position of viewing area.
4. array base palte according to claim 2, it is characterised in that first signal wire is grid line, second letter Number line is data wire;
Or, first signal wire is data wire, and the secondary signal line is grid line.
5. array base palte according to claim 1, it is characterised in that the connecting portion exists in the part of the fanout area The border of orthographic projection of the border of orthographic projection on the underlay substrate in the described first sub- cabling on the underlay substrate with It is interior.
6. array base palte according to claim 1, it is characterised in that the insulating barrier is located at the described first sub- cabling and institute State the part hollow out between connecting portion.
7. array base palte according to claim 1, it is characterised in that described along the bearing of trend of first signal wire The end of connecting portion is concordant with the end of the described second sub- cabling.
8. array base palte according to claim 7, it is characterised in that the insulating barrier is located at the described second sub- cabling and institute State the part hollow out between connecting portion.
9. a kind of display panel, it is characterised in that including the array base palte described in claim any one of 1-8.
10. a kind of display device, it is characterised in that including the display panel described in claim 9.
CN201720092499.2U 2017-01-22 2017-01-22 A kind of array base palte, display panel and display device Active CN206401319U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109976056A (en) * 2019-04-08 2019-07-05 京东方科技集团股份有限公司 Array substrate, its production method, display panel and display device
CN111402754A (en) * 2020-05-20 2020-07-10 上海天马有机发光显示技术有限公司 Display panel and display device
CN112151593A (en) * 2020-10-23 2020-12-29 京东方科技集团股份有限公司 Display panel, test method thereof and display device
CN112180644A (en) * 2019-07-04 2021-01-05 京东方科技集团股份有限公司 Array substrate and display device
CN114067709A (en) * 2020-07-31 2022-02-18 深超光电(深圳)有限公司 Conductivity test structure, thin film transistor array substrate and display panel

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109976056A (en) * 2019-04-08 2019-07-05 京东方科技集团股份有限公司 Array substrate, its production method, display panel and display device
CN109976056B (en) * 2019-04-08 2023-04-14 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof, display panel and display device
CN112180644A (en) * 2019-07-04 2021-01-05 京东方科技集团股份有限公司 Array substrate and display device
CN112180644B (en) * 2019-07-04 2023-08-04 京东方科技集团股份有限公司 Array substrate and display device
CN111402754A (en) * 2020-05-20 2020-07-10 上海天马有机发光显示技术有限公司 Display panel and display device
CN114067709A (en) * 2020-07-31 2022-02-18 深超光电(深圳)有限公司 Conductivity test structure, thin film transistor array substrate and display panel
CN114067709B (en) * 2020-07-31 2023-11-28 深超光电(深圳)有限公司 Conductivity test structure, thin film transistor array substrate and display panel
CN112151593A (en) * 2020-10-23 2020-12-29 京东方科技集团股份有限公司 Display panel, test method thereof and display device

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