CN206389374U - PTP precision time protocol time service modules in electric power time service - Google Patents

Abstract

The utility model is related to the PTP precision time protocol time service modules in a kind of electric power time service, including main control chip, timestamp PHY chip, JTAG debugs chip, transformer, status indicator lamp, clock, indicator lamp, the temporal information that ARM chips pass through RS232 interface main control units, by drawing time second information after resolving, after main control unit sends 1PPS, ARM chips stab information write time time second in PHY chip, synchronous local zone time source, clock provides operation clock to ARM chips respectively, the RMII clock sources of communication are provided to timestamp PHY chip, utilize the operation and the setting of breakpoint of JTAG debugging routines, analysis in real time, the output Debugging message of ARM chips is obtained by PC, when ARM runs PTP protocol operation task, timestamp PHY chip is sent out protocol massages by transformer+RJ45 interfaces.Have the technical effect that and reach nanosecond class precision.

Description

PTP precision time protocol time service modules in electric power time service

Technical field

The utility model is related to the time service module in a kind of electric power time service, the PTP essences in more particularly to a kind of electric power time service Quasi- time protocol time service module.

Background technology

Present many systems all be unable to do without the requirement of time synchronized, such as T ＆ M system, power system, communication System, industrial automation and distributed system etc., and the development of expansion and the decentralised control with system scope, each control section The time synchronized of point becomes more and more important, especially power system, due to the popularity and dispersiveness of territorial scope, this requirement The action of each equipment carries out just can guarantee that system coordination is orderly according to unified sequential and beat in system.

Current power system uses gps clock system to synchronize and time service substantially, and this mode has certain peace Full hidden danger, and the upgrading in later stage becomes highly difficult and costliness.Although the Network Time Protocol of use can enter to the time of system Row is synchronous, but the accuracy error of Network Time Protocol reaches the ability of Millisecond, and the field of Microsecond grade or higher precision is required for those Conjunction cannot just be used.And the appearance of PTP times accurate agreement, to realize that it is feasible that the high-precision requirement of particular place is provided Approach.

Its cardinal principle is that time of multiple nodes in network is synchronized by a synchronous signal cycle, By the combination of software and hardware, significantly larger than NTP synchronization accuracy can be obtained.PTP synchronization accuracy and the realization side of PTP protocol Formula has much relations, if realized using pure software, and its precision may be with NTP almost, if existed using hardware mode The data Layer increase timestamp of procotol, such as network hardware layer is using the PHY for supporting IEEE1588 agreements（DP83640）, when Between stab and generate in real time, then timing tracking accuracy can be in Microsecond grade, and uses devices at full hardware to realize, network is realized using FPGA Protocol stack and PTP protocol, its precision can reach nanosecond.

The content of the invention

In view of the problem of prior art is present, the present invention provides the PTP precision time protocol time services in a kind of electric power time service Module, using PTP times accurate agreement, by the combination of software and hardware, reaches nanosecond class precision, and concrete technical scheme is, a kind of PTP precision time protocol time service modules in electric power time service, including main control chip, timestamp PHY chip, JTAG debugging chip, Transformer, status indicator lamp, clock, indicator lamp, it is characterised in that：Main control chip uses MK60FN1M0VLQ12R chips, the core Piece is integrated with the mac controller of CPU, RAM, NORFLASH and network, and timestamp PHY chip uses DP83640 chips, and circuit connects It is connected in, main control chip unidirectionally connects indicator lamp, is bi-directionally connected JTAG debugging chip, timestamp PHY chip, timestamp PHY respectively Chip is bi-directionally connected transformer, unidirectional connection status indicator lamp, and unidirectional connection JTAG debugs chip, main control chip to clock respectively.

It is of the present utility model to have the technical effect that, using PTP times accurate agreement, by the combination of software and hardware, reach nanosecond Class precision.

Brief description of the drawings

Fig. 1 is operation principle block diagram of the present utility model；

Fig. 2 is electrical schematic diagram of the present utility model；

Fig. 3 is Fig. 2 continuous figure；

Fig. 4 is system initiating task flow chart of the present utility model；

Fig. 5 is LED lamp flicker mission flow diagram of the present utility model；

Fig. 6 is the reception mission flow diagram of serial ports of the present utility model；

Fig. 7 is the response mission flow diagram of pulse per second (PPS) of the present utility model；

Fig. 8 is PTP protocol operation task flow chart of the present utility model.

Embodiment

It is described further below in conjunction with accompanying drawing,

As shown in Figure 1, 2, 3, the PTP precision time protocol time service modules in a kind of electric power time service, including main control chip, when Between stamp PHY chip, JTAG debugging chip, transformer, status indicator lamp, clock, indicator lamp, main control chip uses Freescale The MK60FN1M0VLQ12R chips of company, the integrated chip CPU, RAM, NORFLASH and network mac controller, time The DP83640 chips that PHY chip uses TI companies are stabbed, circuit is connected as, main control chip unidirectionally connects indicator lamp, respectively two-way company JTAG debugging chip, timestamp PHY chip are connect, timestamp PHY chip is bi-directionally connected transformer, unidirectional connection status indicator lamp, Unidirectional connection JTAG debugs chip, main control chip to clock respectively.

As shown in Fig. 4,5,6,7,8, whole PTP network services are provided with the initiating task of system, the flicker of indicator lamp altogether Task, the reception task of serial ports 1, the response task of pulse per second (PPS), five tasks of PTP protocol operation task, using MQX operating systems The running status between each task is scheduled, implementation method comprises the following steps,

1st, the initiating task of system：System is initialized, by following task creation and operation, this is then destroyed Business, creates network parameter configuration task successively, and horse race lamp task 1,2 tasks, Message Queuing's task, semaphore and exclusive variable are appointed Business, netinit operation task, 1PPS processing tasks, serial ports receives task, PTP communication information tasks；

2nd, the flicker task of indicator lamp：The task is run all the time, it is therefore an objective to the running situation of test system,

2-1, initiating port,

2-2, judge whether 1=true, it is no, terminate, be, port level upset carries out next step,

2-3, delay,

2-4, return to step 2-2；

3rd, serial ports receives task：Serial ports UAR1 reception task, receives the data that send over of main control unit, and by its turn Change second data into,

3-1, opening serial ports UAR1,

3-2, judge whether 1=true, it is no, terminate, be, carry out next step,

3-3, reading data,

3-4, judge whether prefix=frame head, no, return to step 3-2 is to carry out next step,

3-5, reading agreement remaining data,

3-6, judge whether data are effective, no, return to step 3-2 is to carry out next step,

3-7, set time significance bit be it is true,

3-8, according to time precision data PTP message datas domains is write,

3-9, temporally information are converted into second data information, and time change is effectively true；

4th, the response task of pulse per second (PPS), catches the rising edge of pulse per second (PPS), second data information then is write into PHY chip, more The generation of new timestamp, the highest priority of the task, the fractional part to second data is that nsec portion is reset, and improves PTP pairs When precision,

4-1, establishment semaphore,

4-2, initiating port,

4-3, judge whether 1=true, it is no, terminate, be, carry out next step,

4-4, the release of outstanding message amount,

4-5, judge whether that time change is effective, no, return to step 4-3 is to carry out next step,

4-6, by second data information write PTP, synchronous local information source,

4-7, return to step 4-3；

5th, PTP protocol operation task, runs PTP protocol, according to the different processing routine of the change operation of running status,

5-1, to PTP protocol carry out default setting,

5-2, to PTP protocol software environment carry out Initialize installation,

5-3, setting PTP states are initialization,

5-4, judge whether PTP states are initialization, it is no, next step is carried out, is, BMC algorithms, change operation shape is run State, carries out next step,

5-5, determine whether Faulty, it is no, next step is carried out, is, change running status is simultaneously changed into init state, Terminate,

5-6, determine whether Listening, Passive, Slave, Uncalibrated, it is no, next step is carried out, is Operation receiving network data is simultaneously analyzed according to data type is received, and is terminated,

5-7, determine whether Master, no, end is to carry out next step,

5-8, all kinds message sent according to the size of time interval respectively,

5-9, operation receiving network data, are analyzed according to data type is received.

Operation principle

On the ARM chips of main control chip after electricity, indicator lamp is lighted, indicates working properly, can be sent out in main control unit Send after temporal information, ARM chips are by the temporal informations of RS232 interface main control units, by drawing the time second after resolving Information, after main control chip sends 1PPS, ARM chips write time second information in DP83640 chips, synchronous local zone time Source, clock provide operation clock to ARM chips respectively, provide the RMII clock sources of communication to DP83640, it is possible to use JTAG is adjusted The operation of examination program and the setting of breakpoint, in real time analysis；The output Debugging message of ARM chips is obtained by PC, is easy to program Outwards export some system informations in operation, ARM run PTP protocol operation task when, DP83640 by transformer+ RJ45 interfaces are sent out protocol massages.

The module can outwards export the synchronization statements and notice sentence of PTP protocol, due to using PTP protocol, can obtain To higher synchronization accuracy.

Claims (1)

1. the PTP precision time protocol time service modules in a kind of electric power time service, including main control chip, timestamp PHY chip, JTAG Debug chip, transformer, status indicator lamp, clock, indicator lamp, it is characterised in that：Main control chip uses MK60FN1M0VLQ12R Chip, integrated chip CPU, RAM, NORFLASH and network mac controller, timestamp PHY chip uses DP83640 cores Piece, circuit is connected as, and main control chip unidirectionally connects indicator lamp, is bi-directionally connected JTAG debugging chip, timestamp PHY chip respectively, Timestamp PHY chip is bi-directionally connected transformer, unidirectional connection status indicator lamp, clock respectively unidirectional connection JTAG debugging chip, Main control chip.