CN206282839U - A kind of thin array plastic package - Google Patents
A kind of thin array plastic package Download PDFInfo
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- CN206282839U CN206282839U CN201621300698.XU CN201621300698U CN206282839U CN 206282839 U CN206282839 U CN 206282839U CN 201621300698 U CN201621300698 U CN 201621300698U CN 206282839 U CN206282839 U CN 206282839U
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- carrier
- chip
- bond pads
- wire
- wire bond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
A kind of thin array plastic package, including carrier, wire bond pads, ground loop, IC chip, bonding wire, packaging part and soldered ball, the centre position of the carrier is chip bond regions DAP, the chip bond regions DAP sets IC chip, the edge of the carrier is provided with ground loop, and ground loop is made up of the multiple layer metal being superimposed upon on carrier；The wire bond pads are arranged in carrier surrounding in multiple rows of array way, and the wire bond pads are made up of multiple layer metal；The IC chip is electrically connected with wire bond pads and ground loop by bonding wire；The packaging body is used to coat a part for IC chip, bonding wire and wire bond pads and carrier, and the wherein bottom of carrier leaks outside outside packaging body；The soldered ball is arranged at the bottom of packaging body, and is connected with wire bond pads.The utility model is simple and compact for structure, and relative to the IC package of the pin leakage such as SSOP, QFP, the erection space and encapsulation volume required for thin array plastic package are smaller.
Description
Technical field
The utility model belongs to electronic device manufacture technical field of semiconductor encapsulation, and in particular to a kind of thin array plastics
Packaging part.
Background technology
The encapsulation of integrated circuit just develops towards short, small, light, thin, multiway, high density direction, and its packing forms is by passing
The direction that jack encapsulation (THP) of system installs (SMP) towards surface is developed.DIP, SOIC, QFP, PLCC, PGA, BGA, CSP are each
Plant packing forms to emerge in an endless stream, with the development of information technology, encapsulating of the semicon industry to circuit requires more and more higher.Tradition
Using lead frame as support and the packing forms of conducting structure, because there is lead frame pin, dowel etc. to connect knot
Structure, causes the semiconductor devices stray inductance parameter using lead-frame packages very big.Such as SOP encapsulation, its pin is in wing gull
Outside packaging body, not only stray inductance parameter is very big, and erection space of the packaging part on substrate is also very big for leakage.
Additionally, performance and the current demand to high frequency characteristics in order to improve semiconductor chip, manufacture is with good frequency
The semiconductor packages of characteristic becomes more and more important.
Utility model content
Technical problem to be solved in the utility model is directed to shortcoming of the prior art and provides a kind of simple structure
Compact thin array plastic package.
Adopted the following technical scheme that to solve technical problem of the present utility model：
A kind of thin array plastic package, including carrier, wire bond pads, ground loop, IC chip, bonding wire, encapsulation
Body and soldered ball, the carrier are made up of Au, Ni, Cu three-layer metal layer successively from bottom, and the centre position of the carrier is chip
Bond regions DAP, the chip bond regions DAP are provided with IC chip, and the edge of the carrier is provided with ground loop, the ground loop
It is made up of the multiple layer metal being superimposed upon on carrier；The wire bond pads are arranged in carrier surrounding, institute in multiple rows of array way
Wire bond pads are stated to be made up of multiple layer metal；The IC chip is electrically connected with wire bond pads and is connect by bonding wire
Ground ring；The packaging body is used to coat a part for IC chip, bonding wire and wire bond pads and carrier, the wherein bottom of carrier
Leakage is outside packaging body；The soldered ball is arranged at the bottom of packaging body, and is connected with wire bond pads.
The metal layer A u of the carrier is 1-2 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm.
The ground loop is made up of metal level Ni and Au successively from bottom, and wherein metal level Ni is 4 μm, and metal layer A u is
1-2μm。
The wire bond pads are made up of metal layer A u, Ni, Cu, Ni, Au successively since bottom, wherein every layer of metal
Layer Au is 1-2 μm, and every layer of metal level Ni is 4 μm, and metal level Cu is 79 μm.
The bonding wire is gold thread or copper cash or silver alloy wire.
The production method of above-mentioned thin array plastic package, its step is as follows：
Step one：Prepare a bronze medal carrier strip first and one layer of photoetching resist of plating is coated on copper carrier strip, by photoetching
Technique forms the graph window of needs over the barrier layer, and the copper carrier strip of the window's position is exposed；Then in the window of copper carrier strip
Position plating multiple layers metal, plating removes plating barrier layer after completing, form carrier, wire bond pads and ground loop；Institute
State carrier plating Au, Ni, Cu three-layer metal is stacked gradually by bottom and constitute, wherein metal layer A u is 1-2 μm, and metal level Ni is
4 μm, metal level Cu is 79 μm；The ground loop is stacked gradually electroplated Ni by bottom and Au two metal layers are constituted, wherein metal
Layer Ni is 4 μm, and metal layer A u is 1-2 μm；The wire bond pads stack gradually plating Au, Ni, Cu, Ni, Au five by bottom
Layer metal is constituted, wherein every layer of metal layer A u is 1-2 μm, every layer of metal level Ni is 4 μm, and metal level Cu is 79 μm；
Step 2：IC chip is bonded in the chip bond regions DAP of carrier using standard material, then ball bonding is used with bonding wire
Technique complete wire bonding, then complete bonding after copper carrier strip assembling surface on carry out it is molded, complete to IC chip,
Bonding wire and wire bond pads, the molding encapsulation of carrier；
Step 3：After molding, the copper carrier strip of package bottom is removed with the method for chemical etching；
Step 4：Soldered ball is aligned the bottom that wire bond pads are installed to packaging body one by one, whole moulding is brought into
Row cutting, isolates single IC package product.
One layer 7-21 μm of Sn first is electroplated in the bottom of wire bond pads in ball bond, then using Reflow Soldering
Mode is combined soldered ball with wire bond pads.
A kind of thin array plastic package, the packaging part includes carrier, wire bond pads, IC chip, bonding wire, envelope
Dress body and soldered ball, the carrier are made up of Au, Ni, Cu three-layer metal layer successively from bottom, and the centre position of the carrier is core
Piece bond regions DAP, the chip bond regions DAP are provided with IC chip, and the wire bond pads are arranged in multiple rows of array way
In carrier surrounding, the wire bond pads are made up of multiple layer metal；The IC chip is electrically connected with drawing by bonding wire
Line bonding pad；The packaging body is used to coat a part for IC chip, bonding wire and wire bond pads and carrier, wherein carrier
Bottom leak outside outside packaging body；The soldered ball is arranged at the bottom of packaging body, and is connected with wire bond pads.
The beneficial effects of the utility model are simple and compact for structure, and the IC relative to the pin leakage such as SSOP, QFP is sealed
Dress, the erection space and encapsulation volume required for thin array plastic package is smaller.Same SSOP, QFP etc. use lead frame
Compared as the packing forms of chip bearing, conductive structure, although this encapsulation is employed and lead frame in encapsulation process
The copper carrier strip of phase same material, but do not have copper carrier strip in final encapsulating structure, copper carrier strip is intended only as a formation carrier
With the intermediate tool of wire bond pads.Simultaneously as bonding line is shorter and without outer pin so that this packaging part has excellent
Electric property.
Brief description of the drawings
Fig. 1 is the generalized section of the utility model thin array plastic package；
Fig. 2 is the generalized section that the utility model plating completes copper carrier strip surface metal-layer；
Fig. 3 is the generalized section of packaging part after the utility model molding；
Fig. 4 is the generalized section that the utility model removes packaging part after copper carrier strip；
Fig. 5 is the schematic diagram of the packaging part that the utility model is mounted with after soldered ball；
Fig. 6 is the generalized section of the thin array plastic package that the utility model removes ground loop；
In accompanying drawing：22：Carrier；21：Wire bond pads；23：Ground loop；10：IC chip； 11：Packaging body；12：Weldering
Line；31：Soldered ball；20：Copper carrier strip.
Specific embodiment
In order that technical problem, technical scheme and beneficial effect that the utility model is solved become more apparent, below
In conjunction with the drawings and the specific embodiments, the utility model is further elaborated.
As shown in figure 1, a kind of thin array plastic package includes：Carrier 22, wire bond pads 21, ground loop 23,
IC chip 10, bonding wire 12, packaging body 11 and soldered ball 31.
Carrier 22 is made up of multiple layer metal, and metal level can be successively Au, Ni, Cu, wherein metal by carrier base
Layer Au is 1-2 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm.The centre position of carrier 22 is chip bond regions（DAP）,
The marginal position of carrier 22 is ground loop 23, and ground loop 23 can be constituted by being superimposed multiple layer metal on carrier, ground loop 23
It is made up of metal level Ni and Au successively from bottom, wherein metal level Ni is 4 μm, metal layer A u is 1-2 μm.Wire bond pads
21 are arranged in the surrounding of carrier 22 in array way, and wire bond pads 21 are configured to two row's array arrangements；Wire bond pads
21 are made up of multiple layer metal, and metal level can be successively Au, Ni, Cu, Ni, Au by bottom, wherein two metal layers Au, often
Layer is 1-2 μm, two metal layers Ni, and every layer is 4 μm, and metal level Cu is 79 μm.It may be noted that not using the feelings of bonding wire more long
Under condition, wire bond pads 21 can be arranged to single row or multiple rows（≥3）The mode of row periphery arrangement.
IC chip 10 is arranged at the chip bond regions of the upper surface of carrier 22（DAP）, and be electrically connected at by bonding wire 12 and draw
Line bonding pad 21 and ground loop 23, bonding wire 12 can be gold thread, copper cash or silver alloy wire, and IC chip 10 can use bonding die
Glue, glue film etc. are arranged on chip bond regions（DAP）.The cladding of packaging body 11 IC chip 10, bonding wire 12 and wire bond pads
21st, a part for carrier 22, the bottom of carrier 22 leaks outside outside packaging body, can be as the radiating area of packaging part.Packaging body
11 may include phenolic group resin, epoxy, silicone or other appropriate coverings.Packaging body 11 also may include suitably
Filler, the e.g. silica of powdery.Using several encapsulation technologies formed packaging body 11, e.g. compression forming,
Injection moulding.
Soldered ball 31 is arranged at the bottom of packaging body 11, and is connected with wire bond pads 21, for realize packaging part with
The electrical connection of external circuit.Soldered ball 31 can be realized by modes such as Reflow Solderings and bonding welding pad 21 combination.
Design requirement ground loop according to packaging part can also selectivity removal.Form a kind of thin array Plastic Package
Part, packaging part includes carrier 22, wire bond pads 21, IC chip 10, bonding wire 12, packaging body 11 and soldered ball 31, the carrier
22 are made up of Au, Ni, Cu three-layer metal layer successively from bottom, and the centre position of carrier 22 is chip bond regions DAP, and chip is bonded
Area DAP is provided with IC chip 10, and the wire bond pads 21 are arranged in the surrounding of carrier 22, wire bonding in multiple rows of array way
Pad 21 is made up of multiple layer metal；IC chip 10 is electrically connected with wire bond pads 21 by bonding wire 12；Packaging body 11
The bottom leakage of a part for coating IC chip 10, bonding wire 12 and wire bond pads 21 and carrier 22, wherein carrier 22
Outside packaging body 11；Soldered ball 31 is arranged at the bottom of packaging body 11, and is connected with wire bond pads 21.
Embodiment 1
A kind of production method of thin array plastic package, its step is as follows：
Step one：Prepare a bronze medal carrier strip 20 first and one layer of barrier layer of plating is coated on copper carrier strip 20（Photoetching is against corrosion
Agent）, forming the graph window of needs over the barrier layer by photoetching process, the copper carrier strip 20 of the window's position is exposed；Then
In the window's position plating multiple layers metal of copper carrier strip 20, plating removes plating barrier layer after completing, form carrier 22, lead key
Close pad 21 and ground loop 23.Wherein carrier is stacked gradually plating Au, Ni, Cu three-layer metal by bottom and constituted, wherein metal level
Au is 2 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm；Ground loop stacks gradually electroplated Ni and Au double layer of metal by bottom
Layer is constituted, and wherein metal level Ni is 4 μm, and metal layer A u is 2 μm；The wire bond pads stack gradually plating by bottom
Five layers of metal of Au, Ni, Cu, Ni, Au are constituted, wherein every layer of metal layer A u is 2 μm, every layer of metal level Ni is 4 μm, metal level Cu
It is 79 μm；
Step 2：IC chip 10 is bonded in the chip bond regions of carrier 22 using standard material（DAP）, then with bonding wire 12
Wire bonding is completed using ball-bonding process, is then carried out using compression forming on the assembling of copper carrier strip 20 surface after bonding is completed
It is molded, complete to IC chip 10, bonding wire 12 and wire bond pads 21, the encapsulating of carrier 22；
Step 3：As shown in figure 4, after molding, the copper carrier strip 20 of the bottom of packaging body 11 is gone with the method for chemical etching
Remove.After the removal of copper carrier strip 20, Au layers of the bottom of wire bond pads 21 acts as barrier layer, and etching will stop.This
When, the bottom of carrier 22 leaks outside outside packaging body, can be as the radiating area of packaging part；
Step 4：Soldered ball 31 is aligned the bottom that wire bond pads 21 are installed to packaging body 11 one by one.First exist during welding
One layer 7 μm of Sn is electroplated in the bottom of wire bond pads 21, and soldered ball 31 and wire bonding are then realized by the way of Reflow Soldering
The combination of pad 21.Finally, whole moulding band is cut, separation forms single IC package product.
Embodiment 2
A kind of production method of thin array plastic package, its step is as follows：
Step one：Prepare a bronze medal carrier strip 20 first and one layer of barrier layer of plating is coated on copper carrier strip 20（Photoetching is against corrosion
Agent）, forming the graph window of needs over the barrier layer by photoetching process, the copper carrier strip 20 of the window's position is exposed；Then
In the window's position plating multiple layers metal of copper carrier strip 20, plating removes plating barrier layer after completing, form carrier 22, lead key
Close pad 21 and ground loop 23.Wherein carrier, wire bond pads stack gradually five layers of Au, Ni, Cu, Ni, Au of plating by bottom
Metal is constituted, and wherein metal layer A u is 1 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm；
Step 2：IC chip 10 is bonded in the chip bond regions of carrier 22 using standard material（DAP）, then with bonding wire 12
Wire bonding is completed using ball-bonding process, is then carried out using injection moulding on the assembling of copper carrier strip 20 surface after bonding is completed
It is molded, complete to IC chip 10, bonding wire 12 and wire bond pads 21, the encapsulating of carrier 22.
Step 3：After molding, the copper carrier strip 20 of the bottom of packaging body 11 is removed with the method for chemical etching.In copper carrier strip
After 20 removals, Au layers of the bottom of wire bond pads 21 acts as barrier layer, and etching will stop.Now, carrier 22
Bottom leaks outside outside packaging body, can be as the radiating area of packaging part；
Step 4：Soldered ball 31 is aligned the bottom that wire bond pads 21 are installed to packaging body 11 one by one.First exist during welding
One layer 21 μm of Sn is electroplated in the bottom of wire bond pads 21, and soldered ball 31 and wire bonding are then realized by the way of Reflow Soldering
The combination of pad 21.Finally, whole moulding band is cut, separation forms single IC package product.
Embodiment 3
A kind of production method of thin array plastic package, its step is as follows：
Step one：Prepare a bronze medal carrier strip 20 first and one layer of barrier layer of plating is coated on copper carrier strip 20（Photoetching is against corrosion
Agent）, forming the graph window of needs over the barrier layer by photoetching process, the copper carrier strip 20 of the window's position is exposed；Then
In the window's position plating multiple layers metal of copper carrier strip 20, plating removes plating barrier layer after completing, form carrier 22, lead key
Close pad 21.Wherein carrier, wire bond pads are stacked gradually plating five layers of metal of Au, Ni, Cu, Ni, Au by bottom and constituted,
Wherein metal layer A u is 1 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm；
Step 2：IC chip 10 is bonded in the chip bond regions of carrier 22 using standard material（DAP）, then with bonding wire 12
Wire bonding is completed using ball-bonding process, is then carried out using injection moulding on the assembling of copper carrier strip 20 surface after bonding is completed
It is molded, complete to IC chip 10, bonding wire 12 and wire bond pads 21, the encapsulating of carrier 22.
Step 3：After molding, the copper carrier strip 20 of the bottom of packaging body 11 is removed with the method for chemical etching.In copper carrier strip
After 20 removals, Au layers of the bottom of wire bond pads 21 acts as barrier layer, and etching will stop.Now, carrier 22
Bottom leaks outside outside packaging body, can be as the radiating area of packaging part；
Step 4：Soldered ball 31 is aligned the bottom that wire bond pads 21 are installed to packaging body 11 one by one.First exist during welding
One layer 21 μm of Sn is electroplated in the bottom of wire bond pads 21, and soldered ball 31 and wire bonding are then realized by the way of Reflow Soldering
The combination of pad 21.Finally, whole moulding band is cut, separation forms single IC package product.
Soldered ball 31 can also directly be formed in the bottom of wire bond pads 21 using methods such as printing, plating, soldered ball can
Suitable mode is selected with according to working condition.
Utility model content of the present utility model is more than described in detail, the major advantage of this packaging part is structure letter
It is single compact, relative to the IC package of the pin leakage such as SSOP, QFP, the erection space required for thin array plastic package
It is smaller with encapsulation volume.With SSOP, QFP etc. using lead frame as compared with chip bearing, the packing forms of conductive structure,
Although this encapsulation employs the copper carrier strip with lead frame phase same material in encapsulation process, in final encapsulating structure simultaneously
There is no copper carrier strip, copper carrier strip is intended only as an intermediate tool for forming carrier and wire bond pads.Simultaneously as bonding line
Shorter and no outer pin so that this packaging part has excellent electric property.The packing forms of the pin of the utility model 32 with
28 traditional pin PLCC（Plastic Leaded Chip Carrier）As a example by encapsulation compares, area (5mm × 5mm) contracting
Small by 84%, thickness (0.9mm) reduces 80%, and weight (0.06g) alleviates 95%, and Electronic Packaging ghost effect is also improved
50%.The pad pitch of this encapsulation tool is respectively 0.8mm, 0.65mm, 0.5mm and 0.4mm, can not use compared with long soldering plate
In the case of provide more than 3 and arrange the pad of peripheries arrangement, so be especially suitable for applying mobile phone, digital camera, PDA and other just
Take on the high-density printed circuit board of miniaturized electronics.
In sum, although the utility model is disclosed above with embodiment, so it is not limited to the utility model.
The utility model those of ordinary skill in the art, not departing from spirit and scope of the present utility model, when can
It is used for a variety of modifications and variations.Therefore, protection domain of the present utility model is worked as and is defined depending on those as defined in claim.
Claims (6)
1. a kind of thin array plastic package, it is characterised in that：The packaging part includes carrier（22）, wire bond pads
（21）, ground loop（23）, IC chip（10）, bonding wire（12）, packaging body（11）And soldered ball（31）, the carrier（22）From bottom according to
It is secondary to be made up of Au, Ni, Cu three-layer metal layer, the carrier（22）Centre position be chip bond regions DAP, the chip is bonded
Area DAP is provided with IC chip（10）, the carrier（22）Edge be provided with ground loop（23）, the ground loop（23）By being superimposed
In carrier（22）On multiple layer metal constitute；The wire bond pads（21）Carrier is arranged in multiple rows of array way（22）Four
Week, the wire bond pads（21）It is made up of multiple layer metal；The IC chip（10）By bonding wire（12）It is electrically connected with
In wire bond pads（21）And ground loop（23）；The packaging body（11）For coating IC chip（10）, bonding wire（12）And draw
Line bonding pad（21）And carrier（22）A part, wherein carrier（22）Bottom leak outside in packaging body（11）Outside；It is described
Soldered ball（31）It is arranged at packaging body（11）Bottom, and same wire bond pads（21）It is connected.
2. a kind of thin array plastic package according to claim 1, it is characterised in that：The carrier（22）Metal
Layer Au is 1-2 μm, and metal level Ni is 4 μm, and metal level Cu is 79 μm.
3. a kind of thin array plastic package according to claim 1 and 2, it is characterised in that：The ground loop（23）
It is made up of metal level Ni and Au successively from bottom, wherein metal level Ni is 4 μm, metal layer A u is 1-2 μm.
4. a kind of thin array plastic package according to claim 3, it is characterised in that：The wire bond pads
（21）It is made up of metal layer A u, Ni, Cu, Ni, Au successively since bottom, wherein every layer of metal layer A u is 1-2 μm, every layer of metal
Layer Ni is 4 μm, and metal level Cu is 79 μm.
5. a kind of thin array plastic package according to claim 1, it is characterised in that：The bonding wire（12）It is gold thread
Or copper cash or silver alloy wire.
6. a kind of thin array plastic package, it is characterised in that：The packaging part includes carrier（22）, wire bond pads
（21）, IC chip（10）, bonding wire（12）, packaging body（11）And soldered ball（31）, the carrier（22）From bottom successively by Au, Ni,
Cu three-layer metals layer is constituted, the carrier（22）Centre position be chip bond regions DAP, the chip bond regions DAP is set
There is IC chip（10）, the wire bond pads（21）Carrier is arranged in multiple rows of array way（22）Surrounding, the lead key
Close pad（21）It is made up of multiple layer metal；The IC chip（10）By bonding wire（12）It is electrically connected with wire bond pads
（21）；The packaging body（11）For coating IC chip（10）, bonding wire（12）And wire bond pads（21）And carrier（22）'s
A part, wherein carrier（22）Bottom leak outside in packaging body（11）Outside；The soldered ball（31）It is arranged at packaging body（11）'s
Bottom, and same wire bond pads（21）It is connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621300698.XU CN206282839U (en) | 2016-11-30 | 2016-11-30 | A kind of thin array plastic package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621300698.XU CN206282839U (en) | 2016-11-30 | 2016-11-30 | A kind of thin array plastic package |
Publications (1)
| Publication Number | Publication Date |
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| CN206282839U true CN206282839U (en) | 2017-06-27 |
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ID=59074787
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106409785A (en) * | 2016-11-30 | 2017-02-15 | 天水华天科技股份有限公司 | Thin type array plastic packaging part and production method thereof |
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2016
- 2016-11-30 CN CN201621300698.XU patent/CN206282839U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106409785A (en) * | 2016-11-30 | 2017-02-15 | 天水华天科技股份有限公司 | Thin type array plastic packaging part and production method thereof |
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