CN206178800U - M bus bus host computer circuit - Google Patents
M bus bus host computer circuit Download PDFInfo
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- CN206178800U CN206178800U CN201620937337.XU CN201620937337U CN206178800U CN 206178800 U CN206178800 U CN 206178800U CN 201620937337 U CN201620937337 U CN 201620937337U CN 206178800 U CN206178800 U CN 206178800U
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Abstract
The utility model discloses a M bus bus host computer circuit, the bus just has, the negative terminal, and the host computer circuit is external from quick -witted, include: analytic circuit, bus overload protection circuit and MCU are received to power switching circuit, data transmission modulated circuit, data sampling circuit, data, power switching circuit respectively with other five circuit connection, provide electric power, data transmission modulated circuit is connected with MCU, bus overload protection circuit respectively, bus overload protection circuit and data sampling circuit are connected, and data sampling circuit receives analytic circuit with data and all is connected to the bus negative terminal, the input that analytic circuit was received to data is sample voltage, then the analytic result that will follow quick -witted returning data exports MCU to, bus overload protection circuit's input is threshold voltage and sample voltage, data sampling circuit ground connection. The utility model discloses large load capacity, but and self -adaptation load quantity, stronger adaptability had.
Description
Technical field
The utility model is related to communication technique field, is particularly suited for hotlist, water meter, ammeter, the M-Bus buses of gas meter and leads to
News, and in particular to a kind of M-Bus bus hosts data is activation and receiving circuit.
Background technology
M-Bus (abbreviation of Metering-Bus) is a kind of principal and subordinate designed exclusively for measuring instrument data remote transmission
Formula half-duplex bus, are communicated by the way of " main website caller-slave station response ", are a kind of important of measuring instrumentss Data Digital
Technology.M-Bus buses are two-wire system buses, although be divided into bus anode and negative terminal, but connect when loading without distinguishing both positive and negative polarity
Property, it is that concrete application brings convenience.M-Bus buses using unique electric signal transmission data, host side with+24V ,+
The form sending signal of 36V voltage changes, from generator terminal returned data when, to change direct impedance, bus current is changed indirectly
Form to host side return signal, this electric signal largely improve system rejection to disturbance.
Although at present M-Bus buses have obtained extensively application in measuring instrument industry, but still without a kind of general
M-Bus bus host terminal circuit forms, the M-Bus host circuit structures of each producer's designed, designed differ, but common configuration
It is complicated, the shortcomings of load capacity is less, data receiver analytic ability is affected by bus load slave quantity.
Utility model content
For prior art defect, the utility model proposes a kind of M-Bus bus hosts circuit, its simple structure, load
Amount is big, can self adaptation bus slave computer quantity, with bus overload protection function, and only need to+24V power supplys all the way and power.
The technical scheme that the utility model solves above-mentioned technical problem is as follows：A kind of M-Bus bus hosts circuit, the M-
Bus buses have anode and a negative terminal, the external bus slave computer of the M-Bus bus hosts circuit, including：Power-switching circuit, number
According to transmission modulation circuit, data sampling circuit, data receiver parser circuitry, bus overload protecting circuit and MCU
(Microcontroller Unit；Micro-control unit, also known as single-chip microcomputer)；Wherein, the power-switching circuit respectively with it is described
Data is activation modulation circuit, the data sampling circuit, the data receiver parser circuitry, the bus overload protecting circuit with
And the MCU is connected, to provide electric power；The data is activation modulation circuit is connected with the bus overload protecting circuit,
The input signal of the data is activation modulation circuit is the sending signal of MCU, bus overload described in output signal Jing after modulation
Anode of the protection circuit output to M-Bus buses；The bus overload protecting circuit is also connected with the data sampling circuit,
The data sampling circuit is all connected to the negative terminal of M-Bus buses with the data receiver parser circuitry；The data receiver solution
The input of analysis circuit is the sampled voltage of the data sampling circuit, is output as being obtained according to the change of sampled voltage parsing
Bus slave computer returned data analysis result；The input of the bus overload protecting circuit is that threshold voltage and the data are adopted
The sampled voltage of sample circuit, when bus current is excessive, sampled voltage is higher than threshold voltage, bus output is at this moment limited, to M-
Bus equipment is protected；The MCU is connected respectively with the data is activation modulation circuit, the data receiver parser circuitry,
The MCU has input and output end, and the input receives the parsing knot from the data receiver parser circuitry
Really, what the output end sent the MCU sends a signal to the data is activation modulation circuit；The data sampling circuit connects
Ground.
On the basis of above-mentioned technical proposal, the utility model can also do following improvement.
Preferably, the input voltage of the power-switching circuit is+24V, and output voltage is+36V and+5V.
Preferably, M-Bus-TX signals, the M- of optocoupler U3 are converted to by MCU sending signal MCU-TX Jing optocouplers U3 isolation
Bus-TX signal pins are connected with resistance R2, R4, the other end connection+36V voltages of R2, the other end connecting triode Q2's of R4
Base stage, the grounded emitter of Q2, colelctor electrode is connected with the grid of metal-oxide-semiconductor Q1, and the colelctor electrode Jing resistance R1 of Q2 be connected to+
On 36V；Source electrode connection+36V the voltages of metal-oxide-semiconductor Q1, the anode of drain electrode connection diode D1；The anode of diode D2 is electric with+24V
Source is connected, and the negative electrode of D1, D2 is connected together, and used as the positive terminal of M-Bus buses, Jing bus overload protecting circuits are connected to M-
Bus output interfaces；Respectively Jing diodes D1, D2 are connected to M-Bus bus anodes to+36V with+24V two-way voltage.
Preferably, in bus overload protecting circuit, sampled voltage Us is input to amplifier U2B inverting input, U2B homophases
Input connects resistance R8 and resistance R9, R8 other end connection+5V power supplys, R9 other ends ground connection；The output end of amplifier U2B passes through
The base stage of resistance R6 connecting triode Q4, the grounded emitter of Q4, colelctor electrode connects resistance R5's and metal-oxide-semiconductor Q3 by resistance R7
Grid, the other end of resistance R5 connects the source electrode of metal-oxide-semiconductor Q3, and amplifier U2B constitutes a comparator, and resistance R8, R9 partial pressure is produced
Bus overloading threshold voltage UthThe in-phase input end of input U2B.
Preferably, the sampled voltage Us Jing resistance R11 are connected to the in-phase input end of amplifier U1A, the anti-phase input of U1A
End connects together with the output end of U1A；The output end of amplifier U1A is connected to the in-phase input end of amplifier U1B, and U1B's is anti-phase
Input Jing resistance R18 is grounded, and Jing resistance R17 are connected to the output end of U1B；The output end Jing resistance R15 connections of amplifier U1B
To the in-phase input end of amplifier U2A, while the output end of amplifier U1B is connected to the anode of Schottky diode D3, the negative electrode of D3
Jing resistance R16 are connected to the inverting input of amplifier U2A；Electric capacity C4 and resistance that the in-phase input end Jing of amplifier U2A is in parallel
R14 is grounded, while U2A in-phase input end Jing electric capacity C1 are connected to the output end of U2A, amplifier U2A is output as M-Bus buses and connects
Receive the signal M-Bus-RX after data parsing；M-Bus-RX signal Jing optocouplers U4 isolation is converted to signal MCU-RX, and MCU-RX makees
For final analysis result output to MCU.
Preferably, in data sampling circuit, a bus sampling resistor is provided between the negative terminal and ground of M-Bus buses
R10。
Preferably, the bus sampling resistor is 15 ohm, and power is not less than 2W.
The beneficial effects of the utility model are：Only need to+24V a power supply to power, simple structure, be easy to application；Load
Ability is big, and bus current is up to 266mA；When receiving M-Bus bus slave computer returned datas, adopted using the dynamic using sampling capacitance
Sample voltage as the reference voltage, can self adaptation bus load quantity, bus load slave quantity, without impact, has on result of checking meter
Stronger adaptability, stability is higher；With bus overload protection function, when bus load is excessive or is short-circuited, can be certainly
Move and limit bus current in safe range, with higher reliability.
Description of the drawings
Fig. 1 is the structured flowchart of M-Bus bus hosts circuit of the present utility model；
Fig. 2 is the electricity of data is activation modulation circuit of the present utility model, bus overload protecting circuit and data sampling circuit
Lu Tu；
Fig. 3 is the circuit diagram of data receiver parser circuitry of the present utility model.
In the accompanying drawings, the list of designations represented by each label is as follows：
100 power-switching circuits
200 data is activation modulation circuits
300 data sampling circuits
400 data receiver parser circuitries
500 bus overload protecting circuits
600 MCU
Specific embodiment
Principle of the present utility model and feature are described below in conjunction with accompanying drawing, example is served only for explaining this practicality
It is new, it is not intended to limit scope of the present utility model.
Refer to shown in Fig. 1, it is the structural representation of M-Bus bus hosts circuit of the present utility model.The M-Bus
Bus has anode and a negative terminal, the external bus slave computer (not shown) of the M-Bus bus hosts circuit；In the utility model,
The M-Bus bus hosts circuit includes：Power-switching circuit 100, data is activation modulation circuit 200, data sampling circuit
300th, data receiver parser circuitry 400, bus overload protecting circuit 500 and MCU600, wherein,
The input voltage of the power-switching circuit 100 is+24V, and output voltage is+36V and+5V, is the utility model
M-Bus bus hosts circuit provide required electric power.
The data is activation modulation circuit 200 is connected with the bus overload protecting circuit 500, and the data is activation is adjusted
The input signal of circuit processed 200 is the signal MCU-TX that MCU sends to bus, bus overload described in output signal Jing after modulation
Anode of the output of protection circuit 500 to M-Bus buses；The bus overload protecting circuit 500 also with the data sampling circuit
300 are connected, and the data sampling circuit 300 is all connected to the negative of M-Bus buses with the data receiver parser circuitry 400
End；When bus slave computer (not shown) has data to return, bus current change causes in the data sampling circuit 300 and samples
Voltage Us changes, and the sampled voltage Us is input to the He of data receiver parser circuitry 400 by the data sampling circuit 300
The bus overload protecting circuit 500；The input of the data receiver parser circuitry 400 is the sampled voltage Us, according to institute
The change parsing for stating sampled voltage Us obtains returned data MCU-RX of bus slave computer；The bus overload protecting circuit 500
It is input into as threshold voltage and sampled voltage Us, when bus current is excessive, sampled voltage Us is higher than threshold voltage, at this moment limits total
Line is exported, and M-Bus equipment is protected.
The MCU600 is connected respectively with the data is activation modulation circuit 200, the data receiver parser circuitry 400
Connect, the MCU600 has input and output end, the input receives the solution from the data receiver parser circuitry 400
Analysis result MCU-RX, i.e., described output end sends sending signal MCU-TX of the MCU to the data is activation modulation circuit
200；
Additionally, the data sampling circuit 300 is grounded.
Next, refer to shown in Fig. 2, it is data is activation modulation circuit of the present utility model, bus overload protection electricity
Road and the circuit diagram of data sampling circuit；M-Bus-TX signals are converted to by MCU sending signal MCU-TX Jing optocouplers U3 isolation,
The M-Bus-TX signal pins of optocoupler U3 are connected with resistance R2, R4, the other end connection+36V voltages of R2, the other end connection of R4
The base stage of triode Q2, the grounded emitter of Q2, colelctor electrode is connected with the grid of metal-oxide-semiconductor Q1, and the colelctor electrode Jing resistance of Q2
R1 is connected on+36V；Source electrode connection+36V the voltages of metal-oxide-semiconductor Q1, the anode of drain electrode connection diode D1；The sun of diode D2
Pole is connected with+24V power supplys, and the negative electrode of D1, D2 is connected together, used as the positive terminal of M-Bus buses, Jing buses overload protection electricity
Road is connected to M-Bus output interfaces；Respectively Jing diodes D1, D2 are connected to M-Bus bus anodes to+36V with+24V two-way voltage,
The D1 conductings D2 cut-offs when metal-oxide-semiconductor Q1 is turned on, now bus voltage is+36V, the D1 cut-offs D2 conductings when metal-oxide-semiconductor Q1 ends, this
When bus voltage be+24V；Send data-signal MCU-TX Jing optocouplers U3 isolation and be converted to M-Bus-TX signals, M-Bus-TX Jing
The on or off that triode Q2 controls metal-oxide-semiconductor Q1 is crossed, M-Bus-TX is high level when MCU-TX is signal ' 1 ', at this moment three
The base stage of pole pipe Q2 is+36V high level, and Q2 is in the conduction state, and metal-oxide-semiconductor Q1 meets turn-on condition, and bus is output as+36V；Phase
Instead, when MCU-TX is signal ' 0 ', Q1 cut-offs, bus output+24V.+ 36V and+24V two-way voltage distinguish Jing diodes
D1, D2 are connected to M-Bus bus anodes, the D1 conductings D2 cut-offs when metal-oxide-semiconductor Q1 is turned on, and now bus voltage is+36V, works as MOS
D1 cut-offs D2 conductings when pipe Q1 ends, now bus voltage is+24V.Send data-signal MCU-TX Jing optocouplers U3 isolation conversions
For M-Bus-TX signals, M-Bus-TX controls the on or off of metal-oxide-semiconductor Q1 through triode Q2, when MCU-TX is signal ' 1 '
When M-Bus-TX be high level, at this moment the base stage of triode Q2 is+36V high level, and Q2 is in the conduction state, and metal-oxide-semiconductor Q1 meets
Turn-on condition, bus is output as+36V；On the contrary, when MCU-TX is signal ' 0 ', Q1 cut-offs, bus output+24V.
In bus overload protecting circuit, sampled voltage Us is input to amplifier U2B inverting input, U2B in-phase input ends
Connection resistance R8 and resistance R9, R8 other end connection+5V power supplys, R9 other ends ground connection；The output end of amplifier U2B passes through resistance R6
The base stage of connecting triode Q4, the grounded emitter of Q4, colelctor electrode connects the grid of resistance R5 and metal-oxide-semiconductor Q3 by resistance R7,
The other end of resistance R5 connects the source electrode of metal-oxide-semiconductor Q3.Amplifier U2B constitutes a comparator, and resistance R8, R9 partial pressure produces bus mistake
Carry threshold voltage UthThe in-phase input end of input U2B, when bus load is not less than maximum load, sampled voltage Us is less than overload
Threshold value Uth, now comparator U2B outputs high level, triode Q4 is in the conduction state, and metal-oxide-semiconductor Q3 meets turn-on condition, bus
Normal output；When bus load is larger, sampled voltage Us exceedes overloading threshold Uth, U2B output low levels, Q4 is in cut-off shape
State, metal-oxide-semiconductor Q3 is unsatisfactory for turn-on condition, and bus output is forbidden；Bus current is ensured in safe range with this.
Data sampling circuit is then that a bus sampling resistor, i.e. 15 Europe are provided between the negative terminal and ground of M-Bus buses
Nurse resistance R10；In order to ensure when bus load is larger circuit can normal work, the power of sampling resistor R10 is not less than 2W.
Next, refer to shown in Fig. 3, it is the circuit diagram of data receiver parser circuitry of the present utility model.It is described total
The input signal of line overload protecting circuit is sampled voltage Us and overload protection threshold voltage, and Jing circuits compare the two voltages,
Whether controlling bus export；Sampled voltage Us Jing resistance R11 are connected to the in-phase input end of amplifier U1A, the inverting input of U1A
Connect together with the output end of U1A；The output end of amplifier U1A is connected to the in-phase input end of amplifier U1B, and U1B's is anti-phase defeated
Enter to hold Jing resistance R18 to be grounded, and Jing resistance R17 are connected to the output end of U1B；The output end Jing resistance R15 of amplifier U1B is connected to
The in-phase input end of amplifier U2A, while the output end of amplifier U1B is connected to the anode of Schottky diode D3, the negative electrode Jing of D3
Resistance R16 is connected to the inverting input of amplifier U2A；Electric capacity C4 and resistance R14 that the in-phase input end Jing of amplifier U2A is in parallel
Ground connection, while U2A in-phase input end Jing electric capacity C1 are connected to the output end of U2A, the output of amplifier U2A is M-Bus buses and connects
Receive the signal M-Bus-RX after data parsing；M-Bus-RX signal Jing optocouplers U4 isolation is converted to the signal MCU- for being input to MCU
RX。
Amplifier U1A constitutes a voltage follower, and the bus sampled voltage Us of sampling resistor is input to into the same of amplifier U1B
Phase input, amplifier U1B constitutes a scaling circuit in the same direction, will be amplified by setting suitable R17, R18 resistance
Multiple is set to 6 times, and after sampled voltage Us is amplified into 6 times U is exportedamp；Amplifier U2A constitutes a comparator, UampJing resistance R15
U2A in-phase input ends are input to, Jing Schottky diodes D3 and resistance R16 is input to inverting input, the output of comparator U2A
Bus signals M-Bus-RX after as parsing.If diode D3 conducting voltages are Vf, when M-Bus buses are in static state
Because the presence of diode D3, the high V of in-phase input end voltage ratio inverting input of comparator U2Af, U2A output high level, i.e.,
Now M-Bus-RX is high level, and output signal is as high level when ensureing M-Bus buses static state with this.In the same of comparator U2A
To input be connected with electric capacity C4 and resistance R14, C4 and R14 it is in parallel after be grounded, because the presence of electric capacity C4 causes U2A homophase inputs
Terminal voltage can not be mutated, and, realize the parsing of slave returned data using the dynamic electric voltage on sampling capacitance C4 as the reference voltage；
Sampled voltage Us is caused to increase suddenly when M-Bus buses are received when signal is changed into ' 0 ' from ' 1 ', now comparator U2A's is anti-phase defeated
Enter terminal voltage to raise immediately, and in-phase input end is slowly raised because of the presence of electric capacity C4, the inverting input of U2A in this period
Voltage is higher than in-phase input end, exports low level, that is, obtain M-Bus-RX for ' 0 ' signal；In the same manner, when bus receive signal from
' 0 ' when being changed into ' 1 ', and sampled voltage Us reduces suddenly, and now U2A anti-phase inputs terminal voltage reduces suddenly, less than in-phase input end
Voltage, exports high level, that is, obtain M-Bus-RX for ' 1 ' signal.
Bus current is 0-1.5mA during M-Bus bus slave computers returned data ' 1 ', bus current increase during returned data ' 0 '
11-20mA.Assume that bus dynamic current is 11mA, when sampling resistor is 15 ohm, bus sampled voltage Us changes turn to (11mA
× 15 Ω=165mV), voltage change is changed into 990mV Jing after 6 times are amplified, it is ensured that bus voltage change is higher than Schottky diode
Pressure drop Vf, allow circuit correctly to parse bus data.Amplifier U1A, U1B, U2A supply voltages are 24V, if bus is maximum permitting
Perhaps electric current is Imax, then need to meet (Imax× 15 Ω × 6 ＜ 24V), obtain ImaxFor 266mA.
Thus, the utility model only needs to+24V a power supply and powers, simple structure, is easy to application；Load capacity is big, always
Line current is up to 266mA；When receiving M-Bus bus slave computer returned datas, made using the dynamic sampling voltage using sampling capacitance
For reference voltage, can self adaptation bus load quantity, bus load slave quantity on result of checking meter without impact, with stronger suitable
Ying Xing, stability is higher；With bus overload protection function, when bus load is excessive or is short-circuited, can volitional check it is total
Line current in safe range, with higher reliability.
Preferred embodiment of the present utility model is the foregoing is only, it is all in this practicality not to limit the utility model
Within new spirit and principle, any modification, equivalent substitution and improvements made etc. should be included in guarantor of the present utility model
Within the scope of shield.
Claims (7)
1. a kind of M-Bus bus hosts circuit, the M-Bus buses have anode and negative terminal, the M-Bus bus hosts circuit
External bus slave computer, it is characterised in that include：Power-switching circuit, data is activation modulation circuit, data sampling circuit, data
Receive parser circuitry, bus overload protecting circuit and MCU；Wherein,
The power-switching circuit respectively with the data is activation modulation circuit, the data sampling circuit, the data receiver
Parser circuitry, the bus overload protecting circuit and the MCU are connected, to provide electric power；
The data is activation modulation circuit is connected with the bus overload protecting circuit, the data is activation modulation circuit it is defeated
Enter the sending signal that signal is MCU, the output of bus overload protecting circuit is to M-Bus buses described in output signal Jing after modulation
Anode；
The bus overload protecting circuit is also connected with the data sampling circuit, the data sampling circuit and the data
Receive the negative terminal that parser circuitry is all connected to M-Bus buses；
The input of the data receiver parser circuitry is the sampled voltage of the data sampling circuit, is output as according to the sampling
The analysis result of the bus slave computer returned data that the change parsing of voltage is obtained；
The input of the bus overload protecting circuit is threshold voltage and the sampled voltage of the data sampling circuit, when bus electricity
When flowing through big, sampled voltage is higher than threshold voltage, at this moment limits bus output, and M-Bus equipment is protected；
The MCU is connected respectively with the data is activation modulation circuit, the data receiver parser circuitry, and the MCU has
Input and output end, the input receives the analysis result from the data receiver parser circuitry, the output
The end transmission MCU's sends a signal to the data is activation modulation circuit；
The data sampling circuit ground connection.
2. M-Bus bus hosts circuit according to claim 1, it is characterised in that the input of the power-switching circuit
Voltage is+24V, and output voltage is+36V and+5V.
3. M-Bus bus hosts circuit according to claim 2, it is characterised in that the signal MCU-TX Jing sent by MCU
Optocoupler U3 isolation is converted to M-Bus-TX signals, and the M-Bus-TX signal pins of optocoupler U3 are connected with resistance R2, R4, and R2's is another
End connection+36V voltages, the base stage of the other end connecting triode Q2 of R4, the grounded emitter of Q2, colelctor electrode is with metal-oxide-semiconductor Q1's
Grid connects, and the colelctor electrode Jing resistance R1 of Q2 are connected on+36V；Source electrode connection+36V the voltages of metal-oxide-semiconductor Q1, drain electrode connects
Connect the anode of diode D1；The anode of diode D2 is connected with+24V power supplys, and the negative electrode of D1, D2 is connected together, used as M-Bus
The anode of bus, Jing bus overload protecting circuits are connected to M-Bus output interfaces；+ 36V and+24V two-way voltage difference Jing bis- poles
Pipe D1, D2 are connected to M-Bus bus anodes.
4. M-Bus bus hosts circuit according to claim 2, it is characterised in that in bus overload protecting circuit, adopt
Sample voltage Us is input to amplifier U2B inverting input, and U2B in-phase input ends connection resistance R8 and the connection of resistance R9, the R8 other end+
5V power supplys, R9 other ends ground connection；The base stage that the output end of amplifier U2B passes through resistance R6 connecting triode Q4, the emitter stage of Q4 connects
Ground, colelctor electrode connects the grid of resistance R5 and metal-oxide-semiconductor Q3 by resistance R7, and the other end of resistance R5 connects the source electrode of metal-oxide-semiconductor Q3,
Amplifier U2B constitutes a comparator, and resistance R8, R9 partial pressure produces bus overloading threshold voltage UthThe in-phase input end of input U2B.
5. M-Bus bus host circuits according to claim 3 or 4, it is characterised in that the sampled voltage Us Jing resistance
R11 is connected to the in-phase input end of amplifier U1A, and the inverting input of U1A is connected together with the output end of U1A；Amplifier U1A
Output end is connected to the in-phase input end of amplifier U1B, the inverting input Jing resistance R18 ground connection of U1B, and Jing resistance R17 and connects
To the output end of U1B；The output end Jing resistance R15 of amplifier U1B is connected to the in-phase input end of amplifier U2A, while amplifier U1B
Output end is connected to the anode of Schottky diode D3, and the negative electrode Jing resistance R16 of D3 are connected to the inverting input of amplifier U2A；
Electric capacity C4 and resistance R14 ground connection that the in-phase input end Jing of amplifier U2A is in parallel, while U2A in-phase input end Jing electric capacity C1 connects
The output end of U2A is connected to, amplifier U2A is output as the signal M-Bus-RX after the parsing of M-Bus buses receiving data；M-Bus-RX
Signal Jing optocouplers U4 isolation is converted to signal MCU-RX, and MCU-RX is used as final analysis result output to MCU.
6. M-Bus bus hosts circuit according to claim 2, it is characterised in that in data sampling circuit, in M-
A bus sampling resistor R10 is provided between the negative terminal and ground of Bus buses.
7. M-Bus bus hosts circuit according to claim 6, it is characterised in that the bus sampling resistor is 15 Europe
Nurse, power is not less than 2W.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620937337.XU CN206178800U (en) | 2016-08-25 | 2016-08-25 | M bus bus host computer circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620937337.XU CN206178800U (en) | 2016-08-25 | 2016-08-25 | M bus bus host computer circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206178800U true CN206178800U (en) | 2017-05-17 |
Family
ID=60240030
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620937337.XU Expired - Fee Related CN206178800U (en) | 2016-08-25 | 2016-08-25 | M bus bus host computer circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206178800U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107452192A (en) * | 2017-08-16 | 2017-12-08 | 南京天溯自动化控制系统有限公司 | M BUS Communication processing systems with adaptation function |
| CN110752978A (en) * | 2019-10-31 | 2020-02-04 | 广州河东科技有限公司 | MBUS communication host circuit, communication method, device, equipment and storage medium |
| CN112637028A (en) * | 2020-12-23 | 2021-04-09 | 国网江苏省电力有限公司 | M-BUS communication circuit |
-
2016
- 2016-08-25 CN CN201620937337.XU patent/CN206178800U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107452192A (en) * | 2017-08-16 | 2017-12-08 | 南京天溯自动化控制系统有限公司 | M BUS Communication processing systems with adaptation function |
| CN110752978A (en) * | 2019-10-31 | 2020-02-04 | 广州河东科技有限公司 | MBUS communication host circuit, communication method, device, equipment and storage medium |
| CN112637028A (en) * | 2020-12-23 | 2021-04-09 | 国网江苏省电力有限公司 | M-BUS communication circuit |
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Granted publication date: 20170517 Termination date: 20180825 |