CN206164677U - USB3. 0CMOS linear array industry camera - Google Patents

Abstract

USB3.0CMOS linear array industry camera is an industry camera that adopts USB3.0 interface, CMOS linear array image sensor for improve picking rate and image resolution, reduce the camera volume, reduce cost and consumption. It includes: general bus interface of USB3.0 and controller, programmable logic chip PLD, synchronous random access memory DDR3, on -the -spot array FPGA able to programme, linear array CMOS image sensor, power management module.

Description

USB3.0CMOS linear array industrial cameras

(1) art

The utility model is related to industrial camera, the CMOS linear array industrial cameras particularly with USB3.0 interfaces.

(2) background technology

Industrial camera is a key component in NI Vision Builder for Automated Inspection, steady with high image compared to traditional camera Qualitative, high-transmission bandwidth and high anti-jamming capacity etc., at present on the market industrial camera is mostly the phase based on CCD or CMOS chip Machine.Using the output of the format signals such as PAL/NTSC/SECAM/S-VIDEO more than the industrial camera of early stage, need to be equipped with special image Capture card can just be converted into the accessible digital information of computer.With GigE/USB/IEEE/DCOM/Camera Link The development and popularization of the digital interface technology such as LVDS, at present more and more industrial digital camera replaces traditional analogue camera to go out In various NI Vision Builder for Automated Inspection applications now.Industrial camera can be divided into line-scan digital camera, face battle array according to the architectural characteristic of sensor Camera.

Line array CCD has simple structure, lower-cost feature.A line vision signal can simultaneously be stored.Due to its list The number of row's photosensitive unit can be made a lot, and on the premise of equal certainty of measurement, it is larger that its measurement range can be done, and And due to line array CCD real-time Transmission light-to-current inversion signal and self-scanning speed is fast, frequency response is high, kinetic measurement can be realized, And can work under low-light (level), so line array CCD be widely used in product size measurement and classification, noncontact dimension measurement, Many fields such as bar code.

For convenience industrial camera is installed, and improves image transmitting rate, and number of patent application is CN200910243884.2 " a kind of The document of USB digital industrial cameras " " discloses a kind of USB Techno-Industrial phases of the black and white/colour for being applied to field of machine vision Machine, it by several functions Highgrade integration in camera internal, using USB2.0 data output interfaces and total pixel 1,400,000～500 The ccd image sensor of ten thousand pixels, can be by external signal triggering or continuous acquisition, with picking rate is fast, image clearly The features such as spending high.USB digital industrial cameras using software and hardware combining design philosophy, by USB interface, realize camera hardware and Communication between the demoware run on PC, having further facilitated user carries out the access of data and the prison of industrial process Control.”

Recently as the lifting at full speed of IMAQ speed, above industrial camera has following deficiency：1. schemed using CCD As the industrial camera of sensor, power consumption is bigger than the industrial camera of cmos image sensor, so under high picking rate, camera Power consumption is inevitable quite huge.2. low with price line scan image sensor image definition using area array sensor picture quality ratio, 3.GigE interface camera bandwidth is restricted 1.25Gb/s, USB2.0 interface cameras bandwidth only 480Mb/s, all cannot meet higher The requirement of picking rate.The high still interface bulky of CameraLink interface bandwidths, while needing to be equipped with expensive adopting Truck, application cost and ease of use are limited.

Not enough for more than, the utility model adopts USB3.0 interfaces, linear CMOS image sensor, USB3.0 interface bands Width is up to 5Gbps, and collected by camera speed and resolution ratio can be greatly improved, and reduces system schema cost, reduces camera volume and work( Consumption, improves picture quality, while realizing splicing compression scheduling algorithm in hardware, mitigates main frame calculation process pressure, especially in multiple stage The more aobvious advantage of camera applications occasion.Linear CMOS image sensor resolution ratio is up to 100K from 2K～12K, frequency acquisition, can expire The challenging needs of sufficient high speed, high resolution.

The utility model includes such as lower module including camera structure：USB3.0 general purpose interface bus and its controller, can compile Journey logic chip PLD, synchronous random access memory DDR3, field programmable gate array FPGA, linear CMOS image sensor, power supply pipe Reason module；

CMOS line scan image sensors experience picture signal, PLD output drivings sequential to imageing sensor, imageing sensor Put into effect pixel and clock signal clk, viewdata signal DATA, synchronized data signal LVAL are sent to FPGA core PLD Module, carries out data recombination conversion in FPGA core PLD modules, and output difference data-signal LVDS signals can to scene Programmed array FPGA；Field programmable gate array FPGA is by memory DDR3 buffering image datas, while data splicing is carried out, together When exported by GPIFII interfaces to the data buffer zone of USB3.0 controllers, finally by USB3.0 controllers by Universal USB 3.0 Interface engine is transmitted to USB3.0 main frame HOST ends.In addition main frame can send control instruction to USB3.0 controllers, USB3.0 controls Device processed arranges FPGA mode of operations and Image Processing parameter by SPI interface, may also set up linear CMOS image sensor figure As acquisition parameter.

Its workflow is：Camera is connected main frame after start, camera carries out USB2.0 device enumerations automatically, then carries out USB3.0 device enumerations, it is 5Gb/s that the success of USB3.0 device enumerations then arranges USB device transmission bandwidth, otherwise arranges USB device Transmission bandwidth is 480Mb/s；Image parameter is subsequently set, camera hardware splicing parameter is set, mode of operation is set, carry out image Data acquisition, carries out external trigger mode of operation inquiry, and external trigger pattern then receives external trigger signal, otherwise query software triggering work Operation mode, software triggering then receives software triggering command, otherwise carries out automatic continuous mode of operation, gathers image linear array signal, 12bit to 8bit compression of images is carried out again, and graphics hardware splicing completes collection, end-of-job.

(3) content of the invention

The purpose of this utility model is just to provide a kind of using USB3.0 interfaces, the camera of CMOS line scan image sensors, Picking rate and image resolution ratio are improved, reduces camera volume, reduces cost and power consumption.

What the purpose of this utility model was realized in：Camera structure is included such as lower module：USB3.0 general purpose interface bus And its controller, programmable logic chip PLD, synchronous random access memory DDR3, field programmable gate array FPGA, linear array CMOS figure As sensor, power management module；

CMOS line scan image sensors experience picture signal, PLD output drivings sequential to imageing sensor, imageing sensor Put into effect pixel and clock signal clk, viewdata signal DATA, synchronized data signal LVAL are sent to FPGA core PLD Module, carries out data recombination conversion in FPGA core PLD modules, and output difference data-signal LVDS signals can to scene Programmed array FPGA；Field programmable gate array FPGA is by memory DDR3 buffering image datas, while data splicing is carried out, together When exported by GPIFII interfaces to the data buffer zone of USB3.0 controllers, finally by USB3.0 controllers by general programmable Interface GPIF transmits 32bit signals and by serial peripheral equipment interface SPI input peripheral signal, USB3.0 interface engines transmit to USB3.0 interfaces；

Its workflow is：Camera is connected main frame after start, camera carries out USB2.0 device enumerations automatically, then carries out USB3.0 device enumerations, it is 5Gb/s that the success of USB3.0 device enumerations then arranges USB device transmission bandwidth, otherwise arranges USB device Transmission bandwidth is 480Mb/s；Image parameter is subsequently set, camera hardware splicing parameter is set, mode of operation is set, carry out image Data acquisition, carries out external trigger mode of operation inquiry, and external trigger pattern then receives external trigger signal, otherwise query software triggering work Operation mode, software triggering then receives software triggering command, otherwise carries out automatic continuous mode of operation, gathers image linear array signal, 12bit to 8bit compression of images is carried out again, and graphics hardware splicing completes collection, end-of-job.

(4) illustrate

Concrete structure workflow of the present utility model is given by below example and its accompanying drawing 1, accompanying drawing 2.Accompanying drawing 1 is USB3.0CMOS linear array industrial camera hardware configuration theory diagrams.Accompanying drawing 2 is USB3.0CMOS linear array industrial camera workflows Figure.Accompanying drawing 3 is USB3.0CMOS linear array industrial cameras mechanical dimension figure.Accompanying drawing 4 is USB3.0CMOS linear array industrial cameras 4K point The fundamental performance parameter tabular drawing of resolution camera.

(5) specific embodiment

Running of the present utility model is as follows：

(1) accompanying drawing 1 gives hardware configuration of the present utility model, carries out welding assembly to hardware as illustrated, and passes through Usb interfaces are implanted to driver in ddr3.The present invention includes：It is USB3.0 general purpose interface bus and its controller, programmable Logic chip PLD, synchronous random access memory DDR3, field programmable gate array FBGA, linear CMOS image sensor, power management Module.

Operation principle of the present utility model is：Camera is connected and power supply needed for providing camera by usb buses with main frame.This electricity Source provides required power supply by power management module to each module of camera internal.CMOS line scan image sensors experience picture signal, Clock signal clk, normal data signals DATA, long data-signal LVAL are sent to FPGA core PLD modules, can compiled Journey logic core PLD module, exports long data-signal LVDS signals to field programmable gate array FPGA；Field programmable gate array FPGA, while transmitting 32bit signals and by Serial Peripheral Interface (SPI) by general programmable interface GPIF by USB3.0 controllers SPI input peripheral signals, field programmable gate array FPGA is controlled by synchrodata random access memory DDR3 Program, and scene can compile Data-signal incoming DDR3 storages after journey array FPGA process, the picture signal after field programmable gate array FPGA process most after Jing USB3.0 controllers are entered by USB3.0 buses and main-machine communication by general programmable interface GPIF.

(2) utility model works flow process is as shown in Figure 2.Its running is as follows：

Camera connection main frame is carried out USB2.0 device enumerations after start, then carries out USB3.0 device enumerations, USB3.0 sets Standby enumerating successfully then arrange USB device transmission bandwidth for 5Gb/s, and otherwise setting USB device transmission bandwidth is 480Mb/s；Subsequently Image parameter is set, camera hardware splicing parameter is set, mode of operation is set, carry out image data acquiring, carry out external trigger work Operation mode is inquired about, and external trigger pattern then receives external trigger signal, otherwise query software triggering mode of operation, and software triggering then receives Software triggering command, otherwise carries out automatic continuous mode of operation, gathers image linear array signal, then carries out 12bit to 8bit images Compression, graphics hardware splicing, completes collection, end-of-job.

(3) the utility model mechanical appearance is as shown in Figure 3.Machine size 29mm*30mm*44mm；There are 32UNC camera lenses front end Standard interface；There are USB3.0 interfaces and external trigger interface in rear end.

(4) each specifications parameter of the utility model is as shown in Figure 4.Design parameter is as follows：

1st, imageing sensor：CMOS；

2nd, resolution ratio：4096×1

3rd, pixel dimension：3.5μm×3.5μm

4th, shutter：Overall situation exposure

5th, line frequency：80kHz

6th, black and white/colour：Black and white

7th, interface：USB3.0

8th, image output format：Raw8/Mono8

9th, pixel locating depth：8/12bits

10th, Synchronization Control：Free schema/soft triggering pattern/external trigger pattern/fixed frequency modes

11st, spectrum assignment：It is manual/auto

12nd, skin temperature：0～50 DEG C

13rd, lens interface：C-mount

14、GPIO：1 tunnel is input into the output of/1 tunnel

15th, operating temperature：0～50 DEG C

16th, power requirement：USB3.05V@900mA

17th, shell sizes：29mm×44mm×30mm(H×W×L)

Above example is intended merely to better illustrate the practical application of the present invention, is not meant to limit the present invention.This The technical characteristic of invention is defined in the patent claims.

Claims (1)

1.USB3.0CMOS linear array industrial camera, its technical characteristic is：Camera structure is included such as lower module：USB3.0 versabus Interface and its controller, programmable logic chip PLD, synchronous random access memory DDR3, field programmable gate array FPGA, linear array Cmos image sensor, power management module；CMOS line scan image sensors experience picture signal, and PLD output drivings sequential is extremely Imageing sensor, imageing sensor output pixel clock signal CLK, viewdata signal DATA and synchronized data signal LVAL are passed FPGA core PLD modules are given, in FPGA core PLD modules data recombination conversion, output difference data are carried out , to field programmable gate array FPGA, field programmable gate array FPGA is by memory DDR3 buffers images numbers for signal LVDS signals According to, while carry out data splicing, while exported by GPIF interfaces to the data buffer zone of USB3.0 controllers, finally by USB3.0 controllers are by general programmable interface GPIF transmits 32bit signals and by serial peripheral equipment interface SPI input peripheral Signal, is transmitted to USB3.0 interfaces by USB3.0 interface engines.