CN206096714U - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN206096714U CN206096714U CN201621142502.9U CN201621142502U CN206096714U CN 206096714 U CN206096714 U CN 206096714U CN 201621142502 U CN201621142502 U CN 201621142502U CN 206096714 U CN206096714 U CN 206096714U
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Abstract
The embodiment of the utility model discloses display panel and display device, this display panel includes: a plurality of data groups, every data group includes the 1st data line to m data line, a plurality of switchings group, every switching group is including 1 switch element to m switch element and 1 capacity cell to m capacity cell, with the electric data signal circuit of being connected of i switch element's input, ON -OFF control circuit and electric capacity control circuit, ON -OFF control circuit include 1 switch control lines to m switch control lines, and electric capacity control circuit includes the 1st electric capacity control line to m electric capacity control line, and i electric capacity control line control i capacity cell discharges in the time of the output of i switch control lines rising edge, and i electric capacity control line control i capacity cell charges in the time of the output of i switch control lines falling edge. The utility model discloses improve the display panel uneven brightness problem, improved the display effect, had the advantage of low in manufacturing cost and narrow frame.
Description
Technical field
This utility model embodiment is related to Display Technique, more particularly to a kind of display floater and display device.
Background technology
Low-temperature polysilicon silicon technology (Low Temperature Poly-silicon, LTPS) is to use laser or heat treatment molten
Melt the technology that non-crystalline silicon rearranges crystal.The active layer of thin film transistor (TFT) TFT can adopt non-crystalline silicon in existing display floater
Manufacture, can improve the mobility of the active layer of thin film transistor (TFT) after being processed using low-temperature polysilicon silicon technology such that it is able to real
High-resolution display floater is now controlled, and meets the display higher and higher pixel request of product and more and more accurate picture control
System.
Data wire driving is carried out using multiplexer circuit more than existing LTPS display floaters, display surface thus can be greatly decreased
The quantity of driving chip outfan in plate, reaches cost-effective effect.Figure 1A show the display floater of prior art offer
Multiplexer circuit schematic diagram, Figure 1B show the driver' s timing figure of Figure 1A.As illustrated, multiplexer circuit 10 is 2:
4 multiplexer circuits, multiplexer circuit 10 includes multiple N-type MOS transistor T1～T4, in two sequencing contro line CKH1 and
Under the control of CKH2, receive the data signal of two data lead S1 and S2 outputs and transmit to 4 data line D1～D4, realize
Data wire drives, and wherein display floater can be row upset drive pattern, accordingly data lead S1 when a two field picture is shown
The opposite polarity of the data signal transmitted to multiplexer circuit 10 with S2.
When showing m two field pictures, data lead S1 output polarity is positive data signal, and data lead S2 output polarity is
Negative data signal.In Figure 1B so that line n scan line Gate carries out display driving as an example, the output of sequencing contro line CKH1 trailing edges
At the moment, transistor T1 is closed and data wire D1 is in suspended state.The parasitism electricity that cannot be eliminated is there are in known MOS transistor
((such as parasitic gate electric capacity, source (leakage) pole parasitic capacitance), then the parasitic capacitance of the transistor T1 at CKH1 trailing edges moment can draw appearance
The voltage of low data wire D1, corresponding data wire D1 is subject at once transistor D1 parasitic near the proximal end of multiplexer circuit 10
The impact of electric capacity and cause pressure drop larger, data wire D1 away from multiplexer circuit 10 far-end exist postpone cause by parasitism
The impact of electric capacity is less and pressure drop is less.In the same manner, the voltage that proximally and distally equally occurs of data wire D2～D4 reduces phenomenon.
The data line voltage of known MOS transistor close moment determines magnitude of voltage of the data line transfer to pixel, therefore
MOS transistor close moment data wire far-end can cause display floater light and shade different with the voltage differences of proximal end, and brightness is not
.It follows that the display effect of the effect of parasitic capacitance display floater of MOS transistor.
Utility model content
This utility model embodiment provides a kind of display floater and display device, to solve existing display floater by parasitic electricity
Hold the problem for affecting to cause brightness disproportionation.
In a first aspect, this utility model embodiment provides a kind of display floater, the display floater includes：
The multiple data line groups being arranged in order in the first direction, each described data line group includes arranging successively in the first direction
1st data wire of row is to m data wires；
With the one-to-one multiple switch groups of the plurality of data line group, each described switch groups include in the first direction according to
1st switch element of secondary arrangement is to m switch elements and the 1st capacity cell one-to-one with the m switch element to
M capacity cells, the outfan of the i-th switch element of each switch groups and the first end of the i-th capacity cell with it is corresponding
The i-th data wire electrical connection of the data line group；
Data signal circuit, the data signal circuit is electrically connected with the input of i-th switch element；
Control circuit, including ON-OFF control circuit and capacitor control circuit, the ON-OFF control circuit includes the 1st switch control
Line processed is to m thread switching controls, the i-th thread switching control of the ON-OFF control circuit and the i-th switch of each switch groups
The control end electrical connection of element, the capacitor control circuit includes the 1st Capacity control line to m Capacity control lines, the electric capacity
I-th Capacity control line of control circuit is electrically connected with the second end of the i-th capacity cell of switch groups each described；Described i-th opens
Close the i-th capacity cell electric discharge described in the i-th Capacity control line traffic control described in while control line rising edge is exported；I-th switch
The i-th capacity cell described in the i-th Capacity control line traffic control charges described in while control line trailing edge is exported；
Wherein, m is the integer more than 1, i=1,2 ..., m.
Second aspect, this utility model embodiment additionally provides a kind of display device, and the display device includes：As mentioned above
Display floater.
The display floater that this utility model embodiment is provided, the i-th thread switching control rising edge causes the i-th data wire when exporting
Voltage raise, while i-th the i-th capacity cell of Capacity control line traffic control electric discharge cause the voltage of the i-th data wire to reduce；I-th opens
Closing when control line trailing edge is exported causes the voltage of the i-th data wire to reduce, while i-th the i-th capacity cell of Capacity control line traffic control
Charging causes the voltage of the i-th data wire to raise.It follows that the presence of capacity cell compensate for the parasitic capacitance pair of switch element
The voltage influence of data wire, corresponding data wire is very little by effect of parasitic capacitance, and then reduces the far-end pressure of data wire
Drop and proximal end pressure drop, so as to effectively reduce the far-end of data wire and the voltage differences of proximal end, improve display floater
Different and brightness disproportionation the problems of light and shade, the display effect of display floater is improve, also with low cost of manufacture and narrow frame
Advantage.
Description of the drawings
In order to be illustrated more clearly that this utility model embodiment or technical scheme of the prior art, below will be to embodiment
Or the accompanying drawing to be used needed for description of the prior art does one and simply introduces, it should be apparent that, drawings in the following description are
Some embodiments of the present utility model, for those of ordinary skill in the art, on the premise of not paying creative work,
Can be with according to these other accompanying drawings of accompanying drawings acquisition.
The schematic diagram of the multiplexer circuit of the display floater that Figure 1A is provided for prior art；
Figure 1B is the driver' s timing figure of Figure 1A；
Fig. 2A is the schematic diagram of the display floater that this utility model one embodiment is provided；
Fig. 2 B are the driver' s timing figures of Fig. 2A；
Fig. 3 is the schematic diagram of the display floater that this utility model other embodiment is provided；
Fig. 4 A are the schematic diagrams of the display floater that this utility model another embodiment is provided；
Fig. 4 B are the driver' s timing figures of Fig. 4 A；
Fig. 5 is the schematic diagram of the display floater that this utility model another embodiment is provided；
Fig. 6 is the schematic diagram of the display floater that this utility model further embodiment is provided.
Specific embodiment
To make the purpose of this utility model, technical scheme and advantage clearer, implement hereinafter with reference to this utility model
Accompanying drawing in example, clearly and completely describes the technical solution of the utility model, it is clear that described enforcement by embodiment
Example is a part of embodiment of this utility model, rather than the embodiment of whole.Based on the embodiment in this utility model, this area
The every other embodiment that those of ordinary skill is obtained under the premise of creative work is not made, belongs to this utility model
The scope of protection.
In order to solve problem of the prior art, this utility model embodiment provides a kind of display floater, as shown in Figure 2 A should
Display floater includes：The multiple data line groups 110 being arranged in order in the first direction, each data line group 110 is included along first party
To the 1st data wire D1 to m data wire Dm being arranged in order；With the one-to-one multiple switch groups of multiple data line groups 110
120, each switch groups 120 includes the 1st switch element T1 to m switch element Tm, Yi Jiyu being arranged in order in the first direction
One-to-one 1st capacity cell C1 to the m capacity cell Cm of the m switch element, the i-th switch unit of each switch groups 120
The first end of the outfan of part and the i-th capacity cell is electrically connected with the i-th data wire of corresponding data line group 110；Data are believed
Number circuit 130, data signal circuit 130 is electrically connected with the input of the i-th switch element；Control circuit 140, including on-off control
Circuit and capacitor control circuit, ON-OFF control circuit includes the 1st thread switching control CKH1 to m thread switching control CKHm, switch
I-th thread switching control of control circuit is electrically connected with the control end of the i-th switch element of each switch groups 120, Capacity control electricity
Road include the 1st Capacity control line XCKH1 to m Capacity control line XCKHm, the i-th Capacity control line of capacitor control circuit with it is every
The second end electrical connection of the i-th capacity cell of individual switch groups 120；I-th electric capacity control while i-th thread switching control rising edge is exported
The capacity cell of line traffic control processed i-th discharges；I-th the i-th electric capacity of Capacity control line traffic control while i-th thread switching control trailing edge is exported
Element charges；Wherein, m is the integer more than 1, i=1,2 ..., m.
In the present embodiment display floater includes multiple data line groups 110, and each data line group 110 includes m data lines
And D1～Dm is labeled as successively, it will be understood by those skilled in the art that data wire is used for the picture of viewing area in display floater
Plain discharge and recharge, here is not repeated data wire and limited.
Display floater also includes multiple switch groups 120, multiple switch groups 120 and multiple data line groups 110 in the present embodiment
Correspond and arrange, and multiple switch groups 120 are arranged in order along a first direction；Each switch groups 120 includes m switch unit
Part is simultaneously labeled as successively T1～Tm, is labeled as also including m capacity cell and successively C1～Cm, m capacity cell and m switch
Element is corresponded and arranged.Here, for a switch groups 120 and a corresponding data line group 110, switch groups 120
In the i-th switch element and the i-th capacity cell it is corresponding with the i-th data wire in data line group 110 and electrically connect.
The switch element of each switch groups 120 optional in the present embodiment is nmos tft.People in the art
Member is appreciated that the switch element of each switch groups in this utility model includes but is not limited to nmos tft, such as also optional
The switch element all same of the identical sequence of each switch groups；Or, the switch element of the odd numbered sequences of each switch groups is NMOS
Transistor, the switch element of the even order of each switch groups is PMOS transistor etc..Do not carry out in this utility model concrete
Limit.
Display floater also includes data signal circuit 130, the switch element of data signal circuit 130 and i-th in the present embodiment
Input electrical connection.In the present embodiment optional display floater is row upset drive pattern, then optional data as shown in Figure 2 A
Signal circuit 130 include many signal lines and be labeled as successively S1, S2 ..., a pair of many signal lines and multiple switch groups 110 1
Should arrange；The opposite polarity of the data signal of the signal line of arbitrary neighborhood two output；For any one switch groups 120, switching
Each switch element T1～Tm in group 120 is connected to the corresponding holding wire of the switch groups 120 with receiving polarity identical number
It is believed that number.In other embodiments also optional display floater is that frame upset drive pattern, row upset drive pattern or point upset are driven
Dynamic model formula etc., does not limit the drive pattern of display floater in this utility model.
It will be understood by those skilled in the art that in other embodiments also optional data signal circuit includes two bars
Line, data signal circuit 130 as shown in Figure 3 includes the first holding wire S1 and secondary signal line S2, the first holding wire S1 and odd number
The input electrical connection of the switch element of each switch groups 120 of sequence, each switch groups 120 that secondary signal line S2 sorts with even number
Switch element input electrical connection；The polarity of the first data signal of the first holding wire S1 outputs is defeated with secondary signal line S2
The opposite polarity of the second data signal for going out；Thus the holding wire quantity of data signal circuit 130 can be greatly decreased, and then can
Reduce the cost of display floater.It will be understood by those skilled in the art that the holding wire quantity of data signal circuit includes but does not limit
In any of above example, three switch groups one signal lines of correspondence of arbitrary neighborhood that such as can be sorted with odd number and even number sequence
One signal line of adjacent three switch groups correspondence etc., here is not limited the holding wire quantity in data signal circuit.
Display floater also includes each switch groups of the thread switching control CKH1 of control circuit the 140, the 1st correspondence controls in the present embodiment
120 the 1st switch element is opened or closed, by that analogy, the m of each switch groups 120 of m thread switching controls CKHm correspondence controls
Switch element is opened or closed；1st capacity cell of each switch groups 120 of the 1st Capacity control line XCKH1 correspondence controls charges or puts
Electricity, by that analogy, the m capacity cell charge or discharge of each switch groups 120 of m Capacity control lines XCKHm correspondence controls.
For display floater as above, Fig. 2 B show the driver' s timing figure of display floater shown in Fig. 2A.In this reality
Can be the drive patterns such as row upset, row upset, point upset, frame upset with new middle display floater, it is optional in the present embodiment
Display floater is row upset drive pattern, i.e., before display a two field picture when, the holding wire S1 of data signal circuit 130 is exported just
Polarity data signal, holding wire S2 output negative pole data signals, when next two field picture is shown, data signal circuit 130
Holding wire S1 output negative pole data signals, holding wire S2 output cathode data signals.
In the present embodiment the voltage magnitude of optional i-th thread switching control is second electrical level letter from the first level signal saltus step
Number opened with controlling the i-th switch element, meanwhile, the voltage magnitude of the i-th Capacity control line is the 4th from three level signal saltus step
Level signal is discharged with controlling the i-th capacity cell；The voltage magnitude of the i-th thread switching control is first from the saltus step of second electrical level signal
Level signal is closed with controlling the i-th switch element, meanwhile, the voltage magnitude of the i-th Capacity control line is from the 4th level signal saltus step
Charged with controlling the i-th capacity cell for three level signal；Wherein, second electrical level signal is more than the first level signal, and the 3rd is electric
Ordinary mail number is more than the 4th level signal.Also optional first level signal is identical with the 4th level signal；Second electrical level signal and
Three level signal is identical.In the present embodiment preferably the first level signal is -7V, and second electrical level signal is 12V；3rd level is believed
Number be 12V, the 4th level signal be -7V.It will be understood by those skilled in the art that the first level signal is less than nmos pass transistor
The voltage signal of blanking voltage, second electrical level signal is more than the voltage signal of nmos pass transistor conducting voltage, and at other
The first level signal is not limited in embodiment and is equal to three level signal equal to the 4th level signal, and second electrical level signal.
Specifically, show when previous frame image, the holding wire S1 output cathodes data letter of data signal circuit 130
Number, holding wire S2 output negative pole data signals, wherein during a scan line Gate output scanning signal, corresponding one-row pixels
In pixel switch (not shown) open.
At the t1 moment, the 1st thread switching control CKH1 is that rising edge is exported to control respectively to cut for high level from low transition
The 1st switch element T1 for changing group 120 is opened, and corresponding 1st data wire D1 receives positive polarity data signal；Meanwhile, the 1st electric capacity control
Line XCKH1 processed is that low level signal is first i.e. to low 1 electric capacity with the voltage for dragging down the 1st the second ends of capacity cell C1 from high level saltus step
Part C1 is discharged, and the voltage of corresponding 1st capacity cell C1 first ends is reduced, so as to drag down the voltage of the 1st data wire D1.
Know the charging voltage of the voltage determination data line to pixel of switch element close moment data wire, therefore here does not discuss switch unit
Part opens impact of the moment to data line voltage.
At the t1 moment between the t2 moment, what the 1st switch element of each switch groups 120 exported in data signal circuit 130
1st data wire D1 of data signal transmission to corresponding data line group 110；Wherein, the 1st switch unit of first switch groups 120
Part T1 is by the 1st data wire D1 of positive polarity data signal transmission to first data line group 110；The 1st of second switch groups 120
Switch element T1 is by the 1st data wire D1 of negative polarity data signal transmission to second data line group 110.
At the t2 moment, the 1st thread switching control CKH1 is that trailing edge is exported to control for low level signal from high level saltus step
1st switch element T1 of each switch groups 120 is closed, then the 1st data wire D1 is in suspended state (floating), while the 1st opens
The parasitic capacitance for closing element T1 drags down the magnitude of voltage of the 1st data wire D1 at the CKH1 trailing edge moment；Meanwhile, the 1st Capacity control line
XCKH1 is high level signal drawing high the voltage at the 1st the second ends of capacity cell C1 i.e. to the 1st capacity cell C1 from low transition
Charge, the voltage of corresponding 1st capacity cell C1 first ends is raised, so as to draw high and stabilize the voltage of the 1st data wire D1.
Reduced by the effect of parasitic capacitance of the 1st switch element T1 in the voltage of the data wire D1 of t2 moment the 1st, while the 1st
The voltage of data wire D1 is also affected by the 1st capacity cell C1 and is raised, then the 1st capacity cell C1 compensate for the 1st data wire D1
The magnitude of voltage reduced by effect of parasitic capacitance, reduces shadow of the parasitic capacitance of the 1st switch element T1 to the 1st data wire D1
Ring.Known 1st data wire D1 determines the charging voltage for being transferred to pixel in the magnitude of voltage of the 1st switch element T1 close moments,
Therefore the present embodiment effectively reduces impact of the switch element parasitic capacitance to data line voltage, and then effectively reduces data wire
The voltage drop value of far-end and the voltage drop value of proximal end, so as to effectively reduce the voltage differences of data wire far-end and proximal end,
The problems such as improving the light and shade difference and brightness disproportionation of display floater, improves the display effect of display floater.In the same manner other are counted
Also reduce according to the far-end and proximal end voltage differences of line.
In order to verify the effect of this utility model and prior art, at this to showing shown in display floater shown in Figure 1A and Fig. 2A
Show that panel has carried out showing test.Test result is as shown in the table：
| Brightness disproportionation | Postpone | Technique | Take non-display area area | |
| Figure 1A | Greatly | In | Typically | NMOS |
| Fig. 2A | It is little | In | Typically | NMOS |
The nmos pass transistor of multiplexer circuit takes the non-display area of display floater in display floater shown in Figure 1A
Area, and capacity cell can be realized by simple two-layer ITO and is formed directly into corresponding in display floater shown in Fig. 2A
The top of switch element (NMOS), therefore the switch element only in switch groups takes the non-display area area of display floater, shows
So Fig. 2A can realize narrow frame.And the capacity cell size of display floater shown in Fig. 2A is adjustable, by adjusting capacity cell
Size can compensate for the data line voltage difference problem that parasitic capacitance causes and be easy for that compensation and improvement can be reached, and
The technique for adjusting capacity cell size is very simple, it is clear that Fig. 2A does not increase process complexity and manufacturing process is simple.Figure 1A institutes
Show that display floater occurs that light and shade is different, the display problem of brightness disproportionation, and display floater shown in Fig. 2A can be effectively improved it is aobvious
Show the brightness disproportionation problem of panel.In sum, display floater shown in Fig. 2A has narrow frame, manufacturing process simple and improves aobvious
Show the advantages such as effect, better than display floater shown in Figure 1A.
The display floater that the present embodiment is provided, the i-th thread switching control trailing edge exports to control the i-th switch element (NMOS)
During closing, the parasitic capacitance of the i-th switch element causes the voltage of the i-th data wire to decline, i-th the i-th electric capacity of Capacity control line traffic control
Element charges causes the voltage of the i-th data wire to raise, then the voltage that data wire declines is offset with elevated voltage, i.e. electricity
The presence for holding element compensate for the impact of the parasitic capacitance to data line voltage of switch element.It follows that middle drop in this enforcement
Impact of the parasitic capacitance of low switch element to the voltage of data wire, and then reduce the far-end voltage drop value of data wire and near
Voltage drop value at end, so as to reduce the far-end of data wire and the voltage differences of proximal end, having reached improves the bright of display floater
The purpose of the display effect of the problems such as dark different and brightness disproportionation and raising display floater.Additionally, the display surface of the present embodiment
The area of plate capacity cell is less and simple structure, therefore the also advantage with low cost of manufacture, process is simple and narrow frame.
This utility model another embodiment also provides a kind of display floater, and the display floater shows with described in above-described embodiment
The difference for showing panel is that the switch element of each switch groups is PMOS thin film transistor (TFT)s in the display floater.The present embodiment is carried
For display floater as shown in Figure 4 A, wherein the switch element of each switch groups 120 is PMOS thin film transistor (TFT)s.
As shown in Figure 4 B for Fig. 4 A driver' s timing figure, in the present embodiment the i-th thread switching control trailing edge output it is same
When i-th the i-th capacity cell of Capacity control line traffic control charge；I-th Capacity control line while i-th thread switching control rising edge is exported
Control the electric discharge of the i-th capacity cell.Charging electricity of the voltage determination data line of known switch element close moment data wire to pixel
Pressure, therefore here only discusses the driving process at impact of the switch element close moment to data line voltage, i.e. t2 moment.
Wherein, the voltage magnitude of the i-th thread switching control is second electrical level signal controlling i-th from the first level signal saltus step
Switch element is opened, meanwhile, the voltage magnitude of the i-th Capacity control line is the 4th level signal to control from three level signal saltus step
Make the charging of the i-th capacity cell；The voltage magnitude of the i-th thread switching control is the first level signal controlling from the saltus step of second electrical level signal
The closing of the i-th switch element is made, meanwhile, the voltage magnitude of the i-th Capacity control line is the 3rd level letter from the 4th level signal saltus step
Number with control the i-th capacity cell electric discharge；Wherein, the first level signal is more than second electrical level signal, and three level signal is less than the
Four level signals.First level signal is identical with the 4th level signal；Second electrical level signal and three level signal are identical.At this
Preferably the first level signal is 12V in embodiment, and second electrical level signal is -7V；Three level signal is -7V, and the 4th level is believed
Number be+12V.It will be understood by those skilled in the art that the first level signal is to believe more than the voltage of PMOS transistor blanking voltage
Number, second electrical level signal is, less than the voltage signal of PMOS transistor conducting voltage, and not limit in other embodiments
One level signal is equal to the 4th level signal, and second electrical level signal is equal to three level signal.
At the t2 moment, the 1st thread switching control CKH1 is that rising edge is exported to control for high level signal from low transition
1st switch element T1 of each switch groups 120 is closed, then the 1st data wire D1 is in suspended state (floating), while the 1st opens
The parasitic capacitance for closing element T1 draws high the magnitude of voltage of the 1st data wire D1 in CKH1 rising edge times；Meanwhile, the 1st Capacity control line
XCKH1 is low level signal dragging down the voltage at the 1st the second ends of capacity cell C1 i.e. to the 1st capacity cell C1 from high level saltus step
Electric discharge, the voltage of corresponding 1st capacity cell C1 first ends accordingly reduces, and so as to drag down and stabilizes the electricity of the 1st data wire D1
Pressure.
Raised by the effect of parasitic capacitance of the 1st switch element T1 in the voltage of the data wire D1 of t2 moment the 1st, while the 1st
The voltage of data wire D1 is also affected by the 1st capacity cell C1 and is reduced, then the 1st data wire D1 that the 1st capacity cell C1 is dragged down
Magnitude of voltage compensate for the 1st data wire D1 by effect of parasitic capacitance and elevated magnitude of voltage, reduce posting for the 1st switch element T1
Impact of the raw electric capacity to the 1st data wire D1.Therefore the present embodiment effectively reduces switch element parasitic capacitance to data line voltage
Impact, and then the voltage drop value of data wire far-end and the voltage drop value of proximal end are effectively reduced, so as to effectively reduce data
Line far-end and the voltage differences of proximal end, improve display floater light and shade is different and the problems such as brightness disproportionation, improves aobvious
Show the display effect of panel.In the same manner the far-end of other data wires and proximal end voltage differences are also reduced.
On the basis of above-mentioned any embodiment, this utility model another embodiment also provides a kind of display floater, should
Display floater is that switch groups are 1 in m=2, i.e. display floater with the difference of above-mentioned any embodiment:2 drive patterns, one
Holding wire drives two data lines.The display floater of the present embodiment offer is provided, wherein, in the display floater, each
Data line group 110 includes the 1st data wire D2 of data wire D1 to the 2nd being arranged in order in the first direction；Each switch groups 120 includes
The 1st switch element T2 of switch element T1 to the 2nd that are arranged in order in the first direction and correspond with 2 switch elements
The 1st capacity cell C2 of capacity cell C1 to the 2nd；In control circuit 140, ON-OFF control circuit includes the 1st thread switching control
The thread switching control CKH2 of CKH1 to the 2nd, capacitor control circuit includes the 1st Capacity control lines of Capacity control line XCKH1 to the 2nd
XCKH2.Preferred switch element is nmos tft in the present embodiment, and shown in the driving method of display floater and Fig. 2A
The type of drive of display floater is identical, will not be described here.
It will be understood by those skilled in the art that the drive pattern of switch groups includes but is not limited to 1 in display floater:2 drive
Pattern, is such as also chosen as 1:3 drive patterns, 1:4 drive patterns etc., related practitioner can be according to the demand for showing product voluntarily
The drive pattern of the switch groups of display floater is set, and here is no longer limited.Additionally, in display floater switch groups switch element bag
Nmos tft is included but is not limited to, here is also chosen as PMOS thin film transistor (TFT)s, corresponding driver' s timing adaptations.
On the basis of above-mentioned any embodiment, this utility model further embodiment also provides a kind of display floater, should
Display floater is that switch groups are 1 in m=3, i.e. display floater with the difference of above-mentioned any embodiment:3 drive patterns, one
Holding wire drives three data lines.The display floater of the present embodiment offer is provided, wherein, in the display floater, each
Data line group 110 includes the 1st data wire D3 of data wire D1 to the 3rd being arranged in order in the first direction；Each switch groups 120 includes
The 1st switch element T3 of switch element T1 to the 3rd that are arranged in order in the first direction and correspond with 3 switch elements
The 1st capacity cell C3 of capacity cell C1 to the 3rd；In control circuit 140, ON-OFF control circuit includes the 1st thread switching control
The thread switching control CKH3 of CKH1 to the 3rd, capacitor control circuit includes the 1st Capacity control lines of Capacity control line XCKH1 to the 3rd
XCKH3.Preferred switch element is nmos tft in the present embodiment, and shown in the driving method of display floater and Fig. 2A
The type of drive of display floater is identical, will not be described here.
On the basis of above-mentioned any embodiment, this utility model embodiment also provides a kind of display device, the display dress
Put including the display floater described in as above any embodiment.
Note, above are only preferred embodiment of the present utility model and institute's application technology principle.Those skilled in the art's meeting
Understand, this utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various bright
Aobvious change, readjust and substitute without departing from protection domain of the present utility model.Therefore, although by above example
This utility model is described in further detail, but this utility model is not limited only to above example, without departing from
In the case that this utility model is conceived, more other Equivalent embodiments can also be included, and scope of the present utility model is by appended
Right determine.
Claims (10)
1. a kind of display floater, it is characterised in that include：
The multiple data line groups being arranged in order in the first direction, each described data line group includes what is be arranged in order in the first direction
1st data wire is to m data wires；
With the one-to-one multiple switch groups of the plurality of data line group, each described switch groups includes arranging successively in the first direction
1st switch element of row is to m switch elements and electric to m with one-to-one 1st capacity cell of the m switch element
Hold element, the outfan of the i-th switch element of each switch groups and the first end of the i-th capacity cell are described with corresponding
The i-th data wire electrical connection of data line group；
Data signal circuit, the data signal circuit is electrically connected with the input of i-th switch element；
Control circuit, including ON-OFF control circuit and capacitor control circuit, the ON-OFF control circuit includes the 1st thread switching control
To m thread switching controls, the i-th thread switching control of the ON-OFF control circuit and the i-th switch element of each switch groups
Control end electrical connection, the capacitor control circuit include the 1st Capacity control line to m Capacity control lines, the Capacity control
I-th Capacity control line of circuit is electrically connected with the second end of the i-th capacity cell of switch groups each described；The i-th switch control
I-th capacity cell electric discharge described in i-th Capacity control line traffic control described in while line rising edge processed is exported；I-th on-off control
The i-th capacity cell described in the i-th Capacity control line traffic control charges described in while line trailing edge is exported；
Wherein, m is the integer more than 1, i=1,2 ..., m.
2. display floater according to claim 1, it is characterised in that it is thin that the switch element of each switch groups is NMOS
Film transistor.
3. display floater according to claim 1, it is characterised in that it is thin that the switch element of each switch groups is PMOS
Film transistor.
4. display floater according to claim 2, it is characterised in that
The voltage magnitude of i-th thread switching control is second electrical level signal controlling described i-th from the first level signal saltus step
Switch element is opened, meanwhile, the voltage magnitude of the i-th Capacity control line is the 4th level signal from three level signal saltus step
To control the i-th capacity cell electric discharge；
The voltage magnitude of i-th thread switching control is the first level signal controlling described i-th from the saltus step of second electrical level signal
Switch element is closed, meanwhile, the voltage magnitude of the i-th Capacity control line is three level signal from the 4th level signal saltus step
Charged with controlling i-th capacity cell；
Wherein, the second electrical level signal is more than first level signal, and the three level signal is electric more than the described 4th
Ordinary mail number.
5. display floater according to claim 4, it is characterised in that first level signal and the 4th level are believed
It is number identical；The second electrical level signal is identical with the three level signal.
6. display floater according to claim 3, it is characterised in that
The voltage magnitude of i-th thread switching control is second electrical level signal controlling described i-th from the first level signal saltus step
Switch element is opened, meanwhile, the voltage magnitude of the i-th Capacity control line is the 4th level signal from three level signal saltus step
Charged with controlling i-th capacity cell；
The voltage magnitude of i-th thread switching control is the first level signal controlling described i-th from the saltus step of second electrical level signal
Switch element is closed, meanwhile, the voltage magnitude of the i-th Capacity control line is three level signal from the 4th level signal saltus step
To control the i-th capacity cell electric discharge；
Wherein, first level signal is more than the second electrical level signal, and the three level signal is electric less than the described 4th
Ordinary mail number.
7. display floater according to claim 6, it is characterised in that first level signal and the 4th level are believed
It is number identical；The second electrical level signal is identical with the three level signal.
8. the display floater according to any one of claim 1～7, it is characterised in that m=3；Or, m=2.
9. display floater according to claim 1, it is characterised in that the data signal circuit include the first holding wire and
Secondary signal line, the input of the switch element of each described switch groups that first holding wire sorts with odd number is electrically connected, institute
The input for stating the switch element of each described switch groups that secondary signal line sorts with even number is electrically connected, wherein, first letter
The opposite polarity of the second data signal that the polarity of the first data signal of number line output is exported with the secondary signal line.
10. a kind of display device, it is characterised in that include：Display floater as described in any one of claim 1-9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621142502.9U CN206096714U (en) | 2016-10-20 | 2016-10-20 | Display panel and display device |
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|---|---|---|---|
| CN201621142502.9U CN206096714U (en) | 2016-10-20 | 2016-10-20 | Display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2019085098A1 (en) * | 2017-10-31 | 2019-05-09 | 武汉华星光电技术有限公司 | Array substrate, testing method and display device |
| CN109801594A (en) * | 2017-11-17 | 2019-05-24 | 上海和辉光电有限公司 | A kind of display panel and display device |
| CN109872700A (en) * | 2019-04-18 | 2019-06-11 | 京东方科技集团股份有限公司 | A kind of display module and its driving method, display device |
| US10777107B2 (en) | 2017-10-31 | 2020-09-15 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array substrate, testing method and display apparatus |
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2016
- 2016-10-20 CN CN201621142502.9U patent/CN206096714U/en active Active
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| WO2019085098A1 (en) * | 2017-10-31 | 2019-05-09 | 武汉华星光电技术有限公司 | Array substrate, testing method and display device |
| US10777107B2 (en) | 2017-10-31 | 2020-09-15 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array substrate, testing method and display apparatus |
| CN109801594A (en) * | 2017-11-17 | 2019-05-24 | 上海和辉光电有限公司 | A kind of display panel and display device |
| CN109801594B (en) * | 2017-11-17 | 2021-02-12 | 上海和辉光电股份有限公司 | Display panel and display device |
| CN109872700A (en) * | 2019-04-18 | 2019-06-11 | 京东方科技集团股份有限公司 | A kind of display module and its driving method, display device |
| CN109872700B (en) * | 2019-04-18 | 2021-03-26 | 京东方科技集团股份有限公司 | Display module, driving method thereof and display device |
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