CN206021149U - Carried on vehicle computer based on ARM RISC core processors - Google Patents
Carried on vehicle computer based on ARM RISC core processors Download PDFInfo
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- CN206021149U CN206021149U CN201620767617.0U CN201620767617U CN206021149U CN 206021149 U CN206021149 U CN 206021149U CN 201620767617 U CN201620767617 U CN 201620767617U CN 206021149 U CN206021149 U CN 206021149U
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Abstract
This utility model is related to the vehicle-mounted computer in motor vehicle driving examination system, specifically a kind of carried on vehicle computer based on ARM RISC core processors.This utility model solves the problems, such as that the vehicle-mounted computer startup in existing motor vehicle driving examination system is slow, stability is poor, heating is big, high cost.Based on the carried on vehicle computer of ARM RISC core processors, including DC D/C power circuits, S5PV210 processor core cores, audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 serial port circuits, Clock battery trickle charge-discharge circuit, LCD Interface circuit, FM transmission circuits, audio power amplifier circuit, usb hub and usb circuit, USB virtual serial port circuits.This utility model is applied to motor vehicle driving examination system.
Description
Technical field
This utility model is related to the vehicle-mounted computer in motor vehicle driving examination system, specifically a kind of based in ARM RISC
The carried on vehicle computer of core processor.
Background technology
Vehicle-mounted computer in existing motor vehicle driving examination system is generally with X 86 processor as core, and is based on desktop
The industrial computer of computer system exploitation.This kind of industrial computer is limited due to itself principle, generally existing start slow, stability poor,
The hot big, problem of high cost, thus seriously constrains the performance of motor vehicle driving examination system.It is based on this, it is necessary to invent one
Brand-new vehicle-mounted computer is planted, to solve the problems referred to above of the presence of the vehicle-mounted computer in existing motor vehicle driving examination system.
Content of the invention
This utility model starts slow, stability to solve the vehicle-mounted computer in existing motor vehicle driving examination system
Difference, the big, problem of high cost of generating heat, there is provided a kind of carried on vehicle computer based on ARM RISC core processors.
This utility model adopts the following technical scheme that realization：
Based on the carried on vehicle computer of ARM RISC core processors, including DC-DC power source circuit, S5PV210 process
Device core board, audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 serial port powers
Road, Clock battery trickle charge-discharge circuit, LCD Interface circuit, FM transmission circuits, audio power amplifier circuit, usb hub and
Usb circuit, USB virtual serial port circuits；Wherein, S5PV210 processor cores core, audio coding decoding circuit, Ethernet connect
Mouth circuit, GPS interface circuit, SD card interface circuit, RS232 serial port circuits, Clock battery trickle charge-discharge circuit, liquid crystal display screen connect
Mouthful circuit, FM transmission circuits, audio power amplifier circuit, usb hub and usb circuit, USB virtual serial ports circuit are and DC-
D/C power circuit connects；Audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 strings
Mouthful circuit, Clock battery trickle charge-discharge circuit, LCD Interface circuit, usb hub and usb circuit with
S5PV210 processor cores core connects；FM transmission circuits are connected with audio coding decoding circuit；Audio power amplifier circuit respectively with audio frequency
Coding-decoding circuit and the connection of FM transmission circuits；USB virtual serial ports circuit respectively with RS232 serial port circuits and usb hub and USB
Interface circuit connects.
Specific work process is as follows：DC-DC power source circuit is respectively to S5PV210 processor core cores, audio coding decoding electricity
Road, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 serial port circuits, Clock battery trickle discharge and recharge electricity
Road, LCD Interface circuit, FM transmission circuits, audio power amplifier circuit, usb hub and usb circuit, USB virtual serial ports
Circuit is powered, and thereby guarantees that each normal circuit operation.S5PV210 processor cores core includes S5PV210 primary processors,
Realize every data processing and the control function of vehicle-mounted computer.Audio coding decoding circuit realiration audio coding decoding function.Ethernet
Ethernet interface function realized by interface circuit.GPS interface circuit realiration GPS interface function.SD card interface circuit realizes that SD card connects
Mouth function.RS232 serial port circuits realize RS232 serial port functions.Clock battery trickle charge-discharge circuit maintains S5PV210 processors
The clock operating of core board.LCD Interface circuit realiration LCD Interface function.FM transmission circuits realize FM transmission-receiving functions.Sound
Frequency power amplifier realizes audio frequency power amplifier function.Usb hub and usb circuit realize usb hub and usb function.
USB virtual serial port circuit realiration USB virtual serial port functions.
Said process is based on, compared with the vehicle-mounted computer in existing motor vehicle driving examination system, described in the utility model
The carried on vehicle computer based on ARM RISC core processors by adopt brand-new ARM architecture processors S5PV210, significantly
Toggle speed and stability is improve, operational heat is effectively reduced, cost is significantly reduced, motor vehicles have thus been obviously improved
The performance of driving test system.
This utility model is rational in infrastructure, design is ingenious, efficiently solves vehicle-mounted in existing motor vehicle driving examination system
Launch computer is slow, stability is poor, heating is big, the problem of high cost, it is adaptable to motor vehicle driving examination system.
Description of the drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 is the circuit theory diagrams of DC-DC power source circuit in this utility model.
Fig. 3 is the Part I circuit theory diagrams of S5PV210 processor cores core in this utility model.
Fig. 4 is the Part II circuit theory diagrams of S5PV210 processor cores core in this utility model.
Fig. 5 is the Part III circuit theory diagrams of S5PV210 processor cores core in this utility model.
Fig. 6 is the circuit theory diagrams of this utility model sound intermediate frequency coding-decoding circuit.
Fig. 7 is the Part I circuit theory diagrams of ethernet interface circuit in this utility model.
Fig. 8 is the Part II circuit theory diagrams of ethernet interface circuit in this utility model.
Fig. 9 is the circuit theory diagrams of GPS interface circuit in this utility model.
Figure 10 is the circuit theory diagrams of SD card interface circuit in this utility model.
Figure 11 is the circuit theory diagrams of RS232 serial port circuits in this utility model.
Figure 12 is the circuit theory diagrams of Clock battery trickle charge-discharge circuit in this utility model.
Figure 13 is the circuit theory diagrams of LCD Interface circuit in this utility model.
Figure 14 is the circuit theory diagrams of FM transmission circuits in this utility model.
Figure 15 is the circuit theory diagrams of this utility model sound intermediate frequency power amplifier.
Figure 16 is the Part I circuit theory diagrams of usb hub and usb circuit in this utility model.
Figure 17 is the Part II circuit theory diagrams of usb hub and usb circuit in this utility model.
Figure 18 is the circuit theory diagrams of USB virtual serial ports circuit in this utility model.
Specific embodiment
Based on the carried on vehicle computer of ARM RISC core processors, including DC-DC power source circuit, S5PV210 process
Device core board, audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 serial port powers
Road, Clock battery trickle charge-discharge circuit, LCD Interface circuit, FM transmission circuits, audio power amplifier circuit, usb hub and
Usb circuit, USB virtual serial port circuits；Wherein, S5PV210 processor cores core, audio coding decoding circuit, Ethernet connect
Mouth circuit, GPS interface circuit, SD card interface circuit, RS232 serial port circuits, Clock battery trickle charge-discharge circuit, liquid crystal display screen connect
Mouthful circuit, FM transmission circuits, audio power amplifier circuit, usb hub and usb circuit, USB virtual serial ports circuit are and DC-
D/C power circuit connects；Audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 strings
Mouthful circuit, Clock battery trickle charge-discharge circuit, LCD Interface circuit, usb hub and usb circuit with
S5PV210 processor cores core connects；FM transmission circuits are connected with audio coding decoding circuit；Audio power amplifier circuit respectively with audio frequency
Coding-decoding circuit and the connection of FM transmission circuits；USB virtual serial ports circuit respectively with RS232 serial port circuits and usb hub and USB
Interface circuit connects.
The DC-DC power source circuit include socket CN6, wave filter L2, two K7805-500 voltage stabilizing chips P5, P6, two
LT1117-3.3V linear voltage stabilization chip U1, U3；The input port of wave filter L2 is connected with socket CN6；The outfan of wave filter L2
Mouth is used as 12V supply ports；The input port of two K7805-500 voltage stabilizing chips P5, P6 is connected with 12V supply ports；Two
The output port of individual K7805-500 voltage stabilizing chips P5, P6 is as 5V supply ports；Two LT1117-3.3V linear voltage stabilization cores
The input port of piece U1, U3 is connected with 5V supply ports；The outfan of two LT1117-3.3V linear voltage stabilization chip U1, U3
Mouth is as 3.3V supply ports；
During specific works, the filtered first device L2 of outer power voltage is filtered into 12V supply voltages, then through two
K7805-500 voltage stabilizing chips P5, P6 are converted to 5V supply voltages, most afterwards through two LT1117-3.3V linear voltage stabilization chip U1, U3
3.3V supply voltages are converted to, are thus powered；
The S5PV210 processor cores core includes S5PV210 primary processor H；The power end of S5PV210 primary processor H
Mouth is connected with 5V supply ports and 3.3V supply ports respectively；
The audio coding decoding circuit includes WM8960 audio coding decoding chips U6, electric capacity electret microphone P7；
The power port of WM8960 audio coding decoding chips U6 is connected with 5V supply ports and 3.3V supply ports respectively；WM8960 audio frequency
Codec chip U6 and S5PV210 primary processor H are bi-directionally connected；The input port and electric capacity of WM8960 audio coding decoding chips U6
Electret microphone P7 connects；
During specific works, S5PV210 primary processors H by WM8960 audio coding decoding chips U6 respectively with electric capacity electret
Mike P7, second RDA5820 digital tuning frequency modulation chip P13, first TDA2822M power amplifier chips U2 carry out signal biography
Defeated；In signals transmission, WM8960 audio coding decoding chips U6 carry out audio coding decoding process to signal, are achieved in sound
Frequency codec functions；
The ethernet interface circuit includes DM9000 Ethernet chip U7, H1102 magnetic transformer T1；DM9000
The power port of Ethernet chip U7 is connected with 3.3V supply ports；DM9000 Ethernet chip U7 and S5PV210
Primary processor H is bi-directionally connected；DM9000 Ethernet chips U7 is by H1102 magnetic transformers T1 and the two-way companies of socket CN6
Connect；
During specific works, S5PV210 primary processors H passes through DM9000 Ethernet chip U7, H1102 magnetic transformers
T1, socket CN6 and Ethernet carry out signal transmission；In signals transmission, DM9000 Ethernet chip U7 are to signal
Differential conversion is carried out, H1102 magnetic transformer T1 are filtered to signal, are achieved in Ethernet interface function；
The GPS interface circuit includes UAN480S near radio module P4,2.0mm interval S IP connector CN4；
The power port of UAN480S near radio modules P4 is connected with 5V supply ports；UAN480S near radio modules P4 pass through
2.0mm interval S IP connector CN4 and S5PV210 primary processor H are bi-directionally connected；
During specific works, S5PV210 primary processors H is connected by UAN480S near radio modules P4,2.0mm interval S IP
Meeting device CN4 carries out signal transmission with Test Centre；In signals transmission, UAN480S near radio modules P4 are to signal
GPS message conversions are carried out, GPS interface function is achieved in；
The SD card interface circuit includes SD card interface chip U14；The power port of SD card interface chip U14 is supplied with 3.3V
Electric port connection；SD card interface chip U14 and S5PV210 primary processor H are bi-directionally connected；
During specific works, S5PV210 primary processors H carries out signal transmission by SD card interface chip U14 with SD card；In letter
In number transmitting procedure, SD card interface chip U14 is changed to signal, is achieved in SD card interface function；
The RS232 serial port circuits include two MAX3232EEY chip U8, U11；Two MAX3232EEY chip U8,
The power port of U11 is connected with 3.3V supply ports；First MAX3232EEY chips U8 respectively with S5PV210 primary processors
H and socket CN6 are bi-directionally connected；Second MAX3232EEY chips U11 and socket CN6 is bi-directionally connected；
During specific works, S5PV210 primary processors H is set by first MAX3232EEY chip U8, socket CN6 and outside
For signal transmission is carried out, second MAX3232EEY chips U11 carries out signal biography by socket CN6 with external equipment
Defeated；In signals transmission, two MAX3232EEY chips U8, U11 carry out RS232 conversions to signal, are achieved in RS232
Serial port function；
The Clock battery trickle charge-discharge circuit includes diode D6, CR1220 button cell BT1, current-limiting resistance R73；
The anode of diode D6 is connected with 3.3V supply ports；The negative electrode of diode D6 is by current-limiting resistance R73 and S5PV210 main process tasks
The power port of device H connects, and the negative electrode of diode D6 is connected with the positive pole of CR1220 button cell BT1；CR1220 buttons electricity
The minus earth of pond BT1；
During specific works, 3.3V supply ports are charged to CR1220 button cells BT1 by diode D6, CR1220 buttons
Battery BT1 provides micro-current by current-limiting resistance R73 to the real-time clock module of S5PV210 primary processor H, thus maintains
The clock operating of S5PV210 primary processor H；
The LCD Interface circuit includes 0.5mm spacing FPC connector LCD2,1.0mm spacing FPC connector CN12；
0.5mm spacing FPC connector LCD2 is connected with the output port of S5PV210 primary processor H；1.0mm spacing FPC connector CN12
It is connected with the input port of S5PV210 primary processor H；
During specific works, S5PV210 primary processors H carries out signal by 0.5mm spacing FPC connector LCD2 and liquid crystal display screen
Transmission, S5PV210 primary processors H carry out signal transmission by 1.0mm spacing FPC connector CN12 and electric resistance touch screen, thus
Realize LCD Interface function；
The FM transmission circuits include two RDA5820 digital tuning frequency modulation chip P12, P13；Two RDA5820 numerals
The power port of tuning modulation chip P12, P13 is connected with 3.3V supply ports；First RDA5820 digital tuning frequency modulation core
Piece P12 is bi-directionally connected with socket CN6；The input port of second RDA5820 digital tuning frequency modulation chip P13 and WM8960 audio frequency
The output port connection of codec chip U6；
During specific works, first RDA5820 digital tuning frequency modulation chip P12 is carried out with Test Centre by socket CN6
Signal transmission, second RDA5820 digital tuning frequency modulation chips P13 carry out signal biography with WM8960 audio coding decoding chips U6
Defeated, it is achieved in FM transmission-receiving functions；
The audio power amplifier circuit include 78M06 linear voltage regulator U5, two TDA2822M power amplifier chips U2, U4, two
Speaker CN1, CN2；The input port of 78M06 linear voltage regulator U5 is connected with 12V supply ports；78M06 linear voltage regulator U5
Output port be connected with the power port of two TDA2822M power amplifier chips U2, U4 respectively；First TDA2822M power amplifier core
The input port of piece U2 is connected with the output port of WM8960 audio coding decoding chips U6；First TDA2822M power amplifier chips U2
Output port be connected with first speaker CN1；The input port of second TDA2822M power amplifier chips U4 and second
The output port connection of RDA5820 digital tuning frequency modulation chip P13；The output port of second TDA2822M power amplifier chips U4 with
Second speaker CN2 connection；
During specific works, WM8960 audio coding decoding chips U6 are by first TDA2822M power amplifier chips U2 and first
Speaker CN1 carries out signal transmission, and WM8960 audio coding decoding chips U6 are by second TDA2822M power amplifier chips U4 and the
Two speaker CN2 carry out signal transmission；In signals transmission, two TDA2822M power amplifier chips U2, U4 enter to signal
Row power amplification, two speakers CN1, CN2 are played out to signal, are achieved in audio frequency power amplifier function；
The usb hub and usb circuit include mini-B type USB socket U9, AU9254A21 usb hubs
U10, A type USB socket U15；Mini-B types USB socket U9 is bi-directionally connected with S5PV210 primary processor H；AU9254A21 USB sets
The power port of line device U10 is connected with 5V supply ports；AU9254A21 usb hubs U10 respectively with S5PV210 primary processors
H and A type USB socket U15 is bi-directionally connected；
During specific works, S5PV210 primary processors H is set with examination program debugging deployment by mini-B types USB socket U9
For signal transmission is carried out, S5PV210 primary processors H is by AU9254A21 usb hub U10, A types USB socket U15 and outside
USB device carries out signal transmission；In signals transmission, AU9254A21 usb hubs U10 is by S5PV210 primary processor H
USB port all the way be converted to four road USB ports, wherein two-way USB port is connected to A type USB socket U15, is achieved in USB
Hub and usb function；
The USB virtual serial ports circuit includes two FT232 chip U12, U13；The electricity of two FT232 chip U12, U13
Source port is connected with 3.3V supply ports；Two FT232 chips U12, U13 with AU9254A21 usb hubs U10 and
Two MAX3232EEY chip U11 are bi-directionally connected；
During specific works, AU9254A21 usb hubs U10 is by two FT232 chips U12, U13 and second
MAX3232EEY chips U11 carries out signal transmission；In signals transmission, two FT232 chips U12, U13 are by other two-way
USB port is converted to universal asynchronous serial, is achieved in USB virtual serial port functions.
Claims (2)
1. a kind of carried on vehicle computer based on ARM RISC core processors, it is characterised in that：Including DC-DC power source electricity
Road, S5PV210 processor core cores, audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card interface electricity
Road, RS232 serial port circuits, Clock battery trickle charge-discharge circuit, LCD Interface circuit, FM transmission circuits, audio frequency power amplifier electricity
Road, usb hub and usb circuit, USB virtual serial port circuits；Wherein, S5PV210 processor cores core, audio coding decoding
Circuit, ethernet interface circuit, GPS interface circuit, SD card interface circuit, RS232 serial port circuits, Clock battery trickle discharge and recharge
Circuit, LCD Interface circuit, FM transmission circuits, audio power amplifier circuit, usb hub and usb circuit, the virtual strings of USB
Mouth circuit is connected with DC-DC power source circuit；Audio coding decoding circuit, ethernet interface circuit, GPS interface circuit, SD card connect
Mouth circuit, RS232 serial port circuits, Clock battery trickle charge-discharge circuit, LCD Interface circuit, usb hub and USB interface
Circuit is connected with S5PV210 processor core cores；FM transmission circuits are connected with audio coding decoding circuit；Audio power amplifier circuit point
It is not connected with audio coding decoding circuit and FM transmission circuits；USB virtual serial ports circuit respectively with RS232 serial port circuits and USB set
Line device and usb circuit connection.
2. the carried on vehicle computer based on ARM RISC core processors according to claim 1, it is characterised in that：
The DC-DC power source circuit includes socket（CN6）, wave filter（L2）, two K7805-500 voltage stabilizing chips（P5、P6）, two
Individual LT1117-3.3V linear voltage stabilizations chip（U1、U3）；Wave filter（L2）Input port and socket（CN6）Connection；Wave filter
（L2）Output port as 12V supply ports；Two K7805-500 voltage stabilizing chips（P5、P6）Input port with 12V supply
Electric port connection；Two K7805-500 voltage stabilizing chips（P5、P6）Output port as 5V supply ports；Two LT1117-
3.3V linear voltage stabilization chips（U1、U3）Input port be connected with 5V supply ports；Two LT1117-3.3V linear voltage stabilization cores
Piece（U1、U3）Output port as 3.3V supply ports；
The S5PV210 processor cores core includes S5PV210 primary processors（H）；S5PV210 primary processors（H）Power end
Mouth is connected with 5V supply ports and 3.3V supply ports respectively；
The audio coding decoding circuit includes WM8960 audio coding decoding chips（U6）, electric capacity electret microphone（P7）；
WM8960 audio coding decoding chips（U6）Power port be connected with 5V supply ports and 3.3V supply ports respectively；WM8960 sounds
Frequency codec chip（U6）With S5PV210 primary processors（H）It is bi-directionally connected；WM8960 audio coding decoding chips（U6）Input
Mouth and electric capacity electret microphone（P7）Connection；
The ethernet interface circuit includes DM9000 Ethernet chips（U7）, H1102 magnetic transformers（T1）；DM9000
Ethernet chip（U7）Power port be connected with 3.3V supply ports；DM9000 Ethernet chips（U7）With
S5PV210 primary processors（H）It is bi-directionally connected；DM9000 Ethernet chips（U7）By H1102 magnetic transformers（T1）With
Socket（CN6）It is bi-directionally connected；
The GPS interface circuit includes UAN480S near radio modules（P4）, 2.0mm interval S IP connectors（CN4）；
UAN480S near radio modules（P4）Power port be connected with 5V supply ports；UAN480S near radio modules（P4）
By 2.0mm interval S IP connectors（CN4）With S5PV210 primary processors（H）It is bi-directionally connected；
The SD card interface circuit includes SD card interface chip（U14）；SD card interface chip（U14）Power port and 3.3V supply
Electric port connection；SD card interface chip（U14）With S5PV210 primary processors（H）It is bi-directionally connected；
The RS232 serial port circuits include two MAX3232EEY chips（U8、U11）；Two MAX3232EEY chips（U8、
U11）Power port be connected with 3.3V supply ports；First MAX3232EEY chip（U8）Respectively with the main places of S5PV210
Reason device（H）And socket（CN6）It is bi-directionally connected；Second MAX3232EEY chip（U11）With socket（CN6）It is bi-directionally connected；
The Clock battery trickle charge-discharge circuit includes diode（D6）, CR1220 button cells（BT1）, current-limiting resistance
（R73）；Diode（D6）Anode be connected with 3.3V supply ports；Diode（D6）Negative electrode pass through current-limiting resistance（R73）With
S5PV210 primary processors（H）Power port connection, and diode（D6）Negative electrode and CR1220 button cells（BT1）Just
Pole connects；CR1220 button cells（BT1）Minus earth；
The LCD Interface circuit includes 0.5mm spacing FPC connector（LCD2）, 1.0mm spacing FPC connector（CN12）；
0.5mm spacing FPC connector（LCD2）With S5PV210 primary processors（H）Output port connection；1.0mm spacing FPC connector
（CN12）With S5PV210 primary processors（H）Input port connection；
The FM transmission circuits include two RDA5820 digital tuning frequency modulation chips（P12、P13）；Two RDA5820 numerals are adjusted
Harmony frequency chip（P12、P13）Power port be connected with 3.3V supply ports；First RDA5820 digital tuning frequency modulation core
Piece（P12）With socket（CN6）It is bi-directionally connected；Second RDA5820 digital tuning frequency modulation chip（P13）Input port with
WM8960 audio coding decoding chips（U6）Output port connection；
The audio power amplifier circuit includes 78M06 linear voltage regulators（U5）, two TDA2822M power amplifier chips（U2、U4）, two
Speaker（CN1、CN2）；78M06 linear voltage regulators（U5）Input port be connected with 12V supply ports；78M06 linear voltage stabilizations
Device（U5）Output port respectively with two TDA2822M power amplifier chips（U2、U4）Power port connection；First
TDA2822M power amplifier chips（U2）Input port and WM8960 audio coding decoding chips（U6）Output port connection；First
TDA2822M power amplifier chips（U2）Output port and first speaker（CN1）Connection；Second TDA2822M power amplifier chips
（U4）Input port and second RDA5820 digital tuning frequency modulation chip（P13）Output port connection；Second
TDA2822M power amplifier chips（U4）Output port and second speaker（CN2）Connection；
The usb hub and usb circuit include mini-B type USB socket（U9）, AU9254A21 usb hubs
（U10）, A type USB socket（U15）；Mini-B type USB socket（U9）With S5PV210 primary processors（H）It is bi-directionally connected；
AU9254A21 usb hubs（U10）Power port be connected with 5V supply ports；AU9254A21 usb hubs（U10）Point
Not with S5PV210 primary processors（H）With A type USB socket（U15）It is bi-directionally connected；
The USB virtual serial ports circuit includes two FT232 chips（U12、U13）；Two FT232 chips（U12、U13）Electricity
Source port is connected with 3.3V supply ports；Two FT232 chips（U12、U13）With AU9254A21 usb hubs（U10）
With second MAX3232EEY chip（U11）It is bi-directionally connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620767617.0U CN206021149U (en) | 2016-07-21 | 2016-07-21 | Carried on vehicle computer based on ARM RISC core processors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620767617.0U CN206021149U (en) | 2016-07-21 | 2016-07-21 | Carried on vehicle computer based on ARM RISC core processors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206021149U true CN206021149U (en) | 2017-03-15 |
Family
ID=58245024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620767617.0U Expired - Fee Related CN206021149U (en) | 2016-07-21 | 2016-07-21 | Carried on vehicle computer based on ARM RISC core processors |
Country Status (1)
| Country | Link |
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| CN (1) | CN206021149U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106055037A (en) * | 2016-07-21 | 2016-10-26 | 山西大学 | Motor vehicle-mounted computer based on ARM ((Advanced RISC Machine)) RISC (Reduced Instruction Set Computer) core processor |
| CN109118739A (en) * | 2018-09-04 | 2019-01-01 | 杭州电子科技大学 | Vehicle data transmission system based on 4G LTE communication |
-
2016
- 2016-07-21 CN CN201620767617.0U patent/CN206021149U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106055037A (en) * | 2016-07-21 | 2016-10-26 | 山西大学 | Motor vehicle-mounted computer based on ARM ((Advanced RISC Machine)) RISC (Reduced Instruction Set Computer) core processor |
| CN109118739A (en) * | 2018-09-04 | 2019-01-01 | 杭州电子科技大学 | Vehicle data transmission system based on 4G LTE communication |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170315 Termination date: 20200721 |