CN109118739A - Vehicle data transmission system based on 4G LTE communication - Google Patents
Vehicle data transmission system based on 4G LTE communication Download PDFInfo
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- CN109118739A CN109118739A CN201811026244.1A CN201811026244A CN109118739A CN 109118739 A CN109118739 A CN 109118739A CN 201811026244 A CN201811026244 A CN 201811026244A CN 109118739 A CN109118739 A CN 109118739A
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C17/00—Arrangements for transmitting signals characterised by the use of a wireless electrical link
- G08C17/02—Arrangements for transmitting signals characterised by the use of a wireless electrical link using a radio link
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/02—Protocols based on web technology, e.g. hypertext transfer protocol [HTTP]
- H04L67/025—Protocols based on web technology, e.g. hypertext transfer protocol [HTTP] for remote control or remote monitoring of applications
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Abstract
The invention discloses the vehicle data transmission systems based on 4G LTE communication.With the development of car networking technology, the importance of automobile wireless data transmission is also more highlighted.The present invention includes power supply circuit, core board, 4G module chip, 4G mould group interface circuit, antenna interface circuit, control signal level match circuit, command signal electrical level matching circuit, SIM card interface circuit, audio interface circuit and microphone interface circuit.It controls signal level match circuit and 4G module chip and core board is connected by triode, realize the electrical level match for controlling signal between 4G module chip and core board.Command signal electrical level matching circuit connects 4G module chip and core board by the first matching chip and the second matching chip, realizes the electrical level match of command signal between 4G module chip and core board.The present invention realizes the information exchange at vehicle end and remote service end by 4G module chip, provides necessary technical foundation for car networking service.
Description
Technical field
The invention belongs to the remote mobile communication technology fields of car networking, and in particular to a kind of car networking of 4G LTE communication
Light terminal circuit.
Background technique
Orthodox car arrived again to intelligent automobile it is unmanned be future automobile development trend, regardless of be intelligent automobile also
It is the unmanned demand for thering is data network to transmit.Car networking be vehicle-mounted microterminal circuit by being loaded on vehicle and
Datel circuit realizes that moving the reliable and stable data with cloud server in real time transmits, and carries out effectively vehicle to realize
Ground control and offer service.In car networking application, user can enjoy the service of its offer, terminal by various terminal equipment
Application program is all to carry out data interaction by mobile communication and background service system, and background service system is also to adopt with automobile
With the interactive mode of mobile communication, therefore mobile communication technology plays an important role in vehicle terminal software.
Rely primarily on two class technologies in the wireless communication technique of car networking area research at present, short-distance wireless communication and
Remote mobile communication.The former is mainly the short-range communication techniques such as RFID and WIFI, can under the appropriate environment of traffic density
To provide reliable security information transmission service.The latter is mainly the mobile communication technologies such as GPRS, 3G, 4G, and 4G LTE technology is adopted
With technologies such as carrier wave polymerization, the enhancing of uplink and downlink multiple antennas, multiple spot writing transmission, relayings to optimize power system capacity, improve
Network peak speed, spectrum efficiency and propagation delay time, the uplink and downlink peak rate of LTE standard can reach 500Mbps and
1GMbps can support great amount of terminals while access and providing service, be most to be able to satisfy us at present to need from the point of view of index from every side
The mobile communications network asked.
Summary of the invention
The purpose of the present invention is to provide a kind of vehicle data transmission systems based on 4G LTE communication.
The present invention includes power supply circuit, core board, 4G module chip, 4G mould group interface circuit, antenna interface circuit, control
Signal level match circuit, command signal electrical level matching circuit, SIM card interface circuit, audio interface circuit and microphone interface
Circuit.The power supply circuit passes through decompression chip and voltage stabilizing chip is 4G module chip, control signal level match circuit, refers to
Signal level match circuit is enabled to power.The antenna interface circuit connects antenna by antenna terminal, carries out 4G module chip
Communication between remote server.The SIM card interface circuit connects 4G module chip and SIM card by sim card socket.
The microphone interface circuit acquires audio analog signals by microphone and is transferred to audio interface circuit.The audio
Interface circuit by audio chip by microphone interface circuit transmission come audio analog signals be converted into digital data transmission to
Core board.
The 4G mould group interface circuit includes resistance R13, R14, R15 and diode D1, D2, D3.The resistance R13's
One end is connected with the USB_VBUS pin of 4G module chip.One end of resistance R14 is connected with the USB_DM pin of 4G module chip.
One end of resistance R15 is connected with the USB_DP pin of 4G module chip.The cathode of the other end of resistance R13 and diode D1 with
The USB_CONNECTOR_P pin of core board is connected.The cathode of the other end of resistance R14 and diode D2 with core board
USB_CONNECTOR_N pin is connected.The cathode of the other end of resistance R15 and diode D3 with the USBVBUS_ of core board
CONNECTOR pin is connected.Diode D1, diode D2, the positive of diode D3 are grounded.The V_BAT of 4G module chip draws
Foot connects the 4G power supply output end of power supply circuit.GND, TP_GND pin of 4G module chip are grounded.
The control signal level match circuit includes switch matching unit, resets matching unit, wakes up output matching
Unit and wake-up input matching unit.The switch matching unit includes resistance R1, capacitor C13 and triode Q1.The electricity
One end of resistance R1 is connected with the ON/OFF pin of core board.The other end of resistance R1 is connected with the base stage of triode Q1.Capacitor C13
One end and the collector of triode Q1 be connected with the Power_On pin of 4G module chip.The other end of capacitor C13 and three
The emitter of pole pipe Q1 is grounded.
The reset matching unit includes resistance R2, capacitor C14 and triode Q2.One end of the resistance R2 and core
The RST_N pin of plate is connected.The other end of resistance R2 is connected with the base stage of triode Q2, one end of capacitor C14 and triode Q2
Collector be connected with the RESET_N pin of 4G module chip.The other end of capacitor C14 and the emitter of triode Q2 connect
Ground.
The wake-up output matching unit includes resistance R3, R5, R7, capacitor C15 and triode Q3.One end of resistance R5
It is connected with the WAKEUP_OUT foot of 4G module chip.The base stage of the other end of resistance R5 and one end of resistance R7 with triode Q3
It is connected.The collector of resistance R3, one end of capacitor C15 and triode Q3 are connected with the WAKEUPAP pin of core board.Resistance
The other end of R3 is connected with the 3.3V output end of power supply circuit.The emitter of resistance R7, the other end of capacitor C15 and triode Q3
It is grounded.
The wake-up input matching unit includes resistance R4, R6, R8, capacitor C16 and triode Q4.The resistance R6's
One end is connected with the WAKEUPMOUDLE pin of core board.The other end of resistance R6 and one end of resistance R8 are with triode Q4's
Base stage be connected, the collector of resistance R4, one end of capacitor C16 and triode Q4 with the WAKEUP_IN pin of 4G module chip
It is connected.The other end of resistance R4 is connected with the VIO_1V8 pin of 4G module chip.Resistance R8, the other end of capacitor C16 and three poles
The emitter of pipe Q4 is grounded.
The command signal electrical level matching circuit include the first matching chip, the second matching chip, resistance R8, R10,
R11, R12 and capacitor C17, C18, C19, C20.The UART_RXD_M pin phase of the B2 pin of first matching chip and core board
Even.The VCCA pin of one end of capacitor C18 and the first matching chip is connected with the VIO_1V8 pin of 4G module chip.First
The A2 pin of matching chip is connected with the UART_TXD_M pin of core board.The A1 pin and 4G module chip of first matching chip
UART_TXD pin be connected.Resistance R9, one end of resistance R10 are connected with the OE pin of the first matching chip.Resistance R9's is another
One end is connected with the VIO_1V8 pin of 4G module chip.The VCCB pin of one end of capacitor C17 and the first matching chip with confession
The 3.3V output end of circuit is connected.The B1 pin of first matching chip is connected with the UART_RXD pin of 4G module chip.Electricity
The GND pin for holding C17, capacitor C18, the other end of resistance R10 and the first matching chip is grounded.The B2 of second matching chip draws
Foot is connected with the DEBUG_RXD_M pin of i.e. core board.The VCCA pin of one end of capacitor C20 and the second matching chip is and 4G
The VIO_1V8 pin of module chip is connected.The A2 pin of second matching chip is connected with the DEBUG_TXD_M pin of core board.
The A1 pin of second matching chip is connected with the DEBUG_TXD signal of 4G module chip.Resistance R11, resistance R12 one end with
The OE pin of second matching chip is connected.The other end of resistance R11 is connected with the VIO_1V8 pin of 4G module chip.Capacitor C19
One end and the VCCB pin of the second matching chip be connected with the 3.3V output end of power supply circuit.The B1 of second matching chip draws
Foot is connected with the DEBUG_RXD signal of 4G module chip.Capacitor C19, capacitor C20, the other end of resistance R12 and the second matching core
The GND pin of piece is grounded.
Further, the core board uses the business level core board of model FETMX6UL-C.The 4G mould group core
The model ME3630 of piece.First matching chip and the second matching chip are all made of 2 bi-directional voltage electricity of model TXB0102
Flat converter chip.
Further, the power supply circuit includes decompression chip, voltage stabilizing chip, resistance R20, R21, R22, R23, capacitor
C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37 and inductance L1, L2.It is depressured chip and uses model
The DC-DC of SY8303AIC is depressured chip.Voltage stabilizing chip uses the low pressure difference linearity voltage stabilizing chip of model AMS1117-3.3.Electricity
The IN pin for holding C26, capacitor C27, capacitor C28, one end of resistance R20 and decompression chip is connected with external 5V voltage VIN.Electricity
The other end for hindering R20 is connected with the EN pin of decompression chip.One end of capacitor C29 is connected with the BS pin of decompression chip.Capacitor
The other end of C29 and the LX pin for being depressured chip are connected with one end of inductance L1.Capacitor C30, capacitor C31, capacitor C33, electricity
The anode for holding C34, capacitor C35, resistance R22, one end of inductance L2 and capacitor C32 is connected with the other end of inductance L1.Capacitor
One end of C30, the other end of resistance R22 and resistance R23 are connected with the FB pin of decompression chip.One end of resistance R21 and drop
The FS pin of chip is pressed to be connected.Capacitor C36, capacitor C37 one end be connected with the other end of inductance L2.Resistance R21, resistance R23,
Capacitor C26, capacitor C27, capacitor C28, capacitor C31, capacitor C33, capacitor C34, capacitor C35, capacitor C36, capacitor C37 it is another
The GND pin at end, the cathode of capacitor C32 and decompression chip is grounded.The anode of capacitor C57, one end of capacitor C58 and pressure stabilizing core
The INPUT pin of piece is connected with the BIAS pin of decompression chip.One end of capacitor C55, capacitor C56 anode with pressure stabilizing core
The OUTPUT pin of piece is connected.Capacitor C57, the anode of capacitor C55, capacitor C58, the other end of capacitor C56 and voltage stabilizing chip
GND pin is grounded.3.3V output end of the OUTPUT pin of voltage stabilizing chip as power supply circuit.Inductance L2 is far from inductance L1's
That end is the 4G power supply output end of power supply circuit.
Further, the antenna interface circuit includes first antenna terminal X1, the second antenna terminal X2, third antenna
Terminal X3 and capacitor C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12.A termination 4G module chip of capacitor C2
MAIN_ANT pin, the other end are connected with one end of capacitor C1, capacitor C4.One end of the other end of capacitor C1 and capacitor C3 with
The signal transmitting and receiving end of first antenna terminal X1 is connected.Capacitor C6 one termination 4G module chip DIV_ANT pin, the other end with
Capacitor C5, one end of capacitor C8 are connected.The signal of the other end of capacitor C5 and one end of capacitor C7 with the second antenna terminal X2
Sending and receiving end is connected.The GNSS_ANT pin of a termination 4G module chip of capacitor C10, the one of the other end and capacitor C9, capacitor C12
End is connected, and the other end of capacitor C9 and one end of capacitor C11 are connected with the signal transmitting and receiving end of third antenna terminal X3.Capacitor
C3, capacitor C4, capacitor C7, capacitor C8, capacitor C11, capacitor C12 and first antenna terminal X1, the second antenna terminal X2, third day
The ground terminal of line terminals X3 is grounded.First antenna terminal X1, the second antenna terminal X2, it is mounted on third antenna terminal X3
Antenna.
Further, the SIM card interface circuit includes resistance R16, R17, R18, R19, capacitor C21, C22, C23,
C24, C25, diode D4, D5, transient supression diode chip for backlight unit D6 and sim card socket X4.Transient supression diode chip for backlight unit D6's
Model ESDA6V.The Uim_Data pin of a termination 4G module chip of resistance R16.The other end, the capacitor C23 of resistance R16
One end and 4 pins of transient supression diode chip for backlight unit D6 be connected with the DATA pin of sim card socket X4.The one of resistance R17
Terminate the Uim_Clk pin of 4G module chip.The other end of resistance R17, one end of capacitor C24 and transient supression diode chip for backlight unit
1 pin of D6 is connected with the CLK pin of sim card socket X4.The Uim_Rst pin of a termination 4G module chip of resistance R18.
3 pins of the other end of resistance R18, one end of capacitor C25 and transient supression diode chip for backlight unit D6 are with sim card socket X4's
RST pin is connected.One end of resistance R19 is connected with the VIO_1V8 pin of 4G module chip.The other end, the diode of resistance R19
The cathode of D5 and the CD1 pin of sim card socket X4 are connected with the Uim_Delect pin of 4G module chip.Capacitor C21, capacitor
The VCC pin of one end of C22, the cathode of diode D4 and sim card socket X4 with the USIM_VCC pin phase of 4G module chip
Even.Diode D4, the anode of diode D5,2 pins of transient supression diode chip for backlight unit D6, capacitor C21, capacitor C22, capacitor
C23, capacitor C24, the other end of capacitor C25 and sim card socket X4 GND, CD2 pin be grounded.
Further, the audio interface circuit includes audio chip, resistance R24, R25, R26, R27, R28, R29,
R30, R31, R32, R33, R34, capacitor C38, C39, C40, C41, C42, C43, C44, C45, C46, exclusion RP1, first liang of line
Connector CON1, second liang of line connector CON2, the first audio socket and inductance FB1, FB2.The audio chip uses type
Number be WM8960 audio processing chip.One end of resistance R24 is connected with the R_IN3 pin of audio chip, the other end and core
The AUD_INT pin of plate is connected.Resistance R31, resistance R32, resistance R33, one end of resistance R34 and audio chip MCLK,
BCLK, DACLRC, DACDAT pin are respectively connected with.One end of resistance R31 is connected with the SAI2_MCLK pin of core board.Resistance
One end of R32 is connected with the SAI2_BCLK pin of core board.Resistance R33's is connected with the SAI2_SYNC pin of core board.Electricity
Resistance R34's is connected with the SAI2_TXD pin of core board.One end of resistance R25 is connected with the ADCDAT pin of audio chip, separately
One end is connected with the SAI2_RXD pin of core board.One end of resistance R28 is connected with the SCLK pin of audio chip, the other end with
The IIC2_SCL pin of core board is connected.One end of resistance R27 is connected with the SDIN pin of audio chip, the other end and core board
IIC2_SDA pin be connected.Two terminals of second liang of line connector CON2 and SPK_RN, SPK_RP of audio chip draw
Foot is respectively connected with.Two terminals of first liang of line connector CON1 and SPK_LN, SPK_LP pin of audio chip distinguish phase
Even.One end of capacitor C46 is connected with the VMID pin of audio chip.The HP_R pin phase of one end of capacitor C42 and audio chip
Even.One end of capacitor C41 is connected with the HP_L pin of audio chip.One end of resistance R29 and inductance FB1 are with capacitor C42's
The other end is connected.One end of resistance R30 and inductance FB2 are connected with the other end of capacitor C41.The other end of inductance FB1 and
The R_IN pin of one audio socket is connected.The other end of inductance FB2 is connected with the L_IN pin of the first audio socket.Capacitor C38,
Capacitor C39, capacitor C40, one end of resistance R26 and audio chip DCVDD, DBVDD, AVDD pin with the 4G of power supply circuit
Output end of powering is connected.Capacitor C43, capacitor C44, SPKVDD1, SPKVDD2 pin of one end of capacitor C45 and audio chip are equal
It is connected with external 5V voltage VIN.L_OUT, R_OUT pin of the other end of resistance R26 and the first audio socket are and core board
AUD_INT pin be connected.Capacitor C38, capacitor C39, capacitor C40, capacitor C43, capacitor C44, capacitor C45, capacitor C46, electricity
Hinder the GND of R29, resistance R30, DGND, AGND, SPKGND1, SPKGND2, PGND pin of audio chip and the first audio socket
Pin is grounded.
The microphone interface circuit includes resistance R35, R36, R37, R38, capacitor C47, C48, C49, C50, C51,
C52, C53, C54, microphone and the second audio socket.The capacitor C52, capacitor C53, capacitor C54 one end and resistance
R35, one end of resistance R36 are connected.The other end of capacitor C52 is connected with one end of resistance R37, resistance R38.The one of capacitor C51
The other end of end and resistance R35 are connected with the MIC_BIAS pin of audio chip.Capacitor C47, one end of capacitor C48 and second
L_IN, R_IN pin of audio socket are connected with the other end of resistance R36.The other end of capacitor C47 and the L_ of audio chip
IN3 pin is connected.The other end of capacitor C48 is connected with the L_IN2 pin of audio chip.Capacitor C49, one end of capacitor C50, wheat
Gram cathode of wind and the GND pin of the second audio socket are connected with the other end of resistance R38.Anode and the second sound of microphone
L_OUT, R_OUT pin of frequency socket are connected.The other end of capacitor C49 is connected with the R_IN1 pin of audio chip.Capacitor C50
The other end be connected with the R_IN2 pin of audio chip.Capacitor C51, capacitor C53, the other end of capacitor C54, resistance R37 it is another
The GND pin of one end and connector is grounded.
The invention has the advantages that:
1, the present invention realizes the information exchange at vehicle end and remote service end by 4G module chip, provides for car networking service
Necessary technical foundation.
2, the present invention is provided with audio interface circuit, can be realized the acquisition and wireless transmission of acoustic information.
Detailed description of the invention
System block diagram Fig. 1 of the invention;
The circuit diagram of power supply circuit in Fig. 2 present invention;
The connection circuit diagram of 4G mould group interface circuit and 4G module chip in Fig. 3 present invention;
The circuit diagram of antenna interface circuit in Fig. 4 present invention;
The circuit diagram of matching unit is switched in Fig. 5 present invention;
The circuit diagram of matching unit is resetted in Fig. 6 present invention;
The circuit diagram of output matching unit is waken up in Fig. 7 present invention;
The circuit diagram of input matching unit is waken up in Fig. 8 present invention;
The circuit diagram of signal level match circuit is instructed in Fig. 9 present invention;
The circuit diagram of SIM card interface circuit in Figure 10 present invention;
The circuit diagram of Figure 11 sound intermediate frequency interface circuit of the present invention;
The circuit diagram of microphone interface circuit in Figure 12 present invention;
Specific embodiment
The present invention will be further described below with reference to the drawings.
As shown in Figure 1, the vehicle data transmission system based on 4G LTE communication, including power supply circuit 1, core board 2,4G mould
Group chip U1,4G mould group interface circuit 3, antenna interface circuit 4, control signal level match circuit 5, command signal electrical level match
Circuit 6, SIM card interface circuit 7, audio interface circuit 8, microphone interface circuit 9 and loudspeaker.Core board 2 is flown using Baoding
Insult the business level core board 2 of the model FETMX6UL-C of embedded technology Co., Ltd production, the model of core chips
iMX6UL.The model ME3630 of 4G module chip U1.Core board 2 is connect with vehicle-mounted computer.Power supply circuit 1 passes through decompression chip
And voltage stabilizing chip is 4G module chip U1, control signal level match circuit 5, command signal electrical level matching circuit 6 are powered.4G mould
The data signal interfaces of group chip U1 are connected by 4G mould group interface circuit 3 with core board 2.Control signal level match circuit 5
4G module chip U1 and core board 2 are connected by triode, realizes the electricity for controlling signal between 4G module chip U1 and core board 2
Flat matching.Controlling signal includes power-on command, shutdown command and reset command.Command signal electrical level matching circuit 6 passes through first
Matching chip and the second matching chip connection 4G module chip U1 and core board 2, are realized between 4G module chip U1 and core board 2
The electrical level match of command signal.Command signal includes mode setting command.Antenna interface circuit 4 connects day by antenna terminal
Line realizes the communication of 4G module chip U1 and remote server.SIM card interface circuit 7 connects 4G mould group core by sim card socket
Piece and SIM card.Microphone interface circuit 9 acquires audio analog signals by microphone and is transferred to audio interface circuit 8.Audio
Interface circuit 8 by audio chip U5 by microphone interface circuit 9 transmission come audio analog signals be converted into digital signal biography
It is defeated by core board 2, and converts audio analog signals for the digital signal that core board 2 issues and is transferred to loudspeaker.
As shown in Fig. 2, power supply circuit 1 includes decompression chip U4, voltage stabilizing chip U6, resistance R20, R21, R22, R23, capacitor
C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37 and inductance L1, L2.It is depressured chip U4 and uses Hangzhou
The DC-DC of the model SY8303AIC of silicon Cenda semiconductor technology Co., Ltd production is depressured chip, there is 4.5-40V to input,
3A fan-out capability.The low pressure difference linearity for the model AMS1117-3.3 that voltage stabilizing chip U6 is produced using Austrian Microtronic A/S
Voltage stabilizing chip.Capacitor C26, capacitor C27, capacitor C28, resistance R20 one end and be depressured chip U4 IN pin with external 5V
Voltage VIN is connected.The other end of resistance R20 is connected with the EN pin of decompression chip U4.One end of capacitor C29 and decompression chip U4
BS pin be connected.The other end of capacitor C29 and the LX pin for being depressured chip U4 are connected with one end of inductance L1.Capacitor C30,
Capacitor C31, capacitor C33, capacitor C34, capacitor C35, resistance R22, one end of inductance L2 and capacitor C32 anode with inductance L1
The other end be connected.FB pin phase of the one end of capacitor C30, the other end of resistance R22 and resistance R23 with decompression chip U4
Even.One end of resistance R21 is connected with the FS pin of decompression chip U4.One end and the inductance L2's of capacitor C36, capacitor C37 is another
End is connected.Resistance R21, resistance R23, capacitor C26, capacitor C27, capacitor C28, capacitor C31, capacitor C33, capacitor C34, capacitor
C35, capacitor C36, the other end of capacitor C37, capacitor C32 cathode and be depressured chip U4 GND pin be grounded.Capacitor C57
Anode, capacitor C58 one end and voltage stabilizing chip U6 INPUT pin with decompression chip U7 BIAS pin be connected.Capacitor
One end of C55, the anode of capacitor C56 are connected with the OUTPUT pin of voltage stabilizing chip U6.Capacitor C57, capacitor C55 anode,
The GND pin of capacitor C58, the other end of capacitor C56 and voltage stabilizing chip U6 are grounded.The OUTPUT pin conduct of voltage stabilizing chip U6
The 3.3V output end VDD_3.3V of power supply circuit 1.That end of inductance L2 far from inductance L1 is the 4G power supply output end of power supply circuit 1
VBAT, for exporting 3.8V voltage.Power supply circuit 1 can convert the 5V voltage of input to that be converted to 3.8V and 3.3V power supply defeated
Out.
As shown in figure 3,4G mould group interface circuit 3 includes resistance R13, R14, R15 and diode D1, D2, D3.Resistance R13
One end be connected with the USB_VBUS pin of 4G module chip U1.One end of resistance R14 and the USB_DM of 4G module chip U1 draw
Foot is connected.One end of resistance R15 is connected with the USB_DP pin of 4G module chip U1.The other end and diode D1 of resistance R13
Cathode be connected with the USB_CONNECTOR_P of core board 2 (L_59) pin.Even.The other end and diode D2 of resistance R14
Cathode be connected with the USB_CONNECTOR_N of core board 2 (L_57) pin.The other end of resistance R15 and diode D3's
Cathode is connected with the USBVBUS_CONNECTOR of core board 2 (L_61) pin.Diode D1, diode D2, diode D3
Anode is grounded.The V_BAT pin of 4G module chip U1 meets the 4G power supply output end VBAT of power supply circuit 1.4G module chip U1
GND, TP_GND pin ground connection.
As shown in figure 4, antenna interface circuit 4 includes first antenna terminal X1, the second antenna terminal X2, third antenna terminal
X3 and capacitor C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12.A termination 4G module chip U1's of capacitor C2
MAIN_ANT pin, the other end are connected with one end of capacitor C1, capacitor C4.One end of the other end of capacitor C1 and capacitor C3 with
The signal transmitting and receiving end of first antenna terminal X1 is connected.The DIV_ANT pin of a termination 4G module chip U1 of capacitor C6, the other end
It is connected with one end of capacitor C5, capacitor C8.The letter of the other end of capacitor C5 and one end of capacitor C7 with the second antenna terminal X2
Number sending and receiving end is connected.The GNSS_ANT pin of a termination 4G module chip U1 of capacitor C10, the other end and capacitor C9, capacitor C12
One end be connected, the other end of capacitor C9 and one end of capacitor C11 are connected with the signal transmitting and receiving end of third antenna terminal X3.Electricity
Hold C3, capacitor C4, capacitor C7, capacitor C8, capacitor C11, capacitor C12 and first antenna terminal X1, the second antenna terminal X2, third
The ground terminal of antenna terminal X3 is grounded.First antenna terminal X1, the second antenna terminal X2, it is respectively mounted on third antenna terminal X3
There is antenna.Antenna interface circuit 4 can be launched the 4G module chip U1 3 tunnel radiofrequency signals exported by antenna.
As shown in figure 5, control signal level match circuit 5 includes switch matching unit, resets matching unit, wakes up output
Matching unit and wake-up input matching unit.Switching matching unit includes resistance R1, capacitor C13 and triode Q1.Resistance R1's
One end is connected with ON/OFF (L_28) pin of core board 2.The other end of resistance R1 is connected with the base stage of triode Q1.Capacitor
One end of C13 and the collector of triode Q1 are connected with the Power_On pin of 4G module chip U1.The other end of capacitor C13
And the emitter of triode Q1 is grounded.
As shown in fig. 6, resetting matching unit includes resistance R2, capacitor C14 and triode Q2.One end of resistance R2 and core
RST_N (L_30) pin of plate 2 is connected.The other end of resistance R2 is connected with the base stage of triode Q2, one end of capacitor C14 and three
The collector of pole pipe Q2 is connected with the RESET_N pin of 4G module chip U1.The other end of capacitor C14 and the hair of triode Q2
Emitter-base bandgap grading is grounded.
As shown in fig. 7, waking up output matching unit includes resistance R3, R5, R7, capacitor C15 and triode Q3.Resistance R5's
One end is connected with the WAKEUP_OUT foot of 4G module chip U1.One end of the other end of resistance R5 and resistance R7 with triode Q3
Base stage be connected.The collector of resistance R3, one end of capacitor C15 and triode Q3 with the WAKEUPAP of core board 2 (L_34)
Pin is connected.The other end of resistance R3 is connected with the 3.3V output end VDD_3.3V of power supply circuit 1.Resistance R7, capacitor C15 it is another
The emitter of one end and triode Q3 are grounded.
As shown in figure 8, waking up input matching unit includes resistance R4, R6, R8, capacitor C16 and triode Q4.Resistance R6's
One end is connected with WAKEUPMOUDLE (L_32) pin of core board 2.One end of the other end of resistance R6 and resistance R8 are with three
The base stage of pole pipe Q4 is connected, and the collector of resistance R4, one end of capacitor C16 and triode Q4 are with 4G module chip U1's
WAKEUP_IN pin is connected.The other end of resistance R4 is connected with the VIO_1V8 pin of 4G module chip U1.Resistance R8, capacitor
The other end of C16 and the emitter of triode Q4 are grounded.Control signal level match circuit 5 is used to control the level of signal
It is matched with the level of controller.
As shown in figure 9, command signal electrical level matching circuit 6 includes the first matching chip U2, the second matching chip U3, resistance
R8, R10, R11, R12 and capacitor C17, C18, C19, C20.First matching chip U2 and the second matching chip U3 are all made of the U.S.
The 2 two-way electricity of the model TXB0102 of Texas Instruments' production protected with automatic direction inductor and +/- 15kVESD
Voltage level converter chip.The B2 pin of first matching chip U2 is connected with UART_RXD_M (L_25) pin of core board 2.Electricity
The VCCA pin of one end and the first matching chip U2 for holding C18 is connected with the VIO_1V8 pin of 4G module chip U1.First
The A2 pin of distribution chip U2 is connected with UART_TXD_M (L_23) pin of core board 2.The A1 pin of first matching chip U2 with
The UART_TXD pin of 4G module chip U1 is connected.Resistance R9, one end of resistance R10 and the OE pin phase of the first matching chip U2
Even.The other end of resistance R9 is connected with the VIO_1V8 pin of 4G module chip U1.One end of capacitor C17 and the first matching chip
The VCCB pin of U2 is connected with the 3.3V output end VDD_3.3V of power supply circuit 1.The B1 pin and 4G of first matching chip U2
The UART_RXD pin of module chip U1 is connected.Capacitor C17, capacitor C18, the other end of resistance R10 and the first matching chip U2
GND pin be grounded.
The B2 pin of second matching chip U3 is connected with DEBUG_RXD_M (L_13) pin of i.e. core board 2.Capacitor C20
One end and the VCCA pin of the second matching chip U3 be connected with the VIO_1V8 pin of 4G module chip U1.Second matching core
The A2 pin of piece U3 is connected with DEBUG_TXD_M (L_15) pin of core board 2.The A1 pin and 4G mould of second matching chip U3
The DEBUG_TXD signal of group chip U1 is connected.Resistance R11, resistance R12 one end with the OE pin phase of the second matching chip U3
Even.The other end of resistance R11 is connected with the VIO_1V8 pin of 4G module chip U1.One end of capacitor C19 and the second matching chip
The VCCB pin of U3 is connected with the 3.3V output end VDD_3.3V of power supply circuit 1.The B1 pin and 4G of second matching chip U3
The DEBUG_RXD signal of module chip U1 is connected.Capacitor C19, capacitor C20, the other end of resistance R12 and the second matching chip U3
GND pin be grounded.Command signal electrical level matching circuit 6 can be realized core board 2 and 4G module chip interactive instruction signal
When electrical level match.
As shown in Figure 10, SIM card interface circuit 7 include resistance R16, R17, R18, R19, capacitor C21, C22, C23, C24,
C25, diode D4, D5, transient supression diode chip for backlight unit D6 and sim card socket X4.The model of transient supression diode chip for backlight unit D6
For ESDA6V.The Uim_Data pin of a termination 4G module chip U1 of resistance R16.The other end of resistance R16, capacitor C23
4 pins of one end and transient supression diode chip for backlight unit D6 are connected with the DATA pin of sim card socket X4.One end of resistance R17
Connect the Uim_Clk pin of 4G module chip U1.The other end of resistance R17, one end of capacitor C24 and transient supression diode chip for backlight unit
1 pin of D6 is connected with the CLK pin of sim card socket X4.The Uim_Rst of a termination 4G module chip U1 of resistance R18 draws
Foot.3 pins of the other end of resistance R18, one end of capacitor C25 and transient supression diode chip for backlight unit D6 with sim card socket X4
RST pin be connected.One end of resistance R19 is connected with the VIO_1V8 pin of 4G module chip U1.The other end of resistance R19, two
The cathode of pole pipe D5 and the CD1 pin of sim card socket X4 are connected with the Uim_Delect pin of 4G module chip U1.Capacitor
C21, one end of capacitor C22, the cathode of diode D4 and sim card socket X4 USIM_ of the VCC pin with 4G module chip U1
VCC pin (marked as Vreg_Ruim) is connected.Diode D4, the anode of diode D5, transient supression diode chip for backlight unit D6 2
Pin, capacitor C21, capacitor C22, capacitor C23, capacitor C24, the other end of capacitor C25 and sim card socket X4 GND, CD2 draw
Foot is grounded.Remaining pin of transient supression diode chip for backlight unit D6 and sim card socket X4 is hanging.SIM card interface circuit 7 can
Realize the hot plug and reading of SIM card.
As shown in figure 11, audio interface circuit 8 include audio chip U5, resistance R24, R25, R26, R27, R28, R29,
R30, R31, R32, R33, R34, capacitor C38, C39, C40, C41, C42, C43, C44, C45, C46, exclusion RP1, first liang of line
Connector CON1, second liang of line connector CON2, the first audio socket CON3 and inductance FB1, FB2.Audio chip U5 uses type
Number be WM8960 audio processing chip.One end of resistance R24 is connected with the R_IN3 pin of audio chip U5, the other end and core
AUD_INT (L_54) pin of core 2 is connected.Resistance R31, resistance R32, resistance R33, one end of resistance R34 and audio chip
MCLK, BCLK, DACLRC, DACDAT pin of U5 is respectively connected with.One end of resistance R31 and the SAI2_MCLK (L_ of core board 2
43) pin is connected.One end of resistance R32 is connected with SAI2_BCLK (L_45) pin of core board 2.Resistance be R33's and core board
2 SAI2_SYNC (L_47) pin is connected.Resistance R34 is connected with SAI2_TXD (L_39) pin of core board 2.Resistance R25
One end be connected with the ADCDAT pin of audio chip U5, the other end is connected with SAI2_RXD (L_41) pin of core board 2.Electricity
One end of resistance R28 is connected with the SCLK pin of audio chip U5, and the other end is connected with IIC2_SCL (L_3) pin of core board 2.
One end of resistance R27 is connected with the SDIN pin of audio chip U5, IIC2_SDA (L_1) pin phase of the other end and core board 2
Even.SPK_RN, SPK_RP pin of two terminals and audio chip U5 of second liang of line connector CON2 are respectively connected with.First
SPK_LN, SPK_LP pin of two terminals and audio chip U5 of two line connector CON1 are respectively connected with.The one of capacitor C46
End is connected with the VMID pin of audio chip U5.One end of capacitor C42 is connected with the HP_R pin of audio chip U5.Capacitor C41
One end be connected with the HP_L pin of audio chip U5.Other end phase of the one end of resistance R29 and inductance FB1 with capacitor C42
Even.One end of resistance R30 and inductance FB2 are connected with the other end of capacitor C41.The other end of inductance FB1 and the first audio are inserted
The R_IN pin of seat CON3 is connected.The other end of inductance FB2 is connected with the L_IN pin of the first audio socket CON3.Capacitor C38,
Capacitor C39, capacitor C40, one end of resistance R26 and audio chip U5 DCVDD, DBVDD, AVDD pin with power supply circuit 1
4G power supply output end VBAT be connected.Capacitor C43, capacitor C44, one end of capacitor C45 and audio chip U5 SPKVDD1,
SPKVDD2 pin is connected with external 5V voltage VIN.L_OUT, R_ of the other end of resistance R26 and the first audio socket CON3
OUT pin is connected with the AUD_INT of core board 2 (L_54) pin.Capacitor C38, capacitor C39, capacitor C40, capacitor C43, electricity
Hold C44, capacitor C45, capacitor C46, resistance R29, resistance R30, DGND, AGND of audio chip U5, SPKGND1, SPKGND2,
The GND pin of PGND pin and the first audio socket CON3 are grounded.Audio interface circuit 8 is used for collected audio signal
It is transferred to core board 2 after being translated into digital signal, while audio can also be converted by the digital signal that core board 2 issues
Signal.First audio socket CON3 is connect with loudspeaker.
As shown in figure 12, microphone interface circuit 9 include resistance R35, R36, R37, R38, capacitor C47, C48, C49,
C50, C51, C52, C53, C54, microphone MIC1 and the second audio socket CON4.Capacitor C52, capacitor C53, capacitor C54 one
End is connected with one end of resistance R35, resistance R36.The other end of capacitor C52 is connected with one end of resistance R37, resistance R38.Electricity
The other end of one end and resistance R35 for holding C51 is connected with the MIC_BIAS pin of audio chip U5.Capacitor C47, capacitor C48
One end and L_IN, R_IN pin of the second audio socket CON4 be connected with the other end of resistance R36.Capacitor C47's is another
End is connected with the L_IN3 pin of audio chip U5.The other end of capacitor C48 is connected with the L_IN2 pin of audio chip U5.Capacitor
C49, one end of capacitor C50, the GND pin of the cathode of microphone MIC1 and the second audio socket CON4 are another with resistance R38
One end is connected.The anode of microphone MIC1 is connected with L_OUT, R_OUT pin of the second audio socket CON4.Capacitor C49's is another
One end is connected with the R_IN1 pin of audio chip U5.The other end of capacitor C50 is connected with the R_IN2 pin of audio chip U5.Electricity
The GND pin for holding C51, capacitor C53, the other end of capacitor C54, the other end of resistance R37 and connector is grounded.Microphone connects
Mouth circuit 9 can acquire audio signal by Mike.
Working principle of the present invention is as follows:
Core board 2 receives the data of interior each electronic equipment from vehicle-mounted microterminal and is passed by 4G mould group interface circuit 3
It is defeated by 4G module chip.4G module chip will receive data and is transmitted to remotely by the antenna connected in antenna interface circuit 4
Server-side.In data transmission procedure, SIM card interface circuit provides 4G network service for 4G module chip.Microphone interface circuit 9
Sound in collecting vehicle is converted into analog signal and is transferred to audio interface circuit 8.The simulation that audio interface circuit 8 will receive
Signal is transferred to core board 2 after being converted into digital signal.Core board 2 by the digital data transmission received to vehicle-mounted microterminal or
4G module chip realizes speech recognition and distance communicating.
Claims (6)
1. the vehicle data transmission system based on 4G LTE communication, including power supply circuit, core board, 4G module chip, 4G mould group
Interface circuit, antenna interface circuit, control signal level match circuit, command signal electrical level matching circuit, SIM card interface electricity
Road, audio interface circuit and microphone interface circuit;It is characterized by: the power supply circuit passes through decompression chip and pressure stabilizing core
Piece is 4G module chip, control signal level match circuit, the power supply of command signal electrical level matching circuit;The antennal interface electricity
Road connects antenna by antenna terminal, carries out the communication between 4G module chip and remote server;The SIM card interface electricity
Road connects 4G module chip and SIM card by sim card socket;The microphone interface circuit acquires audio mould by microphone
Quasi- signal is simultaneously transferred to audio interface circuit;The audio interface circuit is transmitted microphone interface circuit by audio chip
The audio analog signals come are converted into digital data transmission to core board;
The 4G mould group interface circuit includes resistance R13, R14, R15 and diode D1, D2, D3;One end of the resistance R13
It is connected with the USB_VBUS pin of 4G module chip;One end of resistance R14 is connected with the USB_DM pin of 4G module chip;Resistance
One end of R15 is connected with the USB_DP pin of 4G module chip;The cathode of the other end of resistance R13 and diode D1 are and core
The USB_CONNECTOR_P pin of plate is connected;Even;The cathode of the other end of resistance R14 and diode D2 with core board
USB_CONNECTOR_N pin is connected;The cathode of the other end of resistance R15 and diode D3 with the USBVBUS_ of core board
CONNECTOR pin is connected;Diode D1, diode D2, the positive of diode D3 are grounded;The V_BAT of 4G module chip draws
Foot connects the 4G power supply output end of power supply circuit;GND, TP_GND pin of 4G module chip are grounded;
The control signal level match circuit includes switch matching unit, resets matching unit, wakes up output matching unit
Matching unit is inputted with waking up;The switch matching unit includes resistance R1, capacitor C13 and triode Q1;The resistance R1
One end be connected with the ON/OFF pin of core board;The other end of resistance R1 is connected with the base stage of triode Q1;The one of capacitor C13
The collector of end and triode Q1 are connected with the Power_On pin of 4G module chip;The other end and triode of capacitor C13
The emitter of Q1 is grounded;
The reset matching unit includes resistance R2, capacitor C14 and triode Q2;One end of the resistance R2 and core board
RST_N pin is connected;The other end of resistance R2 is connected with the base stage of triode Q2, one end of capacitor C14 and the collection of triode Q2
Electrode is connected with the RESET_N pin of 4G module chip;The other end of capacitor C14 and the emitter of triode Q2 are grounded;
The wake-up output matching unit includes resistance R3, R5, R7, capacitor C15 and triode Q3;One end of resistance R5 and 4G
The WAKEUP_OUT foot of module chip is connected;One end of the other end of resistance R5 and resistance R7 with the base stage phase of triode Q3
Even;The collector of resistance R3, one end of capacitor C15 and triode Q3 are connected with the WAKEUPAP pin of core board;Resistance R3
The other end be connected with the 3.3V output end of power supply circuit;The emitter of resistance R7, the other end of capacitor C15 and triode Q3 are equal
Ground connection;
The wake-up input matching unit includes resistance R4, R6, R8, capacitor C16 and triode Q4;One end of the resistance R6
It is connected with the WAKEUPMOUDLE pin of core board;The base stage of the other end of resistance R6 and one end of resistance R8 with triode Q4
It is connected, the collector of resistance R4, one end of capacitor C16 and triode Q4 are connected with the WAKEUP_IN pin of 4G module chip;
The other end of resistance R4 is connected with the VIO_1V8 pin of 4G module chip;Resistance R8, the other end of capacitor C16 and triode Q4
Emitter be grounded;
The command signal electrical level matching circuit include the first matching chip, the second matching chip, resistance R8, R10, R11,
R12 and capacitor C17, C18, C19, C20;The B2 pin of first matching chip is connected with the UART_RXD_M pin of core board;Electricity
The VCCA pin of one end and the first matching chip for holding C18 is connected with the VIO_1V8 pin of 4G module chip;First matching core
The A2 pin of piece is connected with the UART_TXD_M pin of core board;The A1 pin of first matching chip and 4G module chip
UART_TXD pin is connected;Resistance R9, one end of resistance R10 are connected with the OE pin of the first matching chip;Resistance R9's is another
End is connected with the VIO_1V8 pin of 4G module chip;The VCCB pin of one end of capacitor C17 and the first matching chip with power supply
The 3.3V output end of circuit is connected;The B1 pin of first matching chip is connected with the UART_RXD pin of 4G module chip;Capacitor
C17, capacitor C18, the other end of resistance R10 and the first matching chip GND pin be grounded;The B2 pin of second matching chip
It is connected with the DEBUG_RXD_M pin of i.e. core board;The VCCA pin of one end of capacitor C20 and the second matching chip with 4G mould
The VIO_1V8 pin of group chip is connected;The A2 pin of second matching chip is connected with the DEBUG_TXD_M pin of core board;The
The A1 pin of two matching chips is connected with the DEBUG_TXD signal of 4G module chip;Resistance R11, resistance R12 one end with
The OE pin of two matching chips is connected;The other end of resistance R11 is connected with the VIO_1V8 pin of 4G module chip;Capacitor C19's
The VCCB pin of one end and the second matching chip is connected with the 3.3V output end of power supply circuit;The B1 pin of second matching chip
It is connected with the DEBUG_RXD signal of 4G module chip;Capacitor C19, capacitor C20, the other end of resistance R12 and the second matching chip
GND pin be grounded.
2. the vehicle data transmission system according to claim 1 based on 4G LTE communication, it is characterised in that: the core
Core uses the business level core board of model FETMX6UL-C;The model ME3630 of the 4G module chip;First matching
Chip and the second matching chip are all made of 2 bi-directional voltage level translator chips of model TXB0102.
3. the vehicle data transmission system according to claim 1 based on 4G LTE communication, it is characterised in that: the confession
Circuit include decompression chip, voltage stabilizing chip, resistance R20, R21, R22, R23, capacitor C26, C27, C28, C29, C30, C31,
C32, C33, C34, C35, C36, C37 and inductance L1, L2;It is depressured chip and core is depressured using the DC-DC of model SY8303AIC
Piece;Voltage stabilizing chip uses the low pressure difference linearity voltage stabilizing chip of model AMS1117-3.3;Capacitor C26, capacitor C27, capacitor C28,
One end of resistance R20 and the IN pin for being depressured chip are connected with external 5V voltage VIN;The other end and decompression core of resistance R20
The EN pin of piece is connected;One end of capacitor C29 is connected with the BS pin of decompression chip;The other end and decompression chip of capacitor C29
LX pin be connected with one end of inductance L1;Capacitor C30, capacitor C31, capacitor C33, capacitor C34, capacitor C35, resistance R22,
One end of inductance L2 and the anode of capacitor C32 are connected with the other end of inductance L1;The other end and electricity of capacitor C30, resistance R22
The one end for hindering R23 is connected with the FB pin of decompression chip;One end of resistance R21 is connected with the FS pin of decompression chip;Capacitor
C36, capacitor C37 one end be connected with the other end of inductance L2;Resistance R21, resistance R23, capacitor C26, capacitor C27, capacitor
C28, capacitor C31, capacitor C33, capacitor C34, capacitor C35, capacitor C36, the other end of capacitor C37, the cathode of capacitor C32 and drop
The GND pin of pressure chip is grounded;The INPUT pin of the anode of capacitor C57, one end of capacitor C58 and voltage stabilizing chip with drop
The BIAS pin of chip is pressed to be connected;One end of capacitor C55, the anode of capacitor C56 are connected with the OUTPUT pin of voltage stabilizing chip;
Capacitor C57, the anode of capacitor C55, capacitor C58, the other end of capacitor C56 and voltage stabilizing chip GND pin be grounded;Pressure stabilizing core
3.3V output end of the OUTPUT pin of piece as power supply circuit;That end of inductance L2 far from inductance L1 is that the 4G of power supply circuit is supplied
Electricity output end.
4. the vehicle data transmission system according to claim 1 based on 4G LTE communication, it is characterised in that: the day
Interface circuit include first antenna terminal X1, the second antenna terminal X2, third antenna terminal X3 and capacitor C1, C2, C3, C4,
C5,C6,C7,C8,C9,C10,C11,C12;The MAIN_ANT pin of a termination 4G module chip of capacitor C2, the other end and electricity
Hold C1, one end of capacitor C4 is connected;The other end of capacitor C1 and one end of capacitor C3 are received with the signal of first antenna terminal X1
Originator is connected;The DIV_ANT pin of a termination 4G module chip of capacitor C6, one end phase of the other end and capacitor C5, capacitor C8
Even;The other end of capacitor C5 and one end of capacitor C7 are connected with the signal transmitting and receiving end of the second antenna terminal X2;The one of capacitor C10
The GNSS_ANT pin of 4G module chip is terminated, the other end is connected with one end of capacitor C9, capacitor C12, the other end of capacitor C9
It is connected with the signal transmitting and receiving end of third antenna terminal X3 with one end of capacitor C11;Capacitor C3, capacitor C4, capacitor C7, capacitor
C8, capacitor C11, capacitor C12 and first antenna terminal X1, the second antenna terminal X2, third antenna terminal X3 ground terminal connect
Ground;First antenna terminal X1, the second antenna terminal X2, antenna is mounted on third antenna terminal X3.
5. the vehicle data transmission system according to claim 1 based on 4G LTE communication, it is characterised in that: described
SIM card interface circuit includes resistance R16, R17, R18, R19, capacitor C21, C22, C23, C24, C25, diode D4, D5, transition
Inhibit diode chip for backlight unit D6 and sim card socket X4;The model ESDA6V of transient supression diode chip for backlight unit D6;The one of resistance R16
Terminate the Uim_Data pin of 4G module chip;The other end of resistance R16, one end of capacitor C23 and transient supression diode core
4 pins of piece D6 are connected with the DATA pin of sim card socket X4;The Uim_Clk of a termination 4G module chip of resistance R17 draws
Foot;1 pin of the other end of resistance R17, one end of capacitor C24 and transient supression diode chip for backlight unit D6 with sim card socket X4
CLK pin be connected;The Uim_Rst pin of a termination 4G module chip of resistance R18;The other end, the capacitor C25 of resistance R18
One end and 3 pins of transient supression diode chip for backlight unit D6 be connected with the RST pin of sim card socket X4;One end of resistance R19
It is connected with the VIO_1V8 pin of 4G module chip;The other end of resistance R19, the cathode of diode D5 and sim card socket X4
CD1 pin is connected with the Uim_Delect pin of 4G module chip;Capacitor C21, one end of capacitor C22, diode D4 it is negative
The VCC pin of pole and sim card socket X4 are connected with the USIM_VCC pin of 4G module chip;Diode D4, diode D5
Anode, 2 pins of transient supression diode chip for backlight unit D6, capacitor C21, capacitor C22, capacitor C23, capacitor C24, capacitor C25 it is another
GND, CD2 pin of one end and sim card socket X4 are grounded.
6. the vehicle data transmission system according to claim 1 based on 4G LTE communication, it is characterised in that: the sound
Frequency interface circuit includes audio chip, resistance R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R34, capacitor
C38, C39, C40, C41, C42, C43, C44, C45, C46, exclusion RP1, first liang of line connector CON1, second liang of line connector
CON2, the first audio socket and inductance FB1, FB2;The audio chip uses the audio processing chip of model WM8960;
One end of resistance R24 is connected with the R_IN3 pin of audio chip, and the other end is connected with the AUD_INT pin of core board;Resistance
R31, resistance R32, resistance R33, one end of resistance R34 and audio chip MCLK, BCLK, DACLRC, DACDAT pin distinguish
It is connected;One end of resistance R31 is connected with the SAI2_MCLK pin of core board;One end of resistance R32 and the SAI2_ of core board
BCLK pin is connected;Resistance R33's is connected with the SAI2_SYNC pin of core board;The SAI2_TXD with core board of resistance R34
Pin is connected;One end of resistance R25 is connected with the ADCDAT pin of audio chip, the SAI2_RXD pin of the other end and core board
It is connected;One end of resistance R28 is connected with the SCLK pin of audio chip, and the other end is connected with the IIC2_SCL pin of core board;
One end of resistance R27 is connected with the SDIN pin of audio chip, and the other end is connected with the IIC2_SDA pin of core board;Second liang
Two terminals of line connector CON2 and SPK_RN, SPK_RP pin of audio chip are respectively connected with;First liang of line connector
Two terminals of CON1 and SPK_LN, SPK_LP pin of audio chip are respectively connected with;One end of capacitor C46 and audio chip
VMID pin be connected;One end of capacitor C42 is connected with the HP_R pin of audio chip;One end of capacitor C41 and audio chip
HP_L pin be connected;One end of resistance R29 and inductance FB1 are connected with the other end of capacitor C42;Resistance R30 and inductance FB2
One end be connected with the other end of capacitor C41;The other end of inductance FB1 is connected with the R_IN pin of the first audio socket;Electricity
The other end of sense FB2 is connected with the L_IN pin of the first audio socket;Capacitor C38, capacitor C39, capacitor C40, resistance R26 one
DCVDD, DBVDD, AVDD pin of end and audio chip are connected with the 4G of power supply circuit power supply output end;Capacitor C43, capacitor
SPKVDD1, SPKVDD2 pin of C44, one end of capacitor C45 and audio chip are connected with external 5V voltage VIN;Resistance R26
The other end and L_OUT, R_OUT pin of the first audio socket be connected with the AUD_INT pin of core board;Capacitor C38, electricity
Hold C39, capacitor C40, capacitor C43, capacitor C44, capacitor C45, capacitor C46, resistance R29, resistance R30, audio chip DGND,
The GND pin of AGND, SPKGND1, SPKGND2, PGND pin and the first audio socket is grounded;
The microphone interface circuit includes resistance R35, R36, R37, R38, capacitor C47, C48, C49, C50, C51, C52,
C53, C54, microphone and the second audio socket;The capacitor C52, capacitor C53, capacitor C54 one end with resistance R35, electricity
The one end for hindering R36 is connected;The other end of capacitor C52 is connected with one end of resistance R37, resistance R38;One end of capacitor C51 and electricity
The other end of resistance R35 is connected with the MIC_BIAS pin of audio chip;Capacitor C47, one end of capacitor C48 and the second audio are inserted
L_IN, R_IN pin of seat are connected with the other end of resistance R36;The other end of capacitor C47 and the L_IN3 pin of audio chip
It is connected;The other end of capacitor C48 is connected with the L_IN2 pin of audio chip;Capacitor C49, one end of capacitor C50, microphone
The GND pin of cathode and the second audio socket is connected with the other end of resistance R38;Anode and the second audio socket of microphone
L_OUT, R_OUT pin be connected;The other end of capacitor C49 is connected with the R_IN1 pin of audio chip;Capacitor C50's is another
End is connected with the R_IN2 pin of audio chip;Capacitor C51, capacitor C53, the other end of capacitor C54, resistance R37 the other end and
The GND pin of connector is grounded.
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