CN206020889U - A kind of array base palte, display floater and display device - Google Patents

A kind of array base palte, display floater and display device Download PDF

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Publication number
CN206020889U
CN206020889U CN201620896602.4U CN201620896602U CN206020889U CN 206020889 U CN206020889 U CN 206020889U CN 201620896602 U CN201620896602 U CN 201620896602U CN 206020889 U CN206020889 U CN 206020889U
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Prior art keywords
layer
electrode layer
substrate
color blocking
array base
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Inventor
王艳丽
简守甫
金慧俊
孙丽娜
夏志强
曹兆铿
秦锋
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Tianma Microelectronics Co Ltd
Shanghai AVIC Optoelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Shanghai AVIC Optoelectronics Co Ltd
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Abstract

A kind of the provided array base palte of the utility model, display floater and display device, including substrate, are arranged on a plurality of gate line, a plurality of data lines of substrate surface, and wherein, a plurality of gate line and a plurality of data lines insulation intersection limit multiple sub-pixel areas.Also include the flatness layer and electrode layer for being arranged at substrate surface, wherein, flatness layer is located at side of multiple sub-pixel areas away from substrate, and electrode layer is located at side of the flatness layer away from substrate.And the color blocking layer of substrate surface is arranged at, color blocking layer includes that multiple color blockings being correspondingly arranged with sub-pixel area, color blocking layer are located between the flatness layer and substrate.This is removed, the array base palte also includes the first insulating barrier between electrode layer and flatness layer.It can be seen that, electrode layer and flatness layer are separated by this programme by setting up the first insulating barrier, color blocking layer can be prevented to separate out the impact of the removable ion pair electrode layer electric field to flatness layer, and then solve the problems, such as that flicker and image retention occur in COA display screens under working long hours.

Description

A kind of array base palte, display floater and display device
Technical field
The utility model is related to technical field of liquid crystal display, more particularly, it relates to a kind of array base palte, display floater with And display device.
Background technology
With the continuous development of science and technology, electronic equipment has become one of indispensable product of daily life, accordingly, Display screen has also obtained development at full speed, at present, based on COA (cf on array, i.e. color blocking layer are arranged on the surface of substrate) skill The screen of art, after working long hours, it may appear that flicker, image retention (i.e. image shows unclear) the problems such as, have a strong impact on display The display quality of screen.
Therefore, how to avoid COA display screens from the problem of flicker and image retention occur, be the big technology of currently urgently to be resolved hurrily one Problem.
Utility model content
In view of this, the utility model provides a kind of array base palte, display floater and display device, to solve COA Display screen work long hours lower occur flash and image retention problem.
For achieving the above object, the utility model provides following technical scheme:
A kind of array base palte, including:
Substrate;
It is arranged at a plurality of gate line, a plurality of data lines of the substrate surface, a plurality of gate line and a plurality of number Multiple sub-pixel areas are limited according to line insulation intersection;
The flatness layer and electrode layer of the substrate surface is arranged at, it is remote that the flatness layer is located at the plurality of sub-pixel area From the side of the substrate, the electrode layer is located at side of the flatness layer away from the substrate;And
It is arranged at the color blocking layer of the substrate surface, the color blocking layer includes multiple being correspondingly arranged with the sub-pixel area Color blocking, the color blocking layer are located between the flatness layer and the substrate;And
The first insulating barrier being located between the electrode layer and the flatness layer.
A kind of display floater, including the array base palte described in any one.
A kind of display device, including above-mentioned display floater.
Compared with prior art, technical scheme provided by the utility model has advantages below:
A kind of the provided array base palte of the utility model, including substrate, is arranged on a plurality of gate line of substrate surface, many Data line, wherein, a plurality of gate line and a plurality of data lines insulation intersection limit multiple sub-pixel areas.Also include being arranged at base The flatness layer and electrode layer of plate surface, wherein, flatness layer is located at side of multiple sub-pixel areas away from substrate, and electrode layer is located at Side of the flatness layer away from substrate.And the color blocking layer of substrate surface is arranged at, color blocking layer includes multiple corresponding with sub-pixel area The color blocking of setting, color blocking layer are located between the flatness layer and substrate.Remove this, the array base palte also include positioned at electrode layer with flat The first insulating barrier between smooth layer.It can be seen that, electrode layer and flatness layer are separated by this programme by setting up the first insulating barrier, can be hindered Only color blocking layer separates out the impact of the removable ion pair electrode layer electric field to flatness layer, and then solves COA display screens long-time Occurs the problem of flicker and image retention under work.
Description of the drawings
In order to be illustrated more clearly that the utility model embodiment or technical scheme of the prior art, below will be to embodiment Or accompanying drawing to be used is briefly described needed for description of the prior art, it should be apparent that, drawings in the following description are only It is embodiment of the present utility model, for those of ordinary skill in the art, on the premise of not paying creative work, also Other accompanying drawings can be obtained according to the accompanying drawing for providing.
A kind of structural representation of array base palte that Fig. 1 is provided for the utility model;
The structural representation of another kind of array base palte that Fig. 2 is provided for the utility model;
The structural representation of another kind of array base palte that Fig. 3 is provided for the utility model;
The structural representation of another kind of array base palte that Fig. 4 is provided for the utility model;
The structural representation of another array base palte that Fig. 5 is provided for the utility model.
Specific embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Embodiment in based on the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment for being obtained, belongs to the scope of the utility model protection.
A kind of the provided array base palte of the utility model, including substrate, is arranged on a plurality of gate line of substrate surface, many Data line, wherein, a plurality of gate line and a plurality of data lines insulation intersection limit multiple sub-pixel areas.Also include being arranged at base The flatness layer and electrode layer of plate surface, wherein, flatness layer is located at side of multiple sub-pixel areas away from substrate, and electrode layer is located at Side of the flatness layer away from substrate.And the color blocking layer of substrate surface is arranged at, color blocking layer includes multiple corresponding with sub-pixel area The color blocking of setting, color blocking layer are located between the flatness layer and substrate.Remove this, the array base palte also include positioned at electrode layer with flat The first insulating barrier between smooth layer.It can be seen that, electrode layer and flatness layer are separated by this programme by setting up the first insulating barrier, can be hindered The only impact of the removable ion pair electrode layer electric field of color blocking layer, so solve COA display screens work long hours lower occur dodge The problem of bright and image retention.
A kind of part planar structural representation of array base palte that Fig. 1 and Fig. 2, Fig. 1 are provided for the present embodiment is referred to, is schemed 2 is the cross-sectional view of the array base palte shown in Fig. 1.
Wherein, as shown in figure 1, being provided with a plurality of gate line 21, a plurality of data lines 22 on the surface of substrate 10 also, many Bar gate line 21 and the insulation of a plurality of data lines 22 intersect the sub-pixel area (231,232,233) for limiting multiple array arrangements, per Individual sub-pixel area (231,232,233) are correspondingly arranged a sub-pixel, and each sub-pixel includes thin film transistor (TFT) 25 and pixel Electrode 26.
Incorporated by reference to Fig. 1 and Fig. 2 is referred to, the array base palte includes:Substrate 10, flatness layer 11, electrode layer 12, the first insulating barrier 13 and color blocking layer 23.
Wherein, flatness layer 11 and electrode layer 12 are arranged at the surface of substrate 10, and wherein, flatness layer 11 is located at many height pictures Side of the plain area away from substrate 10, electrode layer 12 are located at side of the flatness layer 11 away from substrate 10.Color blocking layer 23 is also disposed on base 10 surface of plate, wherein, color blocking layer 23 include multiple be correspondingly arranged with sub-pixel area (231,232,233) color blocking (241,242, 243).First insulating barrier 13 is located between electrode layer 12 and flatness layer 11.
Specifically, as shown in figure 3, electrode layer 12 (dotted box portion) can include pixel electrode 26 and public electrode 27. The thin film transistor (TFT) 25 includes grid 250, source electrode 251 and drain electrode 252, wherein, grid 250 and corresponding gate line 21 be connected, Source electrode 251 is connected with corresponding data wire 22, drain electrode 252 is connected with pixel electrode 26.Public electrode 27 and multiple sub-pixels pair Should arrange, to drive corresponding sub-pixel to carry out the aobvious of image by the voltage difference between public electrode 27 and pixel electrode 26 Show.That is, from the direction of the horizontal plane perpendicular to substrate 10, bottom-up substrate 10, flatness layer 11, the first insulating barrier are followed successively by 13 and electrode layer 12.Wherein, the X-direction in Fig. 2 and Fig. 3 is refer to perpendicular to the direction of the horizontal plane of substrate.
It should be noted that in this programme, being that inventor considers color blocking to the flat of surface based on COA display screens Property require higher, therefore, be provided with flatness layer 11 in this programme, for the purpose for being planarized.Specifically, color blocking surface Planarization process can be realized by applying transparent lithographic resin layer on the surface of color blocking.
The level arrangement of this programme is in order at inventor it is considered that existing COA screens are after working long hours, color blocking layer Gradually can go bad, i.e., the removable elemental release in color blocking layer causes the amount of ions in screen to increase to flatness layer.When can After moving iron quantity increases, the charging and holding of electrode can be affected so that voltage status of the electrode in non-normal working, from And produce screen flicker, picture and show the phenomenon such as imperfect.
And this programme is by arranging a layer insulating between flatness layer and electrode layer, flatness layer is separated out may move from Son plays a part of isolation so that removable ion and electrode isolation, that is, achieve prevent color blocking layer separate out to flatness layer can Impact of the moving iron to electrode layer electric field, and then solve COA display screens and work long hours and lower flicker and image retention occur Problem.
On the basis of above-described embodiment, the present embodiment additionally provides a kind of concrete material of the first insulating barrier, such as can be with It is the nitride for including silicon, or similar insulating materials.
It should be noted that the color of the present embodiment sub-pixel is determined by the color of its color blocking being correspondingly arranged, That is, the color of color blocking is red, then the Show Color of its corresponding sub-pixel is also redness, and the color of color blocking is green Color, then the Show Color of its corresponding sub-pixel is also green, and the color of color blocking is blue, the then display of its corresponding sub-pixel Color is also blueness.Based on this, the display of image can be carried out by the sub-pixel of different colours.
The color blocking layer at least includes the color blocking of red bluish-green three kinds of colors, it is of course also possible to be red bluish-green white color blocking combination, Those skilled in the art can voluntarily select the arrangement of color blocking according to the actual needs, here not repeated description.
In the present embodiment, color blocking layer 23 includes multiple color blockings, specifically, color blocking layer 23 can include black matrix 230 with And the multiple color blocking regions limited by black matrix 230, each color blocking region is correspondingly arranged a color blocking, also, a color blocking It is correspondingly arranged with a sub-pixel, certainly, the utility model is not limited to that, in other embodiments, a color blocking may be used also To be correspondingly arranged with multiple sub-pixels.
It should be noted that the color of the present embodiment sub-pixel is determined by the color of its color blocking being correspondingly arranged, That is, the color of color blocking is red, then the Show Color of its corresponding sub-pixel is also redness, and the color of color blocking is green Color, then the Show Color of its corresponding sub-pixel is also green, and the color of color blocking is blue, the then display of its corresponding sub-pixel Color is also blueness.Based on this, the display of image can be carried out by the sub-pixel of different colours.
Certainly, in the present embodiment, color blocking can include the combination of red bluish-green three color blockings, or red bluish-green white Color blocking is combined, and is not specifically limited in this programme.
In conjunction with actual process, the concrete structure of the electrode layer that the present embodiment is provided is described, the electrode layer can be with Including pixel electrode layer and/or common electrode layer.
Wherein, pixel electrode layer may be located at same layer, and mutual insulating with common electrode layer.Difference can also be located at Layer.
Fig. 4 is referred to, shows that the board structure of a kind of pixel electrode and public electrode different layers, Fig. 4 continue to use the attached of Fig. 3 Icon remembers that something in common is repeated no more.Wherein, public electrode 27 is located at the upper strata of pixel electrode 26, i.e., in X direction upper in figure Face.In this embodiment, the second insulating barrier 28 is provided between pixel electrode 26 and public electrode 27.
Except this, Fig. 5 is referred to, Fig. 5 continues to use the reference of Fig. 4, and something in common is repeated no more.In the present embodiment, as Plain electrode 26 can be being located at same layer, and mutually insulated therebetween in public electrode 27.
Certainly, no matter how pixel electrode layer is arranged with common electrode layer, in the present embodiment, flatness layer and electrode layer it Between isolation connection is carried out by the first insulating barrier, with realize prevent color blocking layer separate out to the removable ion pair electrode of flatness layer The impact of layer electric field, solves the problems, such as that flicker and image retention occur in existing COA display screens under working long hours.
This is removed, the present embodiment additionally provides a kind of display floater with above-mentioned array base palte and display device, its work Above-described embodiment is referred to as principle.
In sum, the provided a kind of array base palte of the utility model, including substrate, is arranged on a plurality of of substrate surface Gate line, a plurality of data lines, wherein, a plurality of gate line and a plurality of data lines insulation intersection limit multiple sub-pixel areas.Also wrap The flatness layer and electrode layer for being arranged at substrate surface is included, wherein, flatness layer is located at side of multiple sub-pixel areas away from substrate, Electrode layer is located at side of the flatness layer away from substrate.And be arranged at the color blocking layer of substrate surface, color blocking layer include multiple with sub The color blocking that pixel region is correspondingly arranged, color blocking layer are located between the flatness layer and substrate.This is removed, the array base palte also includes being located at The first insulating barrier between electrode layer and flatness layer.It can be seen that, this programme is by setting up the first insulating barrier by electrode layer and flatness layer Separate, color blocking layer can be prevented to separate out the impact of the removable ion pair electrode layer electric field to flatness layer, and then solve COA to show Display screen work long hours lower occur flash and image retention problem.
In this specification, each embodiment is described by the way of going forward one by one, and what each embodiment was stressed is and other The difference of embodiment, between each embodiment identical similar portion mutually referring to.To the upper of the disclosed embodiments State bright, professional and technical personnel in the field is realized or is used the utility model.Multiple modifications to these embodiments are right Will be apparent for those skilled in the art, generic principles defined herein can be without departing from this reality In the case of with new spirit or scope, realize in other embodiments.Therefore, the utility model is not intended to be limited to this These embodiments shown in text, and it is to fit to the most wide scope consistent with principles disclosed herein and features of novelty.

Claims (7)

1. a kind of array base palte, it is characterised in that include:
Substrate;
It is arranged at a plurality of gate line, a plurality of data lines of the substrate surface, a plurality of gate line and a plurality of data lines Insulation intersection limits multiple sub-pixel areas;
The flatness layer and electrode layer of the substrate surface is arranged at, the flatness layer is located at the plurality of sub-pixel area away from institute The side of substrate is stated, the electrode layer is located at side of the flatness layer away from the substrate;And
The color blocking layer of the substrate surface is arranged at, the color blocking layer includes multiple colors being correspondingly arranged with the sub-pixel area Resistance, the color blocking layer are located between the flatness layer and the substrate;And
The first insulating barrier being located between the electrode layer and the flatness layer.
2. array base palte according to claim 1, it is characterised in that first insulating barrier includes the nitride of silicon.
3. array base palte according to claim 1, it is characterised in that the electrode layer includes pixel electrode layer and/or public affairs Common electrode layer.
4. array base palte according to claim 3, it is characterised in that the pixel electrode layer is located at first insulating barrier And between the common electrode layer, the common electrode layer is insulated by the second insulating barrier with the pixel electrode layer.
5. array base palte according to claim 3, it is characterised in that the pixel electrode layer and the common electrode layer position In same layer, and mutual insulating.
6. a kind of display floater, it is characterised in that including the array base palte described in any one of Claims 1 to 5.
7. a kind of display device, it is characterised in that including the display floater described in claim 6.
CN201620896602.4U 2016-08-17 2016-08-17 A kind of array base palte, display floater and display device Active CN206020889U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620896602.4U CN206020889U (en) 2016-08-17 2016-08-17 A kind of array base palte, display floater and display device

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111061092A (en) * 2020-01-20 2020-04-24 Tcl华星光电技术有限公司 Liquid crystal display panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111061092A (en) * 2020-01-20 2020-04-24 Tcl华星光电技术有限公司 Liquid crystal display panel
US11609459B2 (en) 2020-01-20 2023-03-21 Tcl China Star Optoelectronics Technology Co., Ltd. Liquid crystal display panel

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