CN205984988U - High reliability chip package structure - Google Patents

High reliability chip package structure Download PDF

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Publication number
CN205984988U
CN205984988U CN201620844520.5U CN201620844520U CN205984988U CN 205984988 U CN205984988 U CN 205984988U CN 201620844520 U CN201620844520 U CN 201620844520U CN 205984988 U CN205984988 U CN 205984988U
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chip
layer
weld pad
metal wiring
high reliability
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CN201620844520.5U
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于大全
李鹏
马书英
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Huatian Technology Kunshan Electronics Co Ltd
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Huatian Technology Kunshan Electronics Co Ltd
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Abstract

The utility model discloses a high reliability chip package structure, including chip, opening, metal wiring layer, a plurality of solder bump and plastic envelope layer, the opening extends to the back from the front of chip and forms, and exposes the weld pad of chip bottom the open -ended, the metal wiring layer is located the back of open -ended inner wall and chip, and the electric connection weld pad, the solder bump is located the chip back, just with metal wiring layer electric connection, the chip back and its four sides are lived in the cladding of plastic envelope layer, and expose the solder bump at the chip back. Protect the chip through forming the plastic envelope layer, and the plastic envelope layer adopts damp proof insulation, anticorrosive or plastic package material that mechanical strength is functional, the utility model discloses can step forward enhanced chip's reliability, the durability promotes the interference killing feature of chip, satisfies the application demand of chip under adverse circumstances.

Description

High reliability chip-packaging structure
Technical field
This utility model is related to the encapsulation field of semiconductor chip, more particularly, to a kind of high reliability chip-packaging structure.
Background technology
Fig. 1 shows a kind of encapsulating structure of known chip, this chip taking image sensor as a example, including image sensing Chip 100, some weld pads 102 of this image sensing chip functions bread area containing video sensing 101 and this video sensing area periphery; Opening, this opening is extended from the back side to functional surfaces, and open bottom exposes weld pad;Metal wiring layer 130, this metal wiring layer Positioned at opening inwall and the back side, it is electrically connected with described weld pad;Insulating barrier 120, this insulating barrier is located at metal wiring layer and is passed with image Between sense chip, and expose weld pad;Some solder bumps 140, this solder bump is located at the back side of image sensing chip, with gold Belong to wiring layer to be electrically connected with;Welding resisting layer 151, this welding resisting layer covers the back side and opening inwall, and exposes solder bump.
But the use environment of such chip is suitable, if marching the applications such as automobile, exploration, outdoor monitoring further, Higher requirement need to be proposed to the susceptiveness of chip, reliability, ruggedness etc., to stand the test of rugged environment.
Content of the invention
In order that the reliability of chip improves further, it is amenable to the test of adverse circumstances, the utility model proposes one Plant high reliability chip-packaging structure, the reliability of chip, ruggedness, the anti-interference energy of lifting chip can be further enhanced Power.
The technical solution of the utility model is realized in:
A kind of high reliability chip-packaging structure, including chip, described chip front side comprises functional areas and is located at described work( Some weld pads of energy area periphery;The solder bump electrically guiding to back side setting by interconnection structure of described chip front side weld pad; Also include a plastic packaging layer, described plastic packaging layer envelopes the part in addition to chip front side, and exposes described solder bump.
Further, described interconnection structure includes some openings and metal wiring layer, and described opening is from described chip back Extend to front and formed, and the bottom-exposed of described opening goes out described weld pad;Described metal wiring layer is located at the interior of described opening On wall and described chip back, and it is electrically connected with described weld pad;It is provided with insulating barrier between described metal wiring layer and described chip, And weld pad described in described insulating layer exposing, so that described metal wiring layer is electrically connected with described weld pad;Described solder bump is located at On described chip back, and it is electrically connected with described metal wiring layer.
Further, described chip is image sensing chip, and described image sensing chip front side bonds a protection cap structure, Described protection cap structure includes euphotic cover plate and located at the support between described image sensing chip front side and described euphotic cover plate Cofferdam layer, described support cofferdam layer covers described weld pad, and is that video sensing zone position is formed with cofferdam gap in functional areas; Described plastic packaging layer envelopes the part in addition to protection cap structure front.
Further, described plastic packaging layer material thickness is more than 1 micron.
Further, described opening is groove, hole or aforesaid combination, and its further groove comprises straight trough and side wall has a constant inclination The groove of rake angle, hole comprises straight hole and side wall has the hole at certain angle of inclination.
Further, described open bottom exposes described support cofferdam in the position of image sensing chip surrounding side Layer, it is connected that described insulating barrier extends to described support cofferdam layer.
The beneficial effects of the utility model are:
This utility model provides a kind of high reliability chip-packaging structure, and plastic packaging layer is a kind of full protection knot surrounding in back Structure, and the material of plastic packaging layer has good mechanical strength properties, or the performance such as good damp proof insulation, anti-corrosion, gear smog, make simultaneously Make the distance between process single chip can increase so that the plastic packaging layer of side thickeies, therefore, it is possible to further enhance chip Reliability, ruggedness etc., the capacity of resisting disturbance of lifting chip.
Brief description
Fig. 1 is the encapsulating structure of known image sensor dice;
Fig. 2 be this utility model one method for packing step a in wafer pre-packaged after cut into single image sensing chip Structural representation;
Fig. 3 is the structural representation of glue spreading of base plate in this utility model one method for packing step b;
Fig. 4 is that in this utility model one method for packing step b, single image sensing chip front side disperses to be affixed on substrate down On structural representation;
Fig. 5 is the structural representation of image sensing chip back plastic packaging after this utility model one method for packing step c;
After Fig. 6 is step c in this utility model one method for packing, removes the plastic packaging image sensing chip structure after substrate and show It is intended to;
Fig. 7 is for cutting the structural representation of single image sensor of formation after step d in this utility model one method for packing Figure;
Fig. 8 is the cross-sectional view of pre-packaged image sensing chip edge in this utility model one constructive embodiment;
Fig. 9 structural representation after pre-packaged for wafer in step a in another method for packing of this utility model;
Figure 10 cuts into the structure of single chip for wafer in step a in another method for packing of this utility model after pre-packaged Schematic diagram;
Figure 11 for pasting the structural representation of bonding film in wafer rear after step b in another method for packing of this utility model;
Figure 12 is attached to the structural representation on substrate for chip front side after step c in another method for packing of this utility model.
Do following explanation in conjunction with accompanying drawing:
100 image sensing chip 101 video sensing area
102 weld pad 103 dielectric layer
120 insulating barrier 130 metal wiring layer
140 solder bump 150 plastic packaging layer
151 welding resisting layer 160 supports cofferdam layer
161 cofferdam gap 170 euphotic cover plate
180 glue 190 substrate
F1 cutting film f2 bonding film
Specific embodiment
Understandable for enabling this utility model to become apparent from, below in conjunction with the accompanying drawings to specific embodiment of the present utility model It is described in detail.For convenience of description, in the structure of embodiment accompanying drawing, each ingredient does not press normal rates scaling, therefore does not represent The actual relative size of each structure in embodiment.
The manufacture method of this utility model high reliability chip-packaging structure, comprises the following steps:
A, referring to Fig. 2, provide a wafer with some chips, using wafer scale TSV technology, by each chip of wafer just After the electrical of face weld pad guides to the back side by metal wiring layer, and predeterminated position makes solder bump on metal wiring layer, will Wafer cuts into single chip, completes pre-packaged to chip;
Chip can be active component (active element) or passive element (passive elements), numeral electricity The electronic component (electronic components) of the integrated circuit such as road or analog circuit, MEMS (Micro ElectroMechanical Systems, MEMS), microfluid system (micro fluidic systems) or using heat, light The physical quantity variation such as line and pressure come to measure physics sensor (physical sensor), surface acoustic wave element, pressure-sensing Device (pressure sensors), but be not limited.
As a kind of preferred embodiment, change the sensor to measure, the pre-packaged concrete system of image sensor using light It is to provide a wafer comprising some image sensing chips 100, the functional surfaces of wafer are for image sensing chip just as process Face, the back side of wafer is the back side of image sensing chip, and the front of each image sensing chip comprises video sensing area 101 and position Some weld pads 102 in this video sensing area periphery;
One protection cap structure is bonded on the functional surfaces of wafer, described protection cap structure includes supporting cofferdam layer 160 and thoroughly Light cover plate 170, described support cofferdam layer is located between two neighboring video sensing area, and forms cofferdam in video sensing zone position Gap 161;
Form some openings extending to functional surfaces at the back side of wafer, hatch frame can be groove, hole or aforesaid Combination.The forming method of opening includes dry etching, wet etching, machine cuts and laser scribing etc., and is not limited.? The back side laying insulating barrier 120 of the inwall of opening and wafer.Removed using methods such as machine cuts, laser ablation, dry etchings The insulating layer material of open bottom, exposes side wall or the surface of weld pad 102 electrically to be drawn.In other embodiments, cruelly Dew weld pad method can also be:Before laying insulating barrier 120 step, first remove the barrier material of open bottom, make opening Bottom-exposed goes out weld pad 102.Barrier material can comprise silicon substrate material or the dielectric layer material of image sensing chip, or aforementioned Compositionss etc..Then lay insulating barrier 120, then remove the insulating layer material covering in weld pad 102 position.Open bottom or exhausted The method that edge layer 120 exposes weld pad includes dry etching, wet etching, exposure imaging, machine cuts and laser ablation etc., and not As limit.Form metal wiring layer 130 on the insulating layer, described metal wiring layer is electrically connected with described weld pad, by weld pad Electrically guide to the back side of wafer;
Along dicing lines, wafer is cut, form the pre-package structure of some single image sensing chips;
B, referring to Fig. 3, take a substrate 190, material such as silicon, glass, pottery, metal etc., its size does not limit, and coupling is each Equipment from plastic package process.In upper surface of base plate gluing 180.
Referring to Fig. 4, some single chips after step a are disperseed to be placed on substrate by Pick Place mode, should Mode be will be pre-packaged after chip be attached on substrate with the transfer of single form, which can readjust between chip away from From.The distance that adjacent chips are put can be more than the distance between former wafer adjacent chips.And be fixed on substrate by glue 180, Glue 180 has the easily-disassembled property of interim bonding, such as by modes such as illumination, alternating temperature, liquid medicine immersions, can be easily by the viscosity of glue Reduce, substrate is dismantled.
C, referring to Fig. 5, carry out chip back entirety plastic packaging, formed surround every chips plastic packaging layer 150, described plastic packaging layer The back side of parcel chip and four sides, and expose the solder bump of chip back;Plastic packaging mode is, in chip back pressure Film, film layer covered section solder bump, and leave certain interval with chip back, liquid moulding material is filled film layer and chip Gap between the back side, after curing molding, removes press mold, and removes, using plasma, the mold member being seeped on solder bump Material.
D, referring to Fig. 6, disassemble substrate, the plastic packaging layer along after default line of cut cutting step c, formed single highly reliable Property chip-packaging structure, referring to Fig. 7.
As another preferred embodiment, high reliability image sensor package method, comprise the following steps, a. such as Fig. 9 institute Show, provide a wafer with some chips, the functional surfaces of wafer are the front of image sensing chip, the back side of wafer is image The back side of sensing chip, the front of each image sensing chip comprises video sensing area 101 and is located at this video sensing area periphery Some weld pads 102;
One protection cap structure is bonded on functional surfaces, described protection cap structure includes supporting cofferdam layer 160 and euphotic cover plate 170, described support cofferdam layer is located between two neighboring video sensing area, and forms cofferdam gap in video sensing zone position 161;
Using wafer TSV technology, electrical by each chip front side weld pad of wafer guides to the back side by metal wiring layer.Tool Body is to form, at the back side of wafer, some openings extending to functional surfaces, and hatch frame can be groove, hole or aforesaid combination. The forming method of opening includes dry etching, wet etching, machine cuts and laser scribing etc., and is not limited.In opening Inwall and wafer the back side laying insulating barrier 120.Remove opening using methods such as machine cuts, laser ablation, dry etchings The insulating layer material of bottom, exposes side wall or the surface of weld pad 102 electrically to be drawn.In other embodiments, expose weldering Pad method can also be:Before laying insulating barrier 120 step, first remove the barrier material of open bottom, make the bottom of opening Expose weld pad 102.Barrier material can comprise silicon substrate material or the dielectric layer material of image sensing chip, or aforesaid group Compound etc..Then lay insulating barrier 120, then remove the insulating layer material covering in weld pad 102 position.Open bottom or insulating barrier The method of 120 exposure weld pads includes dry etching, wet etching, exposure imaging, machine cuts and laser ablation etc., and not with this It is limited.
Form metal wiring layer 130 on the insulating layer, described metal wiring layer is electrically connected with described weld pad, by the electricity of weld pad Property guide to the back side of wafer, and predeterminated position makes solder bump on metal wiring layer.
As shown in Figure 10, wafer cutting is divided into the chip independently opened.Before cutting, wafer with protection lid structure pastes all Cut film f1, this cutting film, in addition to reducing cutting and collapsing angle, also has carrying effect, and has certain viscosity, after making cutting Chip remain unchanged proper alignment.
B. as shown in figure 11, a piece of bonding film f2 is provided, the chip back on wafer is bonded on bonding film;Remove brilliant Cutting film f1 in circle protection cap, that is, carry out a pour mask.
C. referring to Figure 12, provide a substrate 190, in substrate 190 upper surface gluing 180, and by chip on bonding film f2 just Face down and be affixed on substrate 190, remove bonding film f2.Which is to be attached on substrate with the transfer of whole wafer form, can save Go patch device and single paster operation.
D. the space between chip back and adjacent chips is carried out with overall plastic packaging, forms plastic packaging layer 150, this plastic packaging layer The back side of 150 parcel chips and four sides, and expose the solder bump of chip back;
E. disassemble substrate 190, along default cutting wire cutting plastic packaging layer, form single high reliability chip package knot Structure.
As shown in fig. 7, being a kind of this utility model high reliability image sensor structure, including image sensing chip 100, Image sensing chip has front and the back side corresponding thereto, and image sensing chip front side comprises video sensing area 101 and is located at Some weld pads 102 of video sensing area periphery;Image sensing chip front side bonds a protection cap structure, and protection cap structure includes Light cover plate 170 and located at the support cofferdam layer 160 between image sensing chip front side and euphotic cover plate, supports cofferdam layer to cover Weld pad, and it is formed with cofferdam gap 161 in video sensing zone position;Also include opening, metal wiring layer 130, some solders convex Point 140 and plastic packaging layer 150, the opening self imaging sensing chip back side extends to image sensing chip front side and is formed, and the bottom of opening Portion exposes weld pad;Metal wiring layer is located on the inwall and image sensing chip back of opening, and is electrically connected with weld pad;Solder Salient point is located on image sensing chip back, and is electrically connected with metal wiring layer;Plastic packaging layer envelopes image sensor structure Part in addition to protection cap front, i.e. image sensing chip back, four sides and protection cap and support four of cofferdam layer Side, and expose solder bump.Wherein, weld pad 102 is the conductive pad being connected with the extraneous signal of telecommunication, as image sensing chip The I/O port of the signal of telecommunication.
Optionally, support the material of cofferdam layer 160 to include high molecular polymer, such as in the present embodiment, support the material of cofferdam layer Expect for photoresist, to be easy to be lithographically formed support cofferdam structure.
Optionally, the material of metal wiring layer 130 is one or more of aluminum, copper, gold, nickel, titanium, gold, stannum, platinum etc..
Optionally, the structure of opening includes groove, hole or aforesaid combination, and referring to Fig. 1, Fig. 7, wherein, hole comprises straight hole There is the hole at certain angle of inclination with side wall, i.e. the unequal inclined hole in upper and lower aperture, shape includes circular hole and square hole etc.;Groove comprises Straight trough and side wall have the groove at certain angle of inclination, i.e. the unequal groove of sectional dimension up and down.Hole, the combination of groove include hole With hole, groove and groove, and the combining of hole and groove.As the first preferred embodiment, hatch frame can be a bar shaped Groove adds the structure of bottom portion of groove circular hole, referring to Fig. 7, the sidewall slope of groove and circular hole, and this opening is carried on the back by image sensing chip Extend towards image sensing chip front side, and the bottom of groove corresponds to some weld pads 102, and circular hole bottom-exposed goes out to need electrically The weld pad 102 derived.As second preferred embodiment, hatch frame can be a strip groove structure, referring to Fig. 1, should Groove is extended from image sensing chip back to image sensing chip front side, and the bottom of groove corresponds to some weld pads 102, groove The bottom-exposed of shape opening goes out to need the weld pad 102 electrically derived.As the third preferred embodiment, the structure of opening is permissible For straight hole, accompanying drawing is not shown, and straight hole is extended from image sensing chip back to image sensing chip front side, straight hole each weldering corresponding Pad, and the bottom-exposed of straight hole goes out the weld pad 102 needing electrical derivation.
Plastic packaging layer 150 is located at the periphery of image sensing chip, the back side of cladding image sensing chip and four sides, and reveals Go out solder bump 140.Preferably, it is upper for exposing direction with solder bump, and the plastic packaging layer height on image sensing chip back is low In the peak of described solder bump, certainly, the plastic packaging layer on image sensing chip back can also be raised with weld pad concordant, is It is easy to the transmission of information after signal of video signal is processed, preferred implementation is the highest that plastic packaging layer height is less than solder bump Point, more excellent, the height of plastic packaging layer is concordant with the central plane of solder bump.
Preferably, plastic packaging layer 150 material thickness is more than 1 micron.Plastic packaging layer 150 is to have good mechanical strength properties And/or the material of damp proof insulation performance and/or antiseptic property and/or gear smog performance, to improve the reliability of image sensor further Property, strengthen the ability of its opposing adverse circumstances.
Preferably, it is provided with insulating barrier 120 between metal wiring layer 130 and image sensing chip 100, and insulating layer exposing is every Individual weld pad, makes metal wiring layer be electrically connected with described weld pad.Insulating barrier is used for realizing metal wiring layer and image sensing chip Between electrically isolate, the material of insulating barrier 120 includes organic insulation, silicon oxide, silicon nitride or silicon oxide and silicon nitride Mixture.
Preferably, as Fig. 8, be the cross-sectional view at Fig. 7 image sensing chip edge, insulating barrier 120 with support Cofferdam layer 160 connects, and wraps up image sensing chip functions structure, as protecting weld pad and image sensing chip functions circuit Dielectric layer 103 is so as to will not expose.If insulating barrier and the material supporting cofferdam layer to choose same type, can strengthen between the two Adhesion.
Other high reliability chip-packaging structures that this utility model makes, are different from the part of image sensor dice For chip functions face no supports cofferdam and euphotic cover plate, or replaces supporting cofferdam and euphotic cover plate by other dielectric materials.
To sum up, this utility model provides a kind of high reliability chip-packaging structure and preparation method thereof, this encapsulating structure Plastic packaging layer is the full safeguard structure surrounding of a kind of chip back and side, and the material of plastic packaging layer has good mechanical strength Can, or the performance such as good damp proof insulation, anti-corrosion, gear smog, therefore, it is possible to further enhance the reliability of chip, ruggedness etc., carry Rise the capacity of resisting disturbance of chip, meet chip application demand in the presence of a harsh environment.And wafer scale TSV that this manufacture method adopts The method that technology carries out the multiple single pre-packaged chip of pre-packaged and overall plastic packaging to chip, is all first to carry out overall package, Cut into single chip again, therefore, it is possible to reduce the holistic cost of encapsulation.
Above example is referring to the drawings, and preferred embodiment of the present utility model is described in detail.The skill of this area Art personnel by above-described embodiment is carried out with the modification on various forms or change, but without departing substantially from substantive feelings of the present utility model Under condition, all fall within protection domain of the present utility model.

Claims (6)

1. it is characterised in that including chip, described chip front side comprises functional areas and position to a kind of high reliability chip-packaging structure Some weld pads in described functional areas periphery;The weldering electrically guiding to back side setting by interconnection structure of described chip front side weld pad Material salient point;Also include a plastic packaging layer, described plastic packaging layer envelopes the part in addition to chip front side, and it is convex to expose described solder Point.
2. high reliability chip-packaging structure according to claim 1 it is characterised in that described interconnection structure include some Opening and metal wiring layer, described opening extends formation from described chip back to front, and the bottom-exposed of described opening goes out Described weld pad;Described metal wiring layer is located on the inwall and described chip back of described opening, and is electrically connected with described weld pad; It is provided with insulating barrier between described metal wiring layer and described chip, and weld pad described in described insulating layer exposing, make described hardware cloth Line layer is electrically connected with described weld pad;Described solder bump is located on described chip back, and electrical with described metal wiring layer Connect.
3. high reliability chip-packaging structure according to claim 2 is it is characterised in that described chip is image sensing core Piece, described image sensing chip front side bonds a protection cap structure, and described protection cap structure includes euphotic cover plate and located at described Support cofferdam layer between image sensing chip front side and described euphotic cover plate, described support cofferdam layer covers described weld pad, And be that video sensing zone position is formed with cofferdam gap in functional areas;Described plastic packaging layer envelopes in addition to protection cap structure front Part.
4. high reliability chip-packaging structure according to claim 1 is it is characterised in that described plastic packaging layer material thickness is big In 1 micron.
5. high reliability chip-packaging structure according to claim 2 is it is characterised in that described opening is groove, Kong Huo Aforesaid combination, its further groove comprises straight trough and side wall has the groove at certain angle of inclination, and hole comprises straight hole and side wall has necessarily The hole at angle of inclination.
6. high reliability chip-packaging structure according to claim 3 is it is characterised in that described open bottom passes in image The position of sense chip surrounding side exposes described support cofferdam layer, and described insulating barrier extends to described support cofferdam layer with it even Connect.
CN201620844520.5U 2016-08-05 2016-08-05 High reliability chip package structure Active CN205984988U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108417591A (en) * 2018-02-05 2018-08-17 华天科技(昆山)电子有限公司 The chip-packaging structure and production method of high electrical performance
WO2019128398A1 (en) * 2017-12-29 2019-07-04 苏州晶方半导体科技股份有限公司 Image sensing chip packaging structure and manufacturing method therefor
CN110619814A (en) * 2019-09-23 2019-12-27 维沃移动通信有限公司 Display screen and electronic equipment
CN111554585A (en) * 2020-06-04 2020-08-18 厦门通富微电子有限公司 Wafer level packaging method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019128398A1 (en) * 2017-12-29 2019-07-04 苏州晶方半导体科技股份有限公司 Image sensing chip packaging structure and manufacturing method therefor
CN108417591A (en) * 2018-02-05 2018-08-17 华天科技(昆山)电子有限公司 The chip-packaging structure and production method of high electrical performance
CN108417591B (en) * 2018-02-05 2021-06-11 华天科技(昆山)电子有限公司 High-electrical-property chip packaging structure and manufacturing method
CN110619814A (en) * 2019-09-23 2019-12-27 维沃移动通信有限公司 Display screen and electronic equipment
CN110619814B (en) * 2019-09-23 2020-11-06 维沃移动通信有限公司 Display screen and electronic equipment
CN111554585A (en) * 2020-06-04 2020-08-18 厦门通富微电子有限公司 Wafer level packaging method

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