CN205960972U - Low thermal resistance H bridge - Google Patents
Low thermal resistance H bridge Download PDFInfo
- Publication number
- CN205960972U CN205960972U CN201620961815.0U CN201620961815U CN205960972U CN 205960972 U CN205960972 U CN 205960972U CN 201620961815 U CN201620961815 U CN 201620961815U CN 205960972 U CN205960972 U CN 205960972U
- Authority
- CN
- China
- Prior art keywords
- copper
- thermal resistance
- low thermal
- bridge
- ceramic wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Low thermal resistance H bridge. Belong to power semiconductor product field, especially relate to the improvement to the H bridge construction. The utility model provides a heat dispersion is good, low thermal resistance H bridge that product reliability is higher. The copper -clad ceramic board includes the ceramic plate body, locates the copper of body top surface is constructed the layer and is located the body bottom surface cover the copper layer, copper structure layer is in be equipped with four mutual insulation layer territories on the ceramic plate top surface, be equipped with four chips respectively and settle the position on four mutual insulation layer territories for four chips settle the position to be in the middle part position on four limits of ceramic plate. The edge contour that covers the copper layer is less than the edge contour of ceramic plate. The utility model discloses increase the combination area between soldering tin and the wire jumper, improved welded connection's reliability.
Description
Technical field
This utility model belongs to Power semiconductor products field, the more particularly, to improvement to H bridge construction.
Background technology
The H bridge rectification product of the 35A/50A of main flow in the market, 1600V, its internal different manufacturers has different doing
Method, external structure mainly adopts the version of epoxy packages.With the development of Power Electronic Technique, many electronic application industries
In to the performance of this product and the requirement more and more higher of reliability, both required small product size less, and required product to have stronger again
Thermal diffusivity, particularly when some product sizes are restricted, the requirement to thermal resistance is higher.In researching and developing this product process,
We have found that and cause the main cause that this properties of product is unstable, reliability is not high to be that thermal resistance is high, cause chip in life-time service
In occur performance reduce, or even lost efficacy.
Utility model content
This utility model is directed to problem above, there is provided a kind of perfect heat-dissipating, the higher low thermal resistance H of product reliability
Bridge.
The technical solution of the utility model is：Including copper base, cover copper ceramic wafer, four chips and four wire jumpers, institute
State and cover copper ceramic wafer and include ceramic wafer body, the copper techonosphere located at described body top surface and cover copper located at described body bottom surface
Layer；Described copper techonosphere is provided with four pieces of mutually insulated regions on described pottery plate top surface, divides on four pieces of mutually insulated regions
It is not provided with four chip placing positions so that four chip placing positions are in the medium position on four sides of ceramic wafer.
The edge contour of described copper clad layers is less than the edge contour of described ceramic wafer.
The edge contour of described copper techonosphere is less than the edge contour of described ceramic wafer.
It is additionally provided with molybdenum sheet between described wire jumper and chip.
Two terminations of described wire jumper set U-shaped mouth respectively.
Of the present utility model have the technical effect that：This utility model changes four chip placings in prior art in corner
Structural modelss, be changed to be arranged on the middle part on four sides；Its advantage is operationally, by the order of chip real work, excellent
Change the position of chip, make the uniformity of integral heat sink more preferable, it is to avoid original understanding to setting chip, that is, further away from better
Theory.Then, the area setting to the layers of copper of ceramic wafer above and below takes " contraction ", and its advantage is：Increase energising layers of copper with
The spacing of radiating copper interlayer crosses, it is therefore prevented that electric arc in high-pressure work, the probability that dielectric ceramic layer punctures.?
Afterwards, for improving the soldering reliability in long-term work further, this case is changed to the structure of wire jumper, increases on wire jumper
Via can guide scolding tin to climb up wire jumper upper surface from solder side, finally realizes from " face welding " to the transformation of " body welding ",
Increased the bonded area between scolding tin and wire jumper, improve the reliability being welded to connect.
Brief description
Fig. 1 is structural representation of the present utility model,
Fig. 2 is deck structure schematic diagram of the present utility model,
Fig. 3 is axonometric chart of the present utility model.
In figure 1 is copper base, and 2 is ceramic wafer, and 21 is copper clad layers, and 22 is copper techonosphere, and 3 is chip, and 4 is molybdenum sheet, and 5 is to jump
Line.
Specific embodiment
As Figure 1-3, this utility model include copper base 1 and be located on copper base 1 cover copper ceramic wafer, four
Chip 3 and four wire jumpers 5, the described copper ceramic wafer that covers includes ceramic wafer 2 body, the copper techonosphere 22 located at described body top surface
With the copper clad layers 21 located at described body bottom surface, the described copper ceramic wafer that covers has high thermal conductivity, extends to product packaging body in addition
The outer high heat capacity of high-purity copper substrate 1 and high heat diffusion capabilities, have higher heat dispersion compared with similar products.
Described copper techonosphere 22 is provided with four pieces of mutually insulated regions on described ceramic wafer 2 top surface, in four pieces of mutually insulateds
Four chip placing positions are respectively equipped with region so that four chips 3 dispose position to be in the middle position on four sides of ceramic wafer 2
Put, its advantage is operationally, by the order of chip real work, optimize the position of chip, make integral heat sink more preferably, i.e. heat
Resistance is lower.
The edge contour of described copper clad layers 21 is less than the edge contour of described ceramic wafer 2, and its effect is：Increase copper clad layers 21
Creep age distance and copper techonosphere 22 between, in order to avoid sparking punctures during high-pressure work.
The edge contour of described copper techonosphere 22 is less than the edge contour of described ceramic wafer 2, and its effect is：Increase copper construction
Creep age distance between layer 22 and copper clad layers 21, in order to avoid sparking punctures during high-pressure work.
It is additionally provided with molybdenum sheet 4 between described wire jumper 5 and chip 3, the coefficient of expansion of molybdenum materials matter is more connect with chip 3 material silicon
Closely, the stress in chip 3 work can be reduced after increasing molybdenum sheet 4 between specification molybdenum materials matter, enhance the reliability of product.
Two terminations of described wire jumper 5 set U-shaped mouth respectively, and its effect is constraint scolding tin, increase scolding tin and wire jumper 5 after liquefaction
Bonded area, increase soldering reliability.
It is provided with solder mask, its effect is that chip 3 is positioned, and prevents scolding tin in welding process around described chip 3
Trickling causes chip 3 to offset.
This utility model thermal resistance is low, good heat dissipation, and performance is more stable in use to make product.
Claims (5)
1. low thermal resistance H bridge, including copper base, covers copper ceramic wafer, four chips and four wire jumpers it is characterised in that described cover
Copper ceramic wafer includes ceramic wafer body, the copper techonosphere located at described body top surface and the copper clad layers located at described body bottom surface；
Described copper techonosphere is provided with four pieces of mutually insulated regions on described pottery plate top surface, sets respectively on four pieces of mutually insulated regions
There are four chip placing positions so that four chip placing positions are in the medium position on four sides of ceramic wafer.
2. low thermal resistance H bridge according to claim 1 is it is characterised in that the edge contour of described copper clad layers is less than described pottery
The edge contour of porcelain plate.
3. low thermal resistance H bridge according to claim 1 is it is characterised in that the edge contour of described copper techonosphere is less than described
The edge contour of ceramic wafer.
4. low thermal resistance H bridge according to claim 1 is it is characterised in that be additionally provided with molybdenum sheet between described wire jumper and chip.
5. low thermal resistance H bridge according to claim 1 is it is characterised in that two terminations of described wire jumper set U-shaped mouth respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620961815.0U CN205960972U (en) | 2016-08-26 | 2016-08-26 | Low thermal resistance H bridge |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620961815.0U CN205960972U (en) | 2016-08-26 | 2016-08-26 | Low thermal resistance H bridge |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205960972U true CN205960972U (en) | 2017-02-15 |
Family
ID=57979722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620961815.0U Expired - Fee Related CN205960972U (en) | 2016-08-26 | 2016-08-26 | Low thermal resistance H bridge |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205960972U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858574A (en) * | 2018-08-22 | 2020-03-03 | 珠海格力电器股份有限公司 | Packaging structure of ultra-thin chip |
-
2016
- 2016-08-26 CN CN201620961815.0U patent/CN205960972U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858574A (en) * | 2018-08-22 | 2020-03-03 | 珠海格力电器股份有限公司 | Packaging structure of ultra-thin chip |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170215 Termination date: 20170826 |