CN205942683U - Self -actuated control multichannel communication station receives / sends out operating time's platform - Google Patents
Self -actuated control multichannel communication station receives / sends out operating time's platform Download PDFInfo
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- CN205942683U CN205942683U CN201620718718.9U CN201620718718U CN205942683U CN 205942683 U CN205942683 U CN 205942683U CN 201620718718 U CN201620718718 U CN 201620718718U CN 205942683 U CN205942683 U CN 205942683U
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- 238000004891 communication Methods 0.000 title claims abstract description 21
- 238000006243 chemical reaction Methods 0.000 claims abstract description 14
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- 238000013461 design Methods 0.000 abstract description 13
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- 238000012360 testing method Methods 0.000 description 8
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Abstract
The utility model relates to a self -actuated control multichannel communication station receives / sends out operating time's platform, including level switching unit (1), FPGA the control unit (2) and switch element (3) combine together and constitute a whole, and level switching unit sets up J1 inputoutput interface (11), U1 5V3.3V level conversion module (12), U2 RS232CMOS level conversion module (13), FPGA the control unit sets up J2 JTAG interface (21), and U3 FPGA disposes chip (22), U4 FPGA control module (23), the switch element sets up U5 relay module group (31), J3 output interface (32). The utility model discloses an interface mode who concentrates is used in the modular structure design, carries out reasonable drawing forth with crucial pin, realizes the good data interaction between computer and the bottom hardware. Have reasonable in design, compact structure, stability is good, characteristics such as easily debugging, reliability height.
Description
Technical field
This utility model is related to a kind of platform voluntarily controlling multichannel communication multiple telecommunication radio station to transmit/receive the working time, especially can use
In communication station in test process, its working condition was automatically controlled on any seclected time and is tested.
Background technology
At present, communication station is carried out high temperature, low temperature, during the environmental test such as damp and hot it is necessary to first make test
Plan, the timetable that tester drafts according to testing record sheet, manually the working condition of communication station is switched over, and survey
Try its performance indications.
On the other hand although also there being control method, the working condition of communication station is switched over, but, it controls
Simply relative time, and time interval is embedded in corresponding control chip in the design phase, and tester can not basis
Concrete test content is changed accordingly.
Therefore, it is necessary to design a kind of method that can voluntarily control multichannel communication multiple telecommunication radio station to transmit/receive the working time and platform, come
Realize the automatic switchover to communication station working condition and test.
Utility model content
The purpose of this utility model is to overcome the shortcomings of above-mentioned prior art, in communication station test process,
The working time cannot be transmitted/received it is impossible to the defect of effectively utilizes test resource by sets itself, provide one kind voluntarily to control multichannel communication multiple telecommunication
Radio station transmits/receives the platform of working time.
In order to achieve the above object, the technical solution adopted in the utility model is
A kind of platform voluntarily controlling multichannel communication multiple telecommunication radio station to transmit/receive the working time, includes level conversion unit 1, FPGA
Control unit 2, switch element 3, totally 3 parts, it is sequentially connected and connects one entirety of composition, it is characterized in that:
Described level conversion unit 1, setting J1 input/output interface 11, U1 5V/3.3V level switch module 12,
U2RS232/CMOS level switch module 13;And the 2nd foot of J1 input/output interface 11 and the 3rd foot respectively successively with U2RS232/
14th foot of CMOS level switch module 12 and the 13rd foot correspondence are connected;10th foot of J1 input/output interface 11 and U1 5V/
3rd foot of 3.3V level switch module 12 is connected;2nd foot of U1 5V/3.3V level switch module 12 controls mould with U4FPGA
5th foot of block 23 is connected;In order to provide running voltage for U4FPGA control module 23, it is U4FPGA control module 23 and outside
Data communication between computer provides basis.
Described control system 2, arranges J2JTAG interface 21, and U3FPGA configures chip 22, U4FPGA control module
23;And the 1st foot that the 1st foot of J2JTAG interface 21 configures chip 22 with U3FPGA respectively successively to the 9th foot is connected to the 9th foot
Connect;U3FPGA configure the 10th foot to the 18th foot of chip 22 respectively successively with the 10th foot of U4FPGA control module 23 to the 18th foot
It is connected;19th foot of U4FPGA control module 23 to the 50th foot respectively successively with the 1st foot of U5 relay module group 31 to the
32 feet are connected;In order to be controlled interacting of information and date between outer computer.
Described switch element 3, setting U5 relay module group 31 and J3 output interface 32;And U5 relay module 31
33rd foot is connected to the 32nd foot with the 1st foot of J3 output interface 32 respectively successively to the 64th foot;Transmit/receive work in order to export radio station
Make required controlled state.
Fundamental design idea of the present utility model includes three aspects:Level shifting circuit design, FPGA control circuit set
Meter and switch element circuit design.
1st, level shifting circuit design:For the design of level shifting circuit, U1 level switch module 12 is selected
ADP3333,5V/3.3V conversion chip, the direct current 5V voltage of input is changed into direct current 3.3V, provides for U4FPGA control module 23
3.3V running voltage, this chip operation is stable, using the teaching of the invention it is possible to provide stable conversion voltage;U2 level switch module 13 is selected
MAX232E chip, RS232/CMOS electrical level transferring chip carries out the serial ports between U4FPGA control module 23 and outer computer
The conversion of level, high conversion efficiency is it is not easy to malfunction;
2nd, FPGA control circuit design:FPGA control circuit is mainly the instruction by Serial Port Transmission according to outer computer
Carry out the level corresponding to output control state.As general information processing platform, U4FPGA control module 23 needs the letter of output
Number comparatively compare many, but reduction power consumption in need, thus selection be altera corp EPF10K10-114 chip.
EPF10K10-114 chip is the fpga chip of a high-performance, low-power consumption, disclosure satisfy that I/O setting of control unit etc. needs
Will, and chip price is relatively cheap.U4FPGA processing module 23 is designed with data programming mouth, facilitates the burning of FPGA control program
Write, change and on-line debugging.The I/O pin of U4FPGA processing module 23 is all connected to 100 ohm of resistance, prevents the excessive damage of electric current
Bad chip, power pin is all connected to electric capacity and is filtered;
3rd, switch element circuit design:Relay module group transmits/receives the controlled state needed for work in order to export radio station.By
Need to work long hours in, relay module group, so selecting JZC-078M-012-01-I module, it is a high-performance, low
The relay module of power consumption, and cost is relatively low.Level input one diode of parallel connection of each relay module, prevents
Electric current excessive damage relay module.
Work process of the present utility model is:Platform power is by outside input DC voltage+5V through level shifting circuit
Output 3.3V powers for U4FPGA control module 23.On the one hand, U4FPGA control module 23 receives external computer terminal application
The instruction that software is sent by serial ports;On the other hand, U4FPGA control module 23, according to the instruction receiving, manages to corresponding
Foot is configured.The level that in switch element circuit, each relay module configures according to U4FPGA control module 23, output electricity
Platform transmits/receives the controlled state needed for work.
In a word, this utility model adopts Modular Structure Design, using the interface mode concentrated, key pin is closed
The extraction of reason, is carried out transmission and the process of data, realizes good between outer computer and bottom hardware using suitable chip
Good data interaction.By above measure it is achieved that a kind of voluntarily control multichannel communication multiple telecommunication radio station transmits/receives the method for working time and puts down
Platform, has reasonable in design, compact conformation, good stability it is easy to debugging, reliability high the features such as.
Brief description
Fig. 1 this utility model circuit module electricity theory diagram
In figure symbol description
1 is level conversion unit;
2 is control system;
3 is switch element;
11 is J1 input/output interface;
12 is U1 5V/3.3V level switch module;
13 is U2RS232/CMOS level switch module;
21 is J2JTAG interface;
22 is U3FPGA configuration chip;
23 is U4FPGA control module;
31 is U5 relay module group;
32 is J3 output interface.
Specific embodiment
Refer to shown in Fig. 1, be specific embodiment of the utility model.
A kind of level conversion unit 1 is included based on the platform voluntarily controlling multichannel communication multiple telecommunication radio station to transmit/receive the working time,
Control system 2, switch element 3, totally 3 parts, it is sequentially connected and connects one entirety of composition, it is characterized in that:
Setting J1 input/output interface 11, U1 5V/3.3V level switch module 12, U2RS232/CMOS level conversion mould
Block 13;And the 2nd foot of J1 input/output interface 11 and the 3rd foot respectively successively with U2RS232/CMOS level switch module 12 the
14 feet and the 13rd foot correspondence are connected;The of 10th foot of J1 input/output interface 11 and U1 5V/3.3V level switch module 12
3 feet are connected;2nd foot of U1 5V/3.3V level switch module 12 is connected with the 5th foot of U4FPGA control module 23;In order to
There is provided running voltage for U4FPGA control module 23, be that the data communication between U4FPGA control module 23 and outer computer carries
For basis.
Described control system 2, arranges J2JTAG interface 21, and U3FPGA configures chip 22, U4FPGA control module
23;And the 1st foot that the 1st foot of J2JTAG interface 21 configures chip 22 with U3FPGA respectively successively to the 9th foot is connected to the 9th foot
Connect;U3FPGA configure the 10th foot to the 18th foot of chip 22 respectively successively with the 10th foot of U4FPGA control module 23 to the 18th foot
It is connected;19th foot of U4FPGA control module 23 to the 50th foot respectively successively with the 1st foot of U5 relay module group 31 to the
32 feet are connected;In order to be controlled interacting of information and date between outer computer.
Described switch element 3, setting U5 relay module group 31 and J3 output interface 32;And U5 relay module 31
33rd foot is connected to the 32nd foot with the 1st foot of J3 output interface 32 respectively successively to the 64th foot;Transmit/receive work in order to export radio station
Make required controlled state.
What deserves to be explained is the main components model that this utility model is selected is followed successively by:U1 5V/3.3V level conversion mould
Block 12 uses ADP3333 chip;U2RS232/CMOS level switch module 13 uses MAX232E chip;U3FPGA configures chip
22 use EPC2LC20 chip;U4FPGA control module 23 uses EPF10K10-114 chip;U5 relay module group 31 uses
JZC-078M-012-01-I module;Remaining is technical grade components and parts and polish self-made components.
Above example, preferred embodiment only of the present utility model, in order to illustrate technical characteristic of the present utility model and
Exploitativeness;Simultaneously above description, should understand and be carried out for knowing those skilled in the art, therefore,
Equivalent change or modification that other is completed on the premise of without departing from disclosed in this utility model, should be included in this practicality
Within new right.
Claims (3)
1. a kind of platform voluntarily controlling multichannel communication multiple telecommunication radio station to transmit/receive the working time, includes level conversion unit (1), FPGA
Control unit (2), switch element (3), totally 3 parts, it is sequentially connected and connects one entirety of composition, it is characterized in that:
Described level conversion unit (1), setting J1 input/output interface (11), U1 5V/3.3V level switch module (12),
U2RS232/CMOS level switch module (13);And the 2nd foot of J1 input/output interface (11) and the 3rd foot respectively successively with
14th foot of U2RS232/CMOS level switch module (12) and the 13rd foot correspondence are connected;The of J1 input/output interface (11)
10 feet are connected with the 3rd foot of U1 5V/3.3V level switch module (12);The 2nd of U1 5V/3.3V level switch module (12)
Foot is connected with the 5th foot of U4FPGA control module (23);In order to provide running voltage for U4FPGA control module (23), it is
Data communication and outer computer between for the U4FPGA control module (23) provides basis.
2. a kind of voluntarily control multichannel communication multiple telecommunication radio station transmits/receives the platform of working time as claimed in claim 1, it is characterized in that:
Described control system (2), setting J2JTAG interface (21), U3FPGA configuration chip (22), U4FPGA control mould
Block (23);And the 1st foot of J2JTAG interface (21) to the 9th foot configures respectively the 1st foot of chip (22) successively to the 9th with U3FPGA
Foot is connected;U3FPGA configure the 10th foot to the 18th foot of chip (22) respectively successively with U4FPGA control module (23) the 10th
Foot is connected to the 18th foot;19th foot of U4FPGA control module (23) to the 50th foot respectively successively with U5 relay module group
(31) the 1st foot is connected to the 32nd foot;In order to be controlled interacting of information and date between outer computer.
3. a kind of voluntarily control multichannel communication multiple telecommunication radio station transmits/receives the platform of working time as claimed in claim 1, it is characterized in that:
Described switch element (3), setting U5 relay module group (31) and J3 output interface (32);And U5 relay module group
(31) the 33rd foot is connected to the 32nd foot with the 1st foot of J3 output interface (32) respectively successively to the 64th foot;In order to export electricity
Platform transmits/receives the controlled state needed for work.
Priority Applications (1)
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CN201620718718.9U CN205942683U (en) | 2016-07-08 | 2016-07-08 | Self -actuated control multichannel communication station receives / sends out operating time's platform |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106021162A (en) * | 2016-07-08 | 2016-10-12 | 武汉中元通信股份有限公司 | Methods and platform for self-operated control over receiving/transmitting time of multiplex communication radio station |
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2016
- 2016-07-08 CN CN201620718718.9U patent/CN205942683U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106021162A (en) * | 2016-07-08 | 2016-10-12 | 武汉中元通信股份有限公司 | Methods and platform for self-operated control over receiving/transmitting time of multiplex communication radio station |
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Granted publication date: 20170208 |