CN205829607U - A kind of switched-capacitor CMFB circuit - Google Patents

A kind of switched-capacitor CMFB circuit Download PDF

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Publication number
CN205829607U
CN205829607U CN201620736267.1U CN201620736267U CN205829607U CN 205829607 U CN205829607 U CN 205829607U CN 201620736267 U CN201620736267 U CN 201620736267U CN 205829607 U CN205829607 U CN 205829607U
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China
Prior art keywords
electric capacity
switch
switched
circuit
voltage
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201620736267.1U
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Chinese (zh)
Inventor
邹睿
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Shanghai University of Engineering Science
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Shanghai University of Engineering Science
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Priority to CN201620736267.1U priority Critical patent/CN205829607U/en
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Abstract

The utility model discloses a kind of switched-capacitor CMFB circuit, including two parts, correspondence is connected with the positive negative output voltage of external arithmetic amplifier respectively;Described two parts include that two electric capacity and two are to switch respectively, one end of first electric capacity is connected with external arithmetic amplifier as input, the other end is as feedback biasing voltage output end, after switch is connected by the two ends of second electric capacity respectively with first, switch is connected in parallel by second as reference bias voltage input, the two ends of the first electric capacity and the second electric capacity by one end as common-mode voltage outfan, the other end, wherein, pair of switches is different to the open and-shut mode of switch from second.

Description

A kind of switched-capacitor CMFB circuit
Technical field
This utility model relates to a kind of common mode feedback circuit, concrete, relates to a kind of switched-capacitor CMFB circuit, belongs to In electronic circuit field.
Background technology
Switching capacity analog-digital converter (ADC) suffers from extensively at aspects such as DTV, image procossing and radio communications Application.Full differential operational amplifier is one of key modules of ADC, and its performance governs the globality of switching capacity ADC Energy.Owing to the common mode electrical level of Full differential operational amplifier output is unstable, it can be along with factors such as technique, temperature, imbalances Change and float, it is therefore desirable to have common mode feedback circuit to stablize its common mode output level.The realization of common mode feedback circuit There is various structure, it is provided that a kind of have that circuit structure is simple, speed is fast, low in energy consumption, dynamic range advantages of higher Common mode feedback circuit meets the main direction of studying that high accuracy switching capacitance analog-digital converter is existing market mutually.
Utility model content
The problems referred to above existed for prior art, the purpose of this utility model be to provide a kind of simple in construction, low-power consumption, At a high speed, the switched-capacitor CMFB circuit of HDR.
For achieving the above object, the technical solution adopted in the utility model is as follows:
A kind of switched-capacitor CMFB circuit, including two parts, difference correspondence is positive and negative defeated with external arithmetic amplifier Go out voltage to be connected;
Described two parts include respectively two electric capacity and two to switch, one end of first electric capacity as input with outer Portion's operational amplifier is connected, and the other end is as feedback biasing voltage output end, and the two ends of second electric capacity are right with first respectively After switch connects, one end is as common-mode voltage outfan, and the other end is as reference bias voltage input, the first electric capacity and second Switch is connected in parallel by the two ends of electric capacity by second, and wherein, pair of switches is different to the open and-shut mode of switch from second.
As a kind of embodiment, described switched-capacitor CMFB circuit also includes clock circuit, biphase in order to provide Do not overlap clock control signal CLK1 and CLK2, control pair of switches and the second open and-shut mode to switch respectively.
Compared to prior art, Advantageous Effects of the present utility model is:
Using the common mode feedback circuit that this utility model provides, not only circuit structure is simple, speed is fast, low in energy consumption, dynamic Scope advantages of higher, is applicable to high accuracy switching capacitance analog-digital converter, has practical value.
Accompanying drawing explanation
The structural representation of a kind of switched-capacitor CMFB circuit that Fig. 1 provides for this utility model;
Fig. 2 is the output waveform figure of clock circuit described in the utility model.
Detailed description of the invention
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail.
As it is shown in figure 1, a kind of switching capacity feedback circuit that the present embodiment provides, including two electric capacity CM1, two electric capacity CM2, eight switches S1, S2, S3, S4, S5, S6, S7, S8.One electric capacity CM1, an electric capacity CM2 and switch S1, S3, S5, S7 forms a part, a remaining electric capacity CM1, an electric capacity CM2 and switch S2, S4, S6, S7 and forms another part, point The not corresponding positive negative output voltage connecting external arithmetic amplifier.
CK1 and CK2 is that the biphase of clock circuit output does not overlap clock control signal, Voutp and Voutn is respectively outside The positive negative output voltage of operational amplifier, Vcmfb is the feedback biasing voltage that this feedback circuit produces, and Vcmo is output common mode electricity Pressure, Vref is reference bias voltage.When CK1 is high level, switch S5, S6, S7, S8 Guan Bi, two electric capacity CM2 are pre-charged to Vcmo–Vref.When CK2 is high level, switch S1, S2, S3, S4 Guan Bi, electric capacity CM1 and electric capacity CM2 is in parallel, on electric capacity CM2 Electric charge shift to electric capacity CM1, through the transfer in some cycles, electric capacity CM1 both end voltage difference finally also reaches Vcmo Vref. The negative feedback that switched-capacitor CMFB circuit is formed makes output common mode level be finally reached design load.
Described biphase do not overlap the output waveform figure of clock CK1 Yu CK2 as shown in Figure 2.
Operation principle of the present utility model is as follows:
This circuit obtains based on charge distributing principle.When CK1 is high level, electric capacity CM2 is used for keeping common mode to export Difference between voltage Vcmo and reference bias voltage Vref.CK2 becomes high level when by the charge distributing of storage to Electric capacity CM1 and electric capacity CM2 so that Voutp+Voutn-2Vcmfb=2Vcmo-2Vref.If making reference bias voltage Vref With Vcmfb required for ideal voltage value closely, then ensure that Voutp+Voutn=2Vcmo, the most just reach Control the purpose of common mode output voltage.Because when CK2 is high level, electric capacity CMI and electric capacity CM2 is collectively as the output of amplifier Load capacitance, reduces by common mode feedback circuit to amplifier band so the value of electric capacity CM1 and electric capacity CM2 is obtained smaller being conducive to The extra load come.
Finally be necessary it is pointed out here that: the foregoing is only this utility model preferably detailed description of the invention, but this The protection domain of utility model is not limited thereto, and any those familiar with the art discloses at this utility model In technical scope, the change that can readily occur in or replacement, all should contain within protection domain of the present utility model.

Claims (2)

1. a switched-capacitor CMFB circuit, it is characterised in that: include two parts, the most corresponding and external arithmetic amplifier Positive negative output voltage be connected;
Described two parts include that switch, one end of first electric capacity are transported with outside by two electric capacity and two as input respectively Calculation amplifier is connected, the other end as feedback biasing voltage output end, the two ends of second electric capacity respectively with pair of switches After connection, one end is as common-mode voltage outfan, and the other end is as reference bias voltage input, the first electric capacity and the second electric capacity Two ends by second, switch is connected in parallel, wherein, pair of switches from second to switch open and-shut mode different.
Switched-capacitor CMFB circuit the most according to claim 1, it is characterised in that: described switched-capacitor CMFB Circuit also includes clock circuit, in order to provide biphase clock control signal CLK1 and CLK2 that do not overlap, controls first respectively split Close and the second open and-shut mode to switch.
CN201620736267.1U 2016-07-13 2016-07-13 A kind of switched-capacitor CMFB circuit Expired - Fee Related CN205829607U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620736267.1U CN205829607U (en) 2016-07-13 2016-07-13 A kind of switched-capacitor CMFB circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620736267.1U CN205829607U (en) 2016-07-13 2016-07-13 A kind of switched-capacitor CMFB circuit

Publications (1)

Publication Number Publication Date
CN205829607U true CN205829607U (en) 2016-12-21

Family

ID=57563050

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620736267.1U Expired - Fee Related CN205829607U (en) 2016-07-13 2016-07-13 A kind of switched-capacitor CMFB circuit

Country Status (1)

Country Link
CN (1) CN205829607U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20161221

Termination date: 20200713