CN205610498U - Constant current control circuit and constant -current drive circuit - Google Patents

Abstract

The utility model discloses a constant current control circuit and constant -current drive circuit. The constant current control circuit include: main power circuit's current sample signal is received to the current sample module, produces the halfsinusoid signal of reflection output current size, step -by -step integral compensation network, step -by -step integral compensation network produces compensation signal, PFC drive circuit, PFC drive circuit produces according to compensation signal and main power circuit's electric current zero -crossing detection signal the drive signal of main power circuit switch tube, wherein, step -by -step integral compensation network is received the halfsinusoid signal, it is right the halfsinusoid signal adds up, and the valley bottom of halfsinusoid signal perhaps the valley bottom of current sample signal resets to obtain the signal that adds up of one -period nature, and will the signal that adds up is compared with reference voltage, thereby produces compensation signal. This constant current control circuit adopts step -by -step integral control to reduce compensating network's integral capacity.

Description

Constant-current control circuit and constant-current drive circuit

Technical field

This utility model relates to power technology, drives more particularly, to constant-current control circuit and constant current Galvanic electricity road.

Background technology

Non-linear element and energy-storage travelling wave tube is there is so that input AC electricity in substantial amounts of electrical equipment Stream waveform generation Severe distortion, causes grid side input power factor the lowest.In order to meet international mark The harmonic requirement of quasi-IEC61000-3-2, it is necessary to add Active PFC in electrical equipment (PFC) device.PFC device realize high power factor it is critical only that control input current follow Input voltage.It is the best that input voltage is followed by input current, then power factor (PF) is the highest.At present, Most of PFC control programs in order to obtain stable compensation signal, need filtering that parameter is bigger or Compensate network.

Fig. 1 show a kind of constant-current drive circuit using Buck topology of the prior art.Permanent Stream drive circuit includes rectifier bridge B1, input capacitance Cin, power switch pipe Q1, afterflow two pole Pipe D1, transformator T, output capacitance Co, current sampling resistor Rsen, constant-current control circuit 100. This constant-current control circuit 100 includes wave filter 101, error amplifier 102 and PFC control circuit 108.The effect of current sampling resistor Ren is to flow through the current sampling signal CS of resistance Rsen It is converted into voltage signal.This primary current flows through the primary side winding of transformator T.Due to transformator T Primary current there is bigger working frequency ripple wave, therefore, use wave filter 101 to sample Current sampling signal CS is filtered into DC level signal.For Buck topology, flow through transformation The meansigma methods of the primary current of device T is equal with output electric current, therefore the voltage signal of wave filter output Comparing with the reference voltage of error amplifier 102, the error signal of the two is through error amplifier PFC control circuit 108 is delivered to after 102 amplifications.The output signal control of PFC control circuit 108 The break-make of power switch pipe Q1 processed, thus realize the negative feedback closed loop of output electric current is controlled, real Show output electric current constant current.

But, the shortcoming of constant-current drive circuit as shown in Figure 1 is wave filter 101 and compensates network The electric capacity of bulky capacitor value it is respectively adopted, respectively as filter capacity and compensation network integration in 103 Electric capacity.Wave filter 101 and the electric capacity that compensates in network 103 can not integrated in the chips, Zhi Nengzuo For peripheral cell, thus add the complexity of circuit, increase design cost.It is additionally, since Compensating network capacitance as the peripheral cell of control chip, the performance such as the reliability of circuit is held the most accordingly It is vulnerable to the impact of wet environment.

Utility model content

Technical problem to be solved in the utility model be to provide a kind of novel constant-current control circuit and Constant-current drive circuit, to overcome the filtering generally existed in existing high power factor constant current control program Device and compensate the big deficiency of network parameter.

According to one side of the present utility model, it is provided that a kind of constant-current control circuit, including: electric current is adopted Original mold block, described current sample module receives the current sampling signal of main power circuit, produces reflection The half-sinusoid signal of output size of current；Stepping integral compensation network, described stepping integral compensation Network is connected with described current sample module, and produces compensation signal；PFC drive circuit, institute State PFC drive circuit to be connected with described stepping integral compensation network, and according to described compensation signal And the current over-zero detection signal of described main power circuit, produce described main power circuit switching tube Driving signal, wherein, described stepping integral compensation network receive described half-sinusoid signal, right Described half-sinusoid signal adds up, and in the lowest point of described half-sinusoid signal or described The lowest point of current sampling signal resets, thus obtains a periodic cumulative signal, and By described cumulative signal compared with reference voltage, thus produce described compensation signal.

Preferably, described current sample module is low pass filter, for described main power circuit Current sampling signal be filtered.

Preferably, described current sample module includes the first resistance and the first electric capacity, described first electricity First end of resistance receives described current sampling signal, and the second end of described first resistance connects described the First end of one electric capacity, the second end ground connection of described first electric capacity, the first end of described first electric capacity Thering is provided described half-sinusoid signal, described half-sinusoid signal is current average envelope.

Preferably, described current sample module is peak point current sample circuit, is used for obtaining described master The peak value of the electric current of power circuit.

Preferably, described current sample module includes the first resistance, the first electric capacity and the first switch, First end of described first resistance receives described current sampling signal, the second end of described first resistance Connecting the first end of described first switch, the first end of described first electric capacity connects described first switch The second end, the second end ground connection of described first electric capacity, described first electric capacity first end provide institute Stating half-sinusoid signal, wherein, described first switch is near the peak value of described current sampling signal Conducting, thus obtain current peak envelope.

Preferably, described current sample module is output electric current estimation circuit, is used for obtaining reflection defeated Go out the half-sinusoid signal of size of current.

Preferably, described current sample module include the first switch, second switch, the 3rd switch, First electric capacity, the second electric capacity, the first resistance, amplifier and phase inverter.The first of described first switch End receives described current sampling signal, and the second end of described first switch is connected to described first electric capacity The first end, the second end ground connection of described first electric capacity C1, the first end of described first electric capacity is even Connecing the first end of described second switch, the second end of described second switch connects described 3rd switch First end and the positive input terminal of described amplifier, the second end ground connection of described 3rd switch, described amplifier Negative input end be connected with its outfan, the outfan of described amplifier connects the of described first resistance One end, the first end of the second described second electric capacity of termination of described first resistance, described second electric capacity The second end ground connection, described second electric capacity first end provide half-sinusoid signal Vs.Wherein, institute State the control signal of the first switch and described 3rd switch and the driving signal of described master power switch pipe Identical, the control signal of described second switch by the driving signal of described master power switch pipe through described Phase inverter obtains.

Preferably, described stepping integral compensation network includes: cumulative signal generation module, described tired Plus signal generation module produces fixed frequency, the cumulative control signal of fixed duty cycle；The lowest point is detected Module, described the lowest point detection module receives described half-sinusoid signal, and judges described sine half Whether ripple signal or described current sampling signal are in the lowest point, and detection module order in described the lowest point is produced Raw cumulative output sampled signal, cumulative reset signal and cycle integrated signal；Accumulator module, described Accumulator module is connected with described cumulative signal generation module and described the lowest point detection module, and receives Described half-sinusoid signal, described cumulative control signal and described cumulative reset signal, described tired Under the control of increase control signal, described half-sinusoid signal is carried out cumulative to obtain by described accumulator module Described cumulative signal, and in the control of described cumulative output reset signal periodically to institute State cumulative signal to reset；Cumulative output sampling module, described cumulative output sampling module and institute State the lowest point detection module and described accumulator module to connect, and receive described cumulative signal and described tired Add output sampled signal, under the control of described cumulative output sampled signal, periodically sample also Preserve the peak value of described cumulative signal；Error amplification module, described error amplification module is tired with described Add output sampling module to connect, and to the output signal of described cumulative output sampling module with described The reference voltage of error amplification module inner setting compares, and is converted into the electric current of amplification Signal；Cycle integrated module, described cycle integrated module and described error amplification module and described paddy End detection module connects, and receives described current signal, in the control of described cycle integrated signal Under, the output signal of described error amplification module is integrated, produces described compensation signal.

Preferably, described the lowest point detection module includes: the first reference voltage source, described first benchmark Voltage source produces the first reference voltage；5th ratio follow circuit, described 5th ratio follow circuit First end receive described half-sinusoid signal；First comparator, described first comparator anti-phase Input connects the second end of described 5th ratio follow circuit, and in-phase input end connects described first Reference voltage source；And signal generating circuit, the first end of described signal generating circuit connects described The outfan of the first comparator, the second end connects described cumulative output sampling module, three-terminal link Described accumulator module, the 4th end connects described cycle integrated module, wherein, when described signal occurs When electric circuit inspection is to the rising edge of the output signal of described first comparator, determine described half-sinusoid Signal is in the lowest point, and described signal generating circuit, after postponing predetermined delay time, is sequentially generated Described accumulator output sampled signal, described accumulator output reset signal and described integration period letter Number, and respectively in the second to the 4th end offer described accumulator output of described signal generating circuit Sampled signal, described accumulator output reset signal and described integration period signal.

Preferably, described accumulator module includes: the second to the 5th resistance；3rd to the 6th switch； Second and the 3rd electric capacity；First to the 3rd ratio follow circuit；And operational amplifier, wherein, First end of described first ratio follow circuit receives described half-sinusoid signal, and the second end connects institute State the first end of the second resistance；The in-phase input end of described operational amplifier connects described second resistance The second end, inverting input connects the first end of described 3rd resistance, the of described 3rd resistance Two end ground connection, the first end of described 4th resistance connects the inverting input of described operational amplifier, Second end of described 4th resistance connects the outfan of described operational amplifier, described 3rd switch First end connects the outfan of described operational amplifier, and the second end of described 3rd switch connects second First end of electric capacity, the second end ground connection of described second electric capacity, described 5th switch and the second electric capacity Parallel connection, for resetting the electric charge of the second electric capacity, the first end of described second ratio follow circuit connects First end of the 3rd electric capacity, the second end of the second ratio follow circuit connects the first end of the 5th resistance, First resistance first end connect described operational amplifier in-phase input end, described 3rd ratio with The first end with circuit connects the first end of described second electric capacity, described 3rd ratio follow circuit Second end connects the first end of the 4th switch, and the first end of the 3rd electric capacity connects the second of the 4th switch End, the second end ground connection of the 3rd electric capacity, the 6th switch is in parallel with the 3rd electric capacity, for resetting the 3rd The electric charge of electric capacity, wherein, under the control of described cumulative control signal, described 3rd switch and institute State the 4th switch complementary conducting, under the control of described accumulator output reset signal, the described 5th Switch and the described 6th switchs the electric charge on the second electric capacity and the 3rd electric capacity at every half power frequency period Reset.

Preferably, described cumulative output sampling module includes: the 4th ratio follow circuit；8th opens Close；And the 4th electric capacity, wherein, the first end of described 4th ratio follow circuit is connected to described The outfan of accumulator module, the second end of described 4th ratio follow circuit is connected to the described 8th and opens The first end closed, the first end of described 4th electric capacity is connected to the second end of described 8th switch, institute Stating the second end ground connection of the 4th electric capacity, wherein, described 8th switch is in the output sampling of described accumulator Under the control of signal, every half power frequency period turns on once, thus obtains on described 4th electric capacity The accumulated value of every half power frequency period of described accumulator module output, as described cumulative signal.

Preferably, described error amplification module includes: operational transconductance amplifier；And second benchmark Voltage source, described second reference voltage source produces the second reference voltage, wherein, described operational transconductance The inverting input of amplifier connects the outfan of described cumulative output sampling module, described to receive Cumulative signal, the in-phase input end of described operational transconductance amplifier connects the second reference voltage source, with Receiving described second reference voltage, the positive pole of described operational transconductance amplifier flows out or flows into and institute State the electric current that cumulative signal is correspondingly sized, as the current signal of described amplification, described operational transconductance The minus earth of amplifier.

Preferably, described cycle integrated module includes: the 7th switch；And the 5th electric capacity, wherein, First end of described 7th switch connects the outfan of described error amplification module, to receive described electricity Stream signal, the second end of described 7th switch connects the first end of the 5th electric capacity, described 5th electric capacity The second end ground connection, wherein, described 7th switch under the control of described integration period signal, lead The logical scheduled time corresponding with described integration period signal, thus obtain on described 5th electric capacity Described compensation signal.

Preferably, described PFC drive circuit includes: current over-zero testing circuit；Rest-set flip-flop； Saw-tooth wave generating circuit；And second comparator, wherein, described current over-zero testing circuit includes: 6th resistance, the first end of described 6th resistance is connected to main power circuit to receive zero passage detection letter Number；7th resistance, the first end of described 7th resistance connects the second end of described 6th resistance, institute State the second end ground connection of the 7th resistance；And the 3rd comparator, the negative input of described 3rd comparator End connects the second end of described 6th resistance, and the positive input terminal of described 3rd comparator receives the 3rd base Quasi-resistance, the set end of the outfan described rest-set flip-flop of connection of described 3rd comparator, wherein, Described saw-tooth wave generating circuit includes: the first current source；6th electric capacity；9th switch；And the One phase inverter, wherein, the input of described first phase inverter receives described driving signal, and described the The outfan of one phase inverter connects the control end of described 9th switch, the first end of described 6th electric capacity Connect the positive input terminal of described second comparator, the second end ground connection of described 6th electric capacity, described second The negative input end of comparator receives described compensation signal, wherein, is being low electricity when described driving signal Flat period, described 9th switch conduction, the both end voltage of described 6th electric capacity remains zero；Institute Stating driving signal is between high period, and the described 9th cut-offs out, and described constant-current source gives described 6th electricity Capacity charge, the first end level of described 6th electric capacity is linearly increasing, multiple at described driving signal In cycle, the voltage signal at described 6th electric capacity two ends is a sawtooth signal, and, when described When the peak value of sawtooth signal is equal to the level compensating signal, the output level of described second comparator Being high level from low level upset, the outfan of described second comparator connects answering of rest-set flip-flop Position end R.

Preferably, output signal Q of described rest-set flip-flop is as described driving signal.

Preferably, described PFC drive circuit also includes peak value sampling signal generating circuit, described peak Value sampled signal generation circuit includes: time delay module；Second phase inverter；With door；And or door, Wherein, output signal Q of described rest-set flip-flop connects the input, described of described time delay module The input of the second phase inverter and the described or first input end of door, described or the second input of door Connecing the outfan of described time delay module, the output signal of described or door is as described driving signal, institute The outfan stating time delay module connects the described first input end with door, described second phase inverter defeated Go out end and connect described the second input with door, the described output signal with door as control signal, Peak point current sampling is carried out for controlling described current sample module.

Preferably, described main power circuit includes transformator, and described zero cross detection circuit is by institute The zero crossing of the voltage signal stating the Same Name of Ends output of the auxiliary winding of transformator detects, it is judged that Go out the zero crossing of transformer primary side winding current.

According to another aspect of the present utility model, it is provided that a kind of constant-current drive circuit, including: main merit Rate circuit；And above-mentioned constant-current control circuit, wherein, described main power circuit includes: power Switching tube, described power switch pipe is turned on or off under the control of described driving signal；And become Depressor, the primary side winding of described transformator is connected in series with described power switch pipe, wherein, in institute During stating the conducting of power switch pipe, external power source charges to the primary side winding of described transformator, During the disconnection of described power switch pipe, the primary side winding of described transformator powers to the load.

Preferably, described main power circuit can be type Buck power circuit, conventional virtual earth type Buck on the spot Power circuit, flyback power circuit, Buck-boost type power circuit, Boost type power circuit Any one in circuit.

According to three aspects of the present utility model, it is provided that a kind of constant current control method, including: from main merit It is whole with main power circuit with output current in proportion relation, frequency and phase place that rate circuit obtains meansigma methods Flow the half-sinusoid signal that the output signal of bridge is consistent；Utilize the arteries and veins of fixed cycle, fixed duty cycle Rush signal sinusoidal half-wave voltage signal is added up, and reset in the lowest point of half-sinusoid signal, Thus obtain a periodic cumulative signal；Produce in half-sinusoid signal the lowest point and this sine half The cycle integrated signal that ripple signal period frequency is identical；The reference voltage of cumulative signal with setting is entered Row compares, and error therebetween is converted into current signal；Cycle integrated signal is utilized to go to control Electric capacity is integrated by current signal, it is thus achieved that compensate signal；And compensation signal is delivered to PFC drive Galvanic electricity road, produces the driving signal of main power circuit switching tube.

According to the constant-current control circuit of this utility model embodiment, stepping integration control is wherein used Reduce the integrating capacitor compensating network.In a preferred embodiment, current sample module uses cumulative Mode obtains the signal proportional to load current, to omit or to reduce in conventional constant current control circuit Current sample end needed for big filter capacity.

The beneficial effects of the utility model are, on the basis of realizing High Power Factor, remove or subtract Current sample end filter circuit in little conventional high power factor constant current scheme and compensate the electricity of network Hold, reach to simplify circuit peripheral, reduce circuit cost, improve the effects such as circuit reliability.

Accompanying drawing explanation

By description to this utility model embodiment referring to the drawings, of the present utility model above-mentioned And other objects, features and advantages will be apparent from.

Fig. 1 show a kind of constant-current drive circuit using Buck topology of the prior art.

Fig. 2 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model first embodiment Block diagram.

Fig. 3 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model the second embodiment Block diagram.

Fig. 4 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model the 3rd embodiment Block diagram.

Fig. 5, Fig. 6 and Fig. 7 are shown respectively at the constant-current driving electricity according to this utility model embodiment The different instances of the current sample module in road.

The stepping integration that Fig. 8 is shown in the constant-current drive circuit according to this utility model embodiment is mended Repay the schematic block circuit diagram of network.

Fig. 9 illustrates the illustrative circuitry of the constant-current control circuit according to this utility model first embodiment Block diagram.

Figure 10 illustrates the schematic electricity of the constant-current control circuit according to this utility model the second embodiment Road block diagram.

Figure 11 illustrates the work wave of the constant-current control circuit according to this utility model the second embodiment Figure.

Figure 12 is the constant current control method flow chart according to this utility model embodiment.

Detailed description of the invention

It is more fully described this utility model hereinafter with reference to accompanying drawing.In various figures, identical Element uses similar reference to represent.For the sake of clarity, the various piece in accompanying drawing does not has Have drawn to scale.Furthermore, it is possible to not shown part known to some.

Fig. 2 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model first embodiment Block diagram.This constant-current drive circuit uses Buck topology and works in floating ground mode, including rectification Bridge B1, input capacitance Cin, power switch pipe Q1, sustained diode 1, transformator T, defeated Go out electric capacity Co, current sampling resistor Rsen, constant-current control circuit 200.This constant-current control circuit 200 include current sample module 201, stepping integral compensation network 210 and PFC control circuit 208.

Furthermore, input termination alternating current power supply Vac of rectifier bridge B1, rectifier bridge B1 is just Outfan connects the first end of input capacitance Cin, and the negative output terminal of rectifier bridge B1 connects input electricity Hold second end of Cin.First power end of power switch pipe Q1 connects the of input capacitance Cin One end, second power end of power switch pipe Q1 connects the negative electrode of sustained diode 1, afterflow two The anode of pole pipe D1 connects the second end of input capacitance Cin.The first of current sampling resistor Rsen End connects the negative electrode of sustained diode 1, the second end connection transformer of current sampling resistor Rsen The different name end of primary side winding Wp of T, the different name end ground connection of primary side winding Wp of transformator T, The Same Name of Ends of primary side winding Wp of transformator T connects the first end of output capacitance Co, electric capacity Co Second end connect input capacitance Cin the second end, output capacitance Co be configured to load in parallel. The different name end ground connection of the auxiliary winding of transformator T.The control end of power switch pipe Q1 receives and controls The driving signal Vg that circuit produces.The first end at current sampling resistor Rsen obtains current sample Signal CS.As a nonrestrictive example, the current sampling resistor Rsen in the present embodiment Including current sampling resistor Rsen, it should be appreciated to those skilled in the art that current sampling resistor Rsen can also use other to have the circuit structure of current sense function.

In constant-current control circuit 200, the electric current of current sample module 201 receiving transformer T is adopted Sample signal CS, output can reflect the half-sinusoid signal Vs of output size of current.Stepping integration is mended Repay network 210 and receive half-sinusoid signal Vs, sinusoidal half-wave voltage signal is added up, and at sine The lowest point of half-wave voltage signal resets, thus obtains a periodic cumulative signal, and will be tired Plus signal compensates signal Vcomp to produce compared with reference voltage.PFC drive circuit 208 According to the compensation signal Vcomp received from stepping integral compensation module and fly-wheel diode electric current mistake Zero detection signal ZCD, produces the driving signal Vg of main power circuit switching tube.

Fig. 3 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model the second embodiment Block diagram.This constant-current drive circuit uses Buck topology and works in mode on the spot, including rectification Bridge B1, input capacitance Cin, power switch pipe Q1, sustained diode 1, transformator T, defeated Go out electric capacity Co, current sampling resistor Rsen, constant-current control circuit 200.This constant-current control circuit 200 include current sample module 201, stepping integral compensation network 210 and PFC control circuit 208.

Furthermore, the input of rectifier bridge B1 connects alternating current power supply Vac, rectifier bridge B1's Positive output end connects the first end of input capacitance Cin, and the negative output terminal of rectifier bridge B1 connects input Second end of electric capacity Cin, the second end ground connection of input capacitance Cin.Current sampling resistor Rsen's First end connects the second end of input capacitance Cin, i.e. ground connection, the second of current sampling resistor Rsen End connects second power end of power switch pipe Q1, and first power end of power switch pipe Q1 connects The anode of sustained diode 1, the negative electrode of sustained diode 1 connects the first of input capacitance Cin End.The Same Name of Ends of primary side winding Wp of transformator T connects first power of power switch pipe Q1 End, i.e. the anode of sustained diode 1, the different name end of primary side winding Wp of transformator T connects Second power end of output capacitance Co, the first power end of output capacitance Co connects input capacitance First end of Cin, the i.e. negative electrode of sustained diode 1.Output capacitance Co is configured to load also Connection, this load can be LED etc..The different name end ground connection of the auxiliary winding of transformator T.Power The end that controls of switching tube Q1 receives the driving signal Vg that constant-current control circuit produces.At current sample Second end of resistance Rsen obtains current sampling signal CS.As a nonrestrictive example, Current sampling resistor Rsen in the present embodiment includes current sampling resistor Rsen, but this area It will be appreciated by the skilled person that current sampling resistor Rsen can also use other to have current detecting merit The circuit structure of energy.

In constant-current control circuit 200, the electric current of current sample module 201 receiving transformer T is adopted Sample signal CS, output can reflect the half-sinusoid signal Vs of output size of current.Stepping integration is mended Repay network 210 and receive half-sinusoid signal Vs, sinusoidal half-wave voltage signal is added up, and at sine The lowest point of half-wave voltage signal resets, thus obtains a periodic cumulative signal, and will be tired Plus signal compensates signal Vcomp to produce compared with reference voltage.PFC drive circuit 208 According to the compensation signal Vcomp received from stepping integral compensation module and fly-wheel diode electric current mistake Zero detection signal ZCD, produces the driving signal Vg of main power circuit switching tube.

Fig. 4 illustrates the illustrative circuitry of the constant-current drive circuit according to this utility model the 3rd embodiment Block diagram.This constant-current drive circuit use flyback topologies, including rectifier bridge B1, input capacitance Cin, Power switch pipe Q1, sustained diode 1, transformator T, output capacitance Co, current sample electricity Resistance Rsen, constant-current control circuit 200.This constant-current control circuit 200 include current sample module 201, Stepping integral compensation network 210 and PFC control circuit 208.

Furthermore, the input of rectifier bridge B1 connects alternating current power supply Vac, rectifier bridge B1's Positive output end connects the first end of input capacitance Cin, and the negative output terminal of rectifier bridge B1 connects input Second end of electric capacity Cin, the second end ground connection of input capacitance Cin.Current sampling resistor Rsen's First end connects the second end of input capacitance Cin, i.e. ground connection, the primary side winding of transformator T same Name end connects the first end of input capacitance Cin, and the different name end of the primary side winding of transformator T connects merit First power end of rate switching tube Q1, second power end of power switch pipe Q1 connects current sample Second end of resistance Rsen, the different name end of transformer secondary winding connects the sun of sustained diode 1 Pole, the different name end of the vice-side winding of transformator T connects the second power end of output capacitance Co, defeated The first power end going out electric capacity Co connects the negative electrode of sustained diode 1.Output capacitance Co configures For in parallel with load, this load can be LED etc..The Same Name of Ends of the auxiliary winding of transformator T Ground connection.The end that controls of power switch pipe Q1 receives the driving signal Vg that constant-current control circuit produces. The second end at current sampling resistor Rsen obtains current sampling signal CS.Unrestricted as one The example of property, the current sampling resistor Rsen in the present embodiment includes current sampling resistor Rsen, It should be appreciated to those skilled in the art that current sampling resistor Rsen can also use other to have The circuit structure of current sense function.

In constant-current control circuit 200, the electric current of current sample module 201 receiving transformer T is adopted Sample signal CS, output can reflect the half-sinusoid signal Vs of output size of current.Stepping integration is mended Repay network 210 and receive half-sinusoid signal Vs, sinusoidal half-wave voltage signal is added up, and at sine The lowest point of half-wave voltage signal resets, thus obtains a periodic cumulative signal, and will be tired Plus signal compensates signal Vcomp to produce compared with reference voltage.PFC drive circuit 208 According to the compensation signal Vcomp received from stepping integral compensation module and fly-wheel diode electric current mistake Zero detection signal ZCD, produces the driving signal Vg of main power circuit switching tube.

In the constant-current drive circuit according to first embodiment, the second embodiment and the 3rd embodiment, Stepping integral compensation network 210 uses stepping integration control to reduce the integrating capacitor compensating network.

Fig. 5, Fig. 6 and Fig. 7 are shown respectively at the constant-current driving electricity according to this utility model embodiment The different instances of the current sample module in road.

In the main power circuit shown in Fig. 2, current sampling resistor Rsen is connected to power switch pipe Between second power end and the different name end of transformator of Q1, therefore, flow through current sampling resistor Rsen On electric current be transformer primary side winding current, can directly reflect output electric current.Correspondingly, electricity The implementation of stream sampling module 201 is low pass filter filtering mode, as shown in Figure 5.Described Wave filter plays the effect filtering high frequency, thus its parameter is little, and electric capacity can choose low-capacitance electric capacity, It is output as primary side current of transformer mean envelope.Described low pass filter include resistance R1 and Electric capacity C1.First end of resistance R1 receives current sampling signal CS, resistance from main power circuit Second end of R1 is connected to first end of electric capacity C1, the second end ground connection of electric capacity C1.Electric capacity C1 First end provide half-sinusoid signal Vs.

In the main power circuit shown in Fig. 3, current sampling resistor Rsen is connected to input capacitance Between second end and first power end of power switch pipe Q1 of Cin, therefore, flow through current sample Electric current on resistance Rsen is the electric current flowing through power switch pipe Q1.Correspondingly, current sample mould The implementation of block 201 is peak point current sample mode shown in Fig. 6, its by input resistance R1, open Close Q2, holding capacitor C1 composition.First end of input resistance R1 receives electricity from main power circuit Stream sampled signal CS, second end of input resistance R1 is connected to switch first end of Q2, switch Second end of Q2 is connected to the first end of holding capacitor C1, the second end ground connection of holding capacitor C1. First end of electric capacity C1 provides half-sinusoid signal Vs.

Control signal Vg5 of switch Q2 is produced by PFC drive circuit 208.Vg5 is a pulsewidth Drive the periodic short pulse signal of signal Vg pulsewidth much smaller than power switch pipe Q1, Vg5 opens Closing frequency drives signal Vg identical with power switch pipe Q1, the trailing edge of Vg5 and the decline of Vg Along alignment or slightly advanced some time.Under the control of Vg5, each cycle switch Q2 is at switch Pipe Q1 is open-minded before disconnecting, thus obtains the primary current peak value of transformator T in holding capacitor C1 Envelope.

In the main power circuit shown in Fig. 4, current sampling resistor Rsen is connected to input capacitance Between second end and first power end of power switch pipe Q1 of Cin, therefore, flow through current sample Electric current on resistance Rsen is the primary current flowing through transformator T.Correspondingly, current sample mould The implementation of block 201 is output current estimation mode shown in Fig. 7, its by switch Qx1～Qx3, Holding capacitor Cx1, phase inverter Ux1, amplifier Ux2 and resistance Rx1 and electric capacity Cx2 are constituted Low pass filter forms.First end of switch Qx1 receives current sampling signal from main power circuit Second end of CS, switch Qx1 is connected to the first end of holding capacitor C1, holding capacitor C1 Second end ground connection, the first end of holding capacitor C1 is also connected with switching first end of Qx2, switchs Qx2 First end of the second end connecting valve Qx3 and the positive input terminal of amplifier Ux2, switch Qx3's Second end ground connection, the negative input end of amplifier Ux2 is connected with its outfan, the outfan of amplifier Ux2 Connect first end of resistance Rx1, the first end of second termination capacitor Cx2 of resistance Rx1, electric capacity The second end ground connection of Cx2.First end of electric capacity Cx2 provides half-sinusoid signal Vs.

Control signal Vg of switch Qx1 is produced by PFC drive circuit 208.Vg is that power is opened Closing the driving pulse of pipe Q1, each cycle switch Qx1 turns on and off with switching tube Q1 simultaneously, Thus in holding capacitor Cx1, obtain trapezoidal identical with the primary current peak envelope of T of an amplitude Ripple becomes.The control signal of switch Qx2 is the pulse after Vg inverted device Ux1 negates, switch The control signal of Qx3 is Vg, by turning on and off in amplifier of switch Qx2 and switch Qx3 The positive input terminal of Ux2 obtains that an amplitude is identical with the primary current peak envelope of T, pulsewidth approximation with The square wave that transformer secondary diode D1 time of afterflow is equal, through following that amplifier Ux2 is constituted Device is identical with the positive input terminal waveform of amplifier Ux2 in the first end acquisition of resistance Rx1 after following Square wave, this square wave after the low pass filter filtering that Rx1 and electric capacity Cx2 are constituted at electric capacity Cx2 obtains the half-sinusoid signal Vs that a meansigma methods is proportional to output load current.

The stepping integration that Fig. 8 is shown in the constant-current drive circuit according to this utility model embodiment is mended Repay the schematic block circuit diagram of network.Stepping integral compensation network 210 includes cumulative signal generation mould Block 212, the lowest point detection module 213, accumulator module 214, cumulative output sampling module 215, mistake Difference amplification module 216 and cycle integrated module 217.

Cumulative signal generation module 212 produces the cumulative control signal of fixed frequency, fixed duty cycle Vg1。

The lowest point detection module 213 receives the half-sinusoid letter of the output of described current sample module 201 Number or the exchange input of main power circuit rectified after the lowest point of output signal.The lowest point detection mould Block 213 judges half-sinusoid signal or the main power circuit exchange that current sample module 201 exports Input rectified after output signal be in the lowest point, order is produced cumulative by the lowest point detection module 213 Output sampled signal Vg2, cumulative reset signal Vg3 and cycle integrated signal Vg4.

Accumulator module 214, described accumulator module 214 receives current sample module 201 and is just exporting Cumulative control signal Vg1 of string half-wave voltage signal, cumulative signal generation module 212 output and the lowest point Cumulative reset signal Vg3 of detection module 213 output, in the control of described cumulative control signal Vg1 Under system, the half-sinusoid signal that current sample module 214 is exported by accumulator module 214 adds up, Signal after Lei Jia periodically resets in the control of described cumulative output reset signal Vg3.

Cumulative output sampling module 215, described cumulative output sampling module 215 receives accumulator module The output signal of 214 and cumulative output sampled signal Vg2 of the lowest point detection module 213 output, tired Add output sampling module 215 under the control of described cumulative output sampled signal Vg2, periodically Sample and preserve the peak value of output signal of accumulator module 214.

Error amplification module 216, described error amplification module 216 is to cumulative output sampling module 215 Output signal compares with the reference voltage of error amplification module 216 inner setting, puts through error Big current mode error amplifier within module 216 is converted into the current signal of amplification.

Cycle integrated module 217, described cycle integrated module 217 receives error amplification module 216 The current signal of output, in the control of the cycle integrated signal Vg4 of the lowest point detection module 213 output Under system, the output signal to error amplification module 216 is integrated, and exports compensation signal Vcomp.

Fig. 9 illustrates the illustrative circuitry of the constant-current control circuit according to this utility model first embodiment Block diagram.Constant-current control circuit 200 includes current sample module 201, stepping integral compensation network 210 With PFC control circuit 208.Stepping integral compensation network 210 include cumulative signal generation module 212, The lowest point detection module 213, accumulator module 214, cumulative output sampling module 215, error amplify mould Block 216 and cycle integrated module 217.

In this embodiment, the implementation of current sample module 201 is low pass filter filtering side Formula.Described low pass filter includes resistance R1 and electric capacity C1.First end of resistance R1 is from main merit Rate circuit receives current sampling signal CS, and second end of resistance R1 is connected to the first of electric capacity C1 End, the second end ground connection of electric capacity C1.First end of electric capacity C1 provides half-sinusoid signal Vs.

Cumulative signal generation module 212 produces cumulative control signal Vg1, is used for controlling accumulator module Switch on and off in 214.

The lowest point detection module 213 is by ratio follow circuit K5, benchmark voltage source VDC2, ratio Relatively device U3 and signal generating circuit composition.First end of ratio follow circuit K5 connects electric current and adopts First end of holding capacitor C1 in original mold block 201, second end of ratio follow circuit K5 connects The inverting input of comparator U3, the in-phase input end of comparator U3 connects benchmark voltage source The positive pole of VDC2, the minus earth of benchmark voltage source VDC2.The output of comparator U3 Connect signal generating circuit, whenever signal generating circuit detects that comparator U3 exports rising edge, I.e. assert that the output signal of current sample module 201 is in the lowest point, signal generating circuit will be necessarily Delay time T2 after, be sequentially generated accumulator output sampled signal Vg2, accumulator output Reset signal Vg3 and integration period signal Vg4.

Accumulator module 214 includes that ratio follow circuit K1, ratio follow circuit K2, ratio are followed Circuit K3, resistance R2, resistance R3, resistance R4, resistance R5, operational amplifier U1, guarantor Hold electric capacity C2, holding capacitor C3, switch Q3, switch Q4, switch Q5, switch Q6.Electricity First end of holding capacitor C1 in stream sampling module 201 connects the first of ratio follow circuit K1 End, second end of ratio follow circuit K1 is connected to first end of resistance R2, the of resistance R2 Two ends are connected to the in-phase input end of operational amplifier U1.The first end ground connection of resistance R3, it is years old The inverting input of two end concatenation operation amplifier U1.First end of resistance R4 connects resistance R3 The second end, i.e. the inverting input of operational amplifier U1, the second end concatenation operation of resistance R4 The outfan of amplifier U1.First end of the outfan connecting valve Q3 of operational amplifier U1, Second end of switch Q3 connects the first end of holding capacitor C2, the second termination of holding capacitor C2 Ground.Q5 is in parallel with holding capacitor C2 for switch, for resetting the voltage of C2.Ratio follow circuit First end of K3 connects the first end of holding capacitor C2, and second end of ratio follow circuit K3 is even Connect first end of switch Q4.Second end of the first end connecting valve Q4 of holding capacitor C3, protects Hold the second end ground connection of electric capacity C3.Q6 is in parallel with holding capacitor C3 for switch, is used for resetting C3 Voltage.Ratio follow circuit K2 first end connect holding capacitor C3 the first end, ratio with The second end with circuit K2 connects first end of resistance R5.Second end of resistance R5 connects resistance Second end of R2, the i.e. in-phase input end of operational amplifier U1.Cumulative signal generation module 212 Produce cumulative control signal Vg1, control switch Q3 and switch Q4 complementation conducting.The lowest point detection mould Block 213 produces accumulator output reset signal Vg3, and every half power frequency period is by holding capacitor C2 Reset once with the electric charge in holding capacitor C3.

Cumulative output sampling module 215 is by ratio follow circuit K4, switch Q8 and holding capacitor C4 forms.First end of ratio follow circuit K4 is connected to the holding capacitor in accumulator module 214 First end of C2, second end of ratio follow circuit K4 is connected to switch first end of Q8.Protect The first end holding electric capacity C4 is connected to switch second end of Q8, the second termination of holding capacitor C4 Ground.The lowest point detection module 213 produces accumulator output sampled signal Vg2, every half power frequency period Control switch Q8 to turn on once, electric capacity C4 obtains every half work of accumulator module 214 output Frequently the accumulated value in cycle.

Error amplification module 216 is by operational transconductance amplifier U2, benchmark voltage source VDC1 Composition.The minus earth of operational transconductance amplifier U2, the anti-phase input of operational transconductance amplifier U2 End connects the first input end of holding capacitor C4 in cumulative output sampling module 215, and mutual conductance is transported The in-phase input end calculating amplifier U2 connects the positive pole of benchmark voltage source VDC1, compares base The minus earth of reference voltage source VDC1.Operational transconductance amplifier U2 is according to cumulative output sampling mould The level of holding capacitor C4 in block 215 and the voltage difference of benchmark voltage source VDC1, its Positive pole will flow out or flows into correspondingly sized electric current.(VDC1-VC4) the biggest, operational transconductance The electric current that amplifier U2 flows out is the biggest, otherwise the least；(VC4-VDC1) the biggest, mutual conductance is transported The electric current calculating amplifier U2 inflow is the biggest, otherwise the least.

Cycle integrated module 217 is made up of switch Q7 and integrating capacitor C5.The first of switch Q7 End connects the positive pole of the operational transconductance amplifier U2 in error amplification module 104, the of switch Q7 Two ends connect the first end of integrating capacitor C5, the second end ground connection of integrating capacitor C5.The lowest point is detected Module 213 produces integration period signal Vg4, controls correspondingly sized a certain solid of switch Q7 conducting Fix time, integrating capacitor C5 is compensated signal Vcomp.

PFC drive circuit 208 is the constant turn-on time that can realize primary side current of transformer critical conduction The power factor control circuit controlled, including current over-zero testing circuit, rest-set flip-flop U4, saw Tooth wave generation circuit and comparator U6.The constant turn-on time that PFC drive circuit 208 realizes controls Power factor control circuit is the one in the many power factor control circuits of prior art, ability Field technique personnel should be appreciated that the control electricity that PFC control circuit 218 can also take other form Road and do not affect the function of embodiment.Current over-zero testing circuit includes: resistance R6, its first end Connect the Same Name of Ends of the auxiliary winding of described transformator T；Resistance R7, its first end connects described electricity Second end of resistance R6, its second end ground connection；Comparator U5, its negative input end connects described resistance Second end of R6, its positive input terminal receives the reference voltage VDC3 preset, and its outfan connects institute State the set end S of rest-set flip-flop U4.Current over-zero testing circuit is by the auxiliary to transformator T The zero crossing of voltage signal of the Same Name of Ends output of winding carry out detection judge the former limit of transformator T around The zero crossing of group electric current；

Saw-tooth wave generating circuit includes current source IDC1, electric capacity C6, switch Q9 and phase inverter U11；The input of phase inverter U11 receives the driving signal Vg of power switch pipe Q1, phase inverter The output of U11 connect switch Q9 control end, the positive input terminal just terminating comparator U6 of C6, The negativing ending grounding of C6；The negative input end of comparator U6 receives cycle integrated module 217 output Vcomp signal；When Vg is between low period, switch Q9 conducting, C6 both end voltage remains Zero；Being between high period at Vg, switch Q9 disconnects, and constant-current source IDC1 charges to electric capacity C6, C6 anode level is linearly increasing；Owing to Vg is periodic signal, the therefore voltage signal at C6 two ends It it is a sawtooth signal；Vcomp level, comparator U6 is touched when C6 anode level rises Output level from low level upset for high level.

The reset terminal R of the output termination rest-set flip-flop U4 of comparator U6.Rest-set flip-flop U4's Output signal Q is as the output Vg of PFC drive circuit 208.

Figure 10 illustrates the schematic electricity of the constant-current control circuit according to this utility model the second embodiment Road block diagram.Constant-current control circuit 200 includes current sample module 201, stepping integral compensation network 210 and PFC control circuit 208.Stepping integral compensation network 210 includes cumulative signal generation mould Block 212, the lowest point detection module 213, accumulator module 214, cumulative output sampling module 215, mistake Difference amplification module 216 and cycle integrated module 217.

Figure 10 according to the constant-current control circuit of the second embodiment and Fig. 9 according to the constant current of first embodiment The difference of control circuit is the structure of current sample module 201 and PFC drive circuit 208 Different.For simplicity's sake, the difference of two kinds of constant-current control circuits the most only described, identical it Place is the most no longer described in detail.

In this embodiment, the implementation of current sample module 201 is peak point current sample mode. Current sample module 201 includes input resistance R1, switch Q2, holding capacitor C1.Input resistance First end of R1 receives current sampling signal CS, the second of input resistance R1 from main power circuit End is connected to switch first end of Q2, and second end of switch Q2 is connected to the of holding capacitor C1 One end, the second end ground connection of holding capacitor C1.First end of electric capacity C1 provides half-sinusoid signal Vs。

PFC drive circuit 208 is the constant turn-on time that can realize primary side current of transformer critical conduction The power factor control circuit controlled, including current over-zero testing circuit, rest-set flip-flop U4, saw Tooth wave generation circuit, comparator U6 and peak value sampling signal generating circuit.PFC drive circuit 208 The power factor control circuit that the constant turn-on time realized controls is the many power factors of prior art One in control circuit, it will be appreciated by those skilled in the art that PFC control circuit 218 also may be used With the control circuit that takes other form and the function not affecting embodiment.Current over-zero testing circuit Including: resistance R6, its first end connects the Same Name of Ends of the auxiliary winding of described transformator T.Resistance R7, its first end connects second end of described resistance R6, its second end ground connection.Comparator U5, Its negative input end connects second end of described resistance R6, and its positive input terminal receives the reference electricity preset Pressure VDC3, its outfan connects the set end S of described rest-set flip-flop U4.Current over-zero detects The zero crossing of the voltage signal that circuit exports by transformator T assists the Same Name of Ends of winding is carried out The zero crossing of transformator T primary side winding electric current is judged in detection.

Saw-tooth wave generating circuit includes current source IDC1, electric capacity C6, switch Q9 and phase inverter U11.The input of phase inverter U11 receives the driving signal Vg of power switch pipe Q1, phase inverter The output of U11 connect switch Q9 control end, the positive input terminal just terminating comparator U6 of C6, The negativing ending grounding of C6.The negative input end of comparator U6 receives cycle integrated module 217 output Vcomp signal.When Vg is between low period, switch Q9 conducting, C6 both end voltage remains Zero.Being between high period at Vg, switch Q9 disconnects, and constant-current source IDC1 charges to electric capacity C6, C6 anode level is linearly increasing.Owing to Vg is periodic signal, the therefore voltage signal at C6 two ends It it is a sawtooth signal.Vcomp level, comparator U6 is touched when C6 anode level rises Output level from low level upset for high level.

The reset terminal R of the output termination rest-set flip-flop U4 of comparator U6.

Peak value sampling signal generating circuit include time delay module U12, phase inverter U8 and door U9 and Or door U10.Output signal Q of rest-set flip-flop U4 connects the input of time delay module U12, anti- The input of phase device U8 and or the first input end of door U10.Or the second input termination of door U10 The outfan of time delay module U12, or the output of door U10 is the defeated of PFC drive circuit 208 Go out Vg.Produce described driving signal Vg.The outfan of time delay module U12 also connects with door U9's First input end, the output of phase inverter U8 connects the second input with door, is output as with door U9 Control signal Vg5 of switch Q2.

Figure 11 illustrates the work wave of the constant-current control circuit according to this utility model the second embodiment Figure.

Current sample module 201 obtains the peak value of the electric current Ip flowing through power switch pipe Q1, then The envelope Ips of peak point current Ip is added up by accumulator module 214 by cumulative signal Vg1, The accumulated value of every half power frequency period can react the size of output electric current, is then sent into by accumulated value Error amplification module 216 compares with the reference voltage set and error is amplified, and error amplifies letter Number through cycle integrated module 217 produce compensate signal Vcomp, finally Vcomp is sent into PFC Drive circuit 208 produces and drives signal Vg.

When exporting electric current Io and increasing, meansigma methods IL_av of electric current Ip increases, and compensates signal Vcomp Reducing, PFC drive circuit makes 208 the dutycycle of signal Vg must be driven to diminish so that output electricity Stream Io reduces.When exporting electric current Io and reducing, meansigma methods IL_av of electric current Ip reduces, and compensates Signal Vcomp increases, and PFC drive circuit makes 208 the dutycycle of signal Vg must be driven to diminish, Make to export electric current Io to increase.It can be seen from the above description that constant-current control circuit achieves defeated Go out the closed loop control of electric current Io, thus it is constant to regulate output electric current Io.

If setting the switch periods of cumulative control signal Vg1 as T1, then tired in half power frequency period Adding times N is:

$N=\frac{T/2}{T1}r5$

Wherein T is the power frequency period of input ac voltage.

In Figure 11, the area of any one section of waveform of peak envelope Ips is:

Δ S (n)=Ips (n) T1

Then meansigma methods Ips_av of peak point current envelope Ips is:

$Ips\_av=\frac{1}{T/2}\underset{n=1}{\overset{N}{\mathrm{\Σ}}}\mathrm{\Δ}S\left(n\right)=\frac{T1}{T/2}\underset{n=1}{\overset{N}{\mathrm{\Σ}}}Ips\left(n\right)$

For Buck circuit, owing to output current average Io to Ips_av is directly proportional, and T1, T are constant, it is known that output electric current Io and accumulated valueIt is directly proportional.

As it is shown in figure 9, the main power circuit switching tube Q1 electric current Ip obtained from current sample end CS Obtain peak point current envelope Ips through current sample module 201, the lowest point detection module 213 internal with Reference voltage V DC2 set compares, and obtains the lowest point district, and the lowest point detection module 213 is in paddy End zone sequence produces cumulative output sampled signal Vg2, cumulative reset signal Vg3 and cycle integrated Signal Vg4.Cumulative signal generation module 212 produces the cumulative control of fixed frequency, fixed duty cycle Signal Vg1 processed.

One specific embodiment of accumulator module 214 as shown in figure 11 include ratio follower K1, Resistance R2, resistance R5, ratio follower K2, electric capacity C3, switch Q6, switch Q4, ratio Example follows its K3, phase inverter U5, resistance R3, resistance R4, amplifier U1, switch Q3, electricity Hold C2 and switch Q5.The outfan of the input termination current sample module 201 of K1, K1's is defeated Go out first end of connecting resistance R2, the positive input terminal of second termination amplifier U1 of resistance R2 and resistance First end of R5, the second termination outfan of K2, the input termination capacitor of K2 of resistance R5 First end of C3, first end of switch Q6 and second end of switch Q4, second end of electric capacity C3 With the second end ground connection of switch Q6, the control end of switch Q6 receives cumulative reset signal Vg3, opens Close the outfan of the first termination ratio follower K3 of Q4, the control termination phase inverter of switch Q4 The outfan of U5, the input of phase inverter U5 receives cumulative control signal Vg1, ratio follower First end of input termination capacitor C2 of K3, first end of switch Q5 and the second of switch Q3 End, second end of electric capacity C2 and the second end ground connection of switch Q5, the control end of switch Q5 receives Cumulative reset signal Vg3, the control end of switch Q3 receives cumulative control signal Vg1, amplifier U1 First end of negative input end connecting resistance R3 and first end of resistance R4, second end of resistance R3 Ground connection, the output of amplifier U1 connects first end of switch Q3.Amplifier U1 and resistance R2, resistance R5, resistance R3, resistance R4 together constitute add circuit, to current sampled value and the last week The accumulated value of phase is added.Switch Q5 is controlled by cumulative output reset signal Vg3, right The accumulated value that electric capacity C2 two ends obtain periodically resets, and finally produces such as on electric capacity C2 The periodic signal VC2 that ladder shown in Figure 11 rises is the output signal of accumulator module 214.

Cumulative output sampling module 215 includes ratio follower K4, switch Q8 and electric capacity C4, Cumulative output sampled signal Vg2 controls switch Q8 to VC2 signal after ratio follower K4 Sample and keep, obtaining VC2 at the electric capacity C4 two ends within cumulative output sampling module 215 Peak signal VC4, according to Such analysis understand VC4 two ends magnitude of voltage beAnd And to output electric current Io the proportional relation of meansigma methods.The output letter of cumulative output sampling module 215 Number deliver to the reference voltage of error amplification module 216 and error amplification module 216 inner setting VDC1 compares, and is converted into through the current mode error amplifier within error amplification module 216 For the current signal amplified, if VC4 is less than VDC1, then error amplification module 216 exports Current signal is positive current, otherwise, the current signal of error amplification module 216 output is negative current. And error therebetween is amplified.Cycle integrated module 217 is by switch Q7 and an electric capacity C5 forms, and switch Q7 is controlled by cycle integrated signal Vg4.When Vg4 controls switch Q7 Conducting, electric capacity C5 is integrated by the current signal of error amplification module 216 output.Work as Vg4 Controlling switch Q7 to disconnect, electric capacity C5 both end voltage Vcomp keeps constant.If error is amplified The current signal of module 216 output is positive current, then at each integration period electric capacity C5 two ends electricity Pressure Vcomp linear rise, if the current signal of error amplification module 216 output is negative current, Then at each integration period electric capacity C5 both end voltage Vcomp linear decline.Figure 11 show by mistake The current signal of difference amplification module 216 output is the situation of positive current.Cycle integrated module 217 is defeated The compensation signal Vcomp gone out sends into PFC power driving circuit 218.When output electric current Io increases, Meansigma methods Ips_av of the peak envelope Ips of switching tube electric current Ip increases, then compensate signal Vcomp Reduce.Electric capacity C6 both end voltage within PFC power driving circuit 218 is raised to Vcomp from above freezing Time reduce the most accordingly, comparator U6 export the R end of rest-set flip-flop U4 level upset Signal is in advance so that drive the pulse width of signal Vg to reduce, i.e. the ON time of switching tube Q1 Reduce, thus the peak envelope Ips amplitude of switching tube electric current Ip reduces so that under output electric current Io Fall, regulation output electric current Io.When output electric current Io reduces, corresponding regulation process is contrary, by control Output electric current Io is constant for circuit scalable processed.

In alternate embodiments, in the constant-current control circuit shown in Figure 10, use shown in Fig. 7 Current sample module 201.For simplicity's sake, two kinds of constant-current control circuits are the most only described not Same part, something in common the most no longer describes in detail.

Current sample module 201 by switch Qx1～Qx3, holding capacitor Cx1, phase inverter Ux1, The low pass filter composition that amplifier Ux2 and resistance Rx1 and electric capacity Cx2 are constituted.Switch Qx1 The first end from main power circuit receive current sampling signal CS, switch Qx1 second end connect To the first end of holding capacitor C1, the second end ground connection of holding capacitor C1, holding capacitor C1 First end is also connected with switching first end of Qx2, the second end connecting valve Qx3's of switch Qx2 First end and the positive input terminal of amplifier Ux2, the second end ground connection of switch Qx3, amplifier Ux2 Negative input end is connected with its outfan, and the outfan of amplifier Ux2 connects first end of resistance Rx1, First end of second termination capacitor Cx2 of resistance Rx1, the second end ground connection of electric capacity Cx2.Electric capacity First end of Cx2 provides half-sinusoid signal Vs.

Control signal Vg of switch Qx1 is produced by PFC drive circuit 208.Vg is that power is opened Closing the driving pulse of pipe Q1, each cycle switch Qx1 turns on and off with switching tube Q1 simultaneously, Thus in holding capacitor Cx1, obtain trapezoidal identical with the primary current peak envelope of T of an amplitude Ripple becomes.The control signal of switch Qx2 is the pulse after Vg inverted device Ux1 negates, switch The control signal of Qx3 is Vg, by turning on and off in amplifier of switch Qx2 and switch Qx3 The positive input terminal of Ux2 obtains that an amplitude is identical with the primary current peak envelope of T, pulsewidth approximation with The square wave that transformer secondary diode D1 time of afterflow is equal, through following that amplifier Ux2 is constituted Device is identical with the positive input terminal waveform of amplifier Ux2 in the first end acquisition of resistance Rx1 after following Square wave, this square wave after the low pass filter filtering that Rx1 and electric capacity Cx2 are constituted at electric capacity Cx2 obtains the half-sinusoid signal Vs that a meansigma methods is proportional to output load current.

Figure 12 is the constant current control method flow chart according to this utility model embodiment.

In step S01, obtain meansigma methods and output current in proportion relation, frequency from main circuit The half-sinusoid signal consistent with the output signal of main circuit rectifier bridge with phase place.

In step S02, utilize the fixed cycle, step one is obtained by the pulse signal of fixed duty cycle The half-sinusoid signal obtained adds up, and resets cumulative signal in the lowest point of half-sinusoid, Thus obtain a periodic cumulative signal.

In step S03, produce in half-sinusoid signal the lowest point and this half-sinusoid signal period frequency The cycle integrated signal that rate is identical.

In step S04, the benchmark of cumulative signal with setting is compared, and will therebetween Error be converted into current signal.

In step S05, cycle integrated signal is utilized to remove the current signal pair that rate-determining steps four produces One small capacitances is integrated, it is thus achieved that regulation signal.

In step S06, regulation signal is delivered to PFC drive circuit and produces main circuit switch pipe Drive signal.

Although it will be appreciated by those skilled in the art that this utility model is with two kinds of Buck types PFC Power circuit and a kind of flyback PFC power circuit are specific embodiment, but perseverance of the present utility model Flow control circuit can also control device with other power circuits as constituted high power factor constant current.This Outward, it will be appreciated by those skilled in the art that PFC drive circuit 208 can be different types of merit Rate factor correcting drive circuit, including sampled peak electric current realize critical conduction control power because of The PFC control circuit or continuous that number correction drive circuit, discontinuous current mode (DCM) control The power factor drive circuit that pattern (CCM) controls.

It should be noted that, in this article, the relational terms of such as first and second or the like is only It is used for separating an entity or operation with another entity or operating space, and not necessarily requires Or imply relation or the order that there is any this reality between these entities or operation.And, Term " includes ", " comprising " or its any other variant are intended to comprising of nonexcludability, So that include that the process of a series of key element, method, article or equipment not only include that those are wanted Element, but also include other key elements being not expressly set out, or also include for this process, The key element that method, article or equipment are intrinsic.In the case of there is no more restriction, by statement The key element that " including one ... " limits, it is not excluded that include the process of described key element, method, Article or equipment there is also other identical element.

According to embodiment of the present utility model as described above, these embodiments do not have detailed descriptionthe All of details, is also not intended to the specific embodiment that this utility model is only described.Obviously, according to Above description, can make many modifications and variations.This specification is chosen and is specifically described these and implements Example, is to preferably explain principle of the present utility model and actual application, so that affiliated technology Skilled person can utilize this utility model and the amendment on the basis of this utility model well Use.This utility model is only limited by claims and four corner thereof and equivalent.

Claims (19)

1. a constant-current control circuit, it is characterised in that including:

Current sample module, described current sample module receives the current sampling signal of main power circuit, Produce the half-sinusoid signal of reflection output size of current；

Stepping integral compensation network, described stepping integral compensation network is with described current sample module even Connect, and produce compensation signal；

PFC drive circuit, described PFC drive circuit is connected with described stepping integral compensation network, And the current over-zero detection signal according to described compensation signal and described main power circuit, produces The driving signal of described main power circuit switching tube,

Wherein, described stepping integral compensation network receives described half-sinusoid signal, to described sine Half-wave voltage signal adds up, and at the lowest point of described half-sinusoid signal or described current sample The lowest point of signal resets, thus obtains a periodic cumulative signal, and by described tired Plus signal is compared with reference voltage, thus produces described compensation signal.

Constant-current control circuit the most according to claim 1, it is characterised in that described electric current is adopted Original mold block is low pass filter, for being filtered the current sampling signal of described main power circuit.

Constant-current control circuit the most according to claim 2, it is characterised in that described electric current is adopted Original mold block includes the first resistance and the first electric capacity, and the first end of described first resistance receives described electric current Sampled signal, the second end of described first resistance connects the first end of described first electric capacity, and described the Second end ground connection of one electric capacity, the first end of described first electric capacity provides described half-sinusoid signal, Described half-sinusoid signal is current average envelope.

Constant-current control circuit the most according to claim 1, it is characterised in that described electric current is adopted Original mold block is peak point current sample circuit, for obtaining the peak value of the electric current of described main power circuit.

Constant-current control circuit the most according to claim 4, it is characterised in that described electric current is adopted Original mold block includes the first resistance, the first electric capacity and the first switch, the first termination of described first resistance Receiving described current sampling signal, the second end of described first resistance connects the first of described first switch End, the first end of described first electric capacity connects the second end of described first switch, described first electric capacity The second end ground connection, described first electric capacity first end provide described half-sinusoid signal,

Wherein, described first switch turns near the peak value of described current sampling signal, thus obtains Obtain current peak envelope.

Constant-current control circuit the most according to claim 1, it is characterised in that described electric current is adopted Original mold block is output electric current estimation circuit, for obtaining the half-sinusoid letter of reflection output size of current Number.

Constant-current control circuit the most according to claim 6, it is characterised in that described electric current is adopted Original mold block include the first switch, second switch, the 3rd switch, the first electric capacity, the second electric capacity, One resistance, amplifier and phase inverter.First end of described first switch receives described current sampling signal, Second end of described first switch is connected to the first end of described first electric capacity, described first electric capacity C1 The second end ground connection, described first electric capacity first end connect described second switch the first end, institute The second end stating second switch connects the first end and the positive input of described amplifier of described 3rd switch End, the second end ground connection of described 3rd switch, the negative input end of described amplifier is connected with its outfan, The outfan of described amplifier connects the first end of described first resistance, the second end of described first resistance Connect the first end of described second electric capacity, the second end ground connection of described second electric capacity, described second electric capacity First end provide half-sinusoid signal Vs.

Wherein, described first switch and the described 3rd control signal switched and described master power switch The driving signal of pipe is identical, and the control signal of described second switch is driven by described master power switch pipe Dynamic signal obtains through described phase inverter.

Constant-current control circuit the most according to claim 1, it is characterised in that described stepping is amassed Compensation network is divided to include:

Cumulative signal generation module, described cumulative signal generation module produces fixed frequency, fixing accounts for The cumulative control signal of empty ratio；

The lowest point detection module, described the lowest point detection module receives described half-sinusoid signal, and sentences Whether disconnected described half-sinusoid signal or described current sampling signal are in the lowest point, and described the lowest point is examined Survey sequence of modules and produce cumulative output sampled signal, cumulative reset signal and cycle integrated signal；

Accumulator module, described accumulator module and described cumulative signal generation module and the detection of described the lowest point Module connects, and receives described half-sinusoid signal, described cumulative control signal and described cumulative Reset signal, under the control of described cumulative control signal, described accumulator module is to described sine half Ripple signal carries out cumulative to obtain described cumulative signal, and in described cumulative output reset signal Control periodically described cumulative signal to be resetted；

Cumulative output sampling module, described cumulative output sampling module and described the lowest point detection module and Described accumulator module connects, and receives described cumulative signal and described cumulative output sampled signal, Under the control of described cumulative output sampled signal, periodically sample and preserve described cumulative signal Peak value；

Error amplification module, described error amplification module is connected with described cumulative output sampling module, And output signal and the described error amplification module inner setting to described cumulative output sampling module Reference voltage compare, and be converted into the current signal of amplification；

Cycle integrated module, described cycle integrated module and described error amplification module and described the lowest point Detection module connects, and receives described current signal, under the control of described cycle integrated signal, The output signal of described error amplification module is integrated, produces described compensation signal.

Constant-current control circuit the most according to claim 8, it is characterised in that described the lowest point is examined Survey module includes:

First reference voltage source, described first reference voltage source produces the first reference voltage；

5th ratio follow circuit, the first end of described 5th ratio follow circuit receives described sine Half-wave voltage signal；

First comparator, the inverting input of described first comparator connects described 5th ratio and follows Second end of circuit, in-phase input end connects described first reference voltage source；And

Signal generating circuit, the first end of described signal generating circuit connects described first comparator Outfan, the second end connects described cumulative output sampling module, accumulator module described in three-terminal link, 4th end connects described cycle integrated module,

Wherein, the upper of the output signal of described first comparator is detected when described signal generating circuit Rise along time, determine that described half-sinusoid signal is in the lowest point, described signal generating circuit postpone pre- After determining delay time, it is sequentially generated described accumulator output sampled signal, the output of described accumulator Reset signal and described integration period signal, and respectively described signal generating circuit second to 4th end provides described accumulator output sampled signal, described accumulator output reset signal and described Integration period signal.

Constant-current control circuit the most according to claim 8, it is characterised in that described cumulative Module includes:

Second to the 5th resistance；

3rd to the 6th switch；

Second and the 3rd electric capacity；

First to the 3rd ratio follow circuit；And

Operational amplifier,

Wherein, the first end of described first ratio follow circuit receives described half-sinusoid signal, the Two ends connect the first end of described second resistance；

The in-phase input end of described operational amplifier connects the second end of described second resistance, anti-phase defeated Enter and hold the first end connecting described 3rd resistance, the second end ground connection of described 3rd resistance,

First end of described 4th resistance connects the inverting input of described operational amplifier, and described the Second end of four resistance connects the outfan of described operational amplifier,

First end of described 3rd switch connects the outfan of described operational amplifier, and the described 3rd opens The second end closed connects the first end of the second electric capacity, the second end ground connection of described second electric capacity,

Described 5th switch is in parallel with the second electric capacity, for resetting the electric charge of the second electric capacity,

First end of described second ratio follow circuit connects the first end of the 3rd electric capacity, the second ratio Second end of follow circuit connects the first end of the 5th resistance, and the first end of the first resistance connects described The in-phase input end of operational amplifier,

First end of described 3rd ratio follow circuit connects the first end of described second electric capacity, described Second end of the 3rd ratio follow circuit connects the first end of the 4th switch,

Second end of the first end connection the 4th switch of the 3rd electric capacity, the second end ground connection of the 3rd electric capacity,

6th switch is in parallel with the 3rd electric capacity, for resetting the electric charge of the 3rd electric capacity,

Wherein, under the control of described cumulative control signal, described 3rd switch and the described 4th is opened Close complementation conducting, under the control of described accumulator output reset signal, described 5th switch and institute State the 6th switch to be reset by the electric charge on the second electric capacity and the 3rd electric capacity at every half power frequency period.

11. constant-current control circuits according to claim 8, it is characterised in that described cumulative Output sampling module includes:

4th ratio follow circuit；

8th switch；And

4th electric capacity,

Wherein, the first end of described 4th ratio follow circuit is connected to the output of described accumulator module End, the second end of described 4th ratio follow circuit is connected to the first end of described 8th switch,

First end of described 4th electric capacity is connected to the second end of described 8th switch, described 4th electricity The the second end ground connection held,

Wherein, the described 8th switchs under the control of described accumulator output sampled signal, every half Power frequency period turns on once, thus obtains the every of described accumulator module output on described 4th electric capacity The accumulated value of half power frequency period, as described cumulative signal.

12. constant-current control circuits according to claim 8, it is characterised in that described error Amplification module includes:

Operational transconductance amplifier；And

Second reference voltage source, described second reference voltage source produces the second reference voltage,

Wherein, the inverting input of described operational transconductance amplifier connects described cumulative output sampling mould The outfan of block, to receive described cumulative signal, the in-phase input end of described operational transconductance amplifier Connect the second reference voltage source, to receive described second reference voltage,

The positive pole of described operational transconductance amplifier flows out or flows into correspondingly sized with described cumulative signal Electric current, as the current signal of described amplification, the minus earth of described operational transconductance amplifier.

13. constant-current control circuits according to claim 8, it is characterised in that described cycle Integration module includes:

7th switch；And

5th electric capacity,

Wherein, the first end of described 7th switch connects the outfan of described error amplification module, with Receiving described current signal, the second end of described 7th switch connects the first end of the 5th electric capacity, institute State the second end ground connection of the 5th electric capacity,

Wherein, described 7th switch is under the control of described integration period signal, and conducting is long-pending with described Divide the scheduled time that periodic signal is corresponding, thus on described 5th electric capacity, obtain described compensation believe Number.

14. constant-current control circuits according to claim 8, it is characterised in that described PFC Drive circuit includes:

Current over-zero testing circuit；

Rest-set flip-flop；

Saw-tooth wave generating circuit；And

Second comparator,

Wherein, described current over-zero testing circuit includes:

6th resistance, the first end of described 6th resistance is connected to main power circuit to receive zero passage Detection signal；

7th resistance, the first end of described 7th resistance connects the second end of described 6th resistance, Second end ground connection of described 7th resistance；And

3rd comparator, the negative input end of described 3rd comparator connects the of described 6th resistance Two ends, the positive input terminal of described 3rd comparator receives the 3rd reference resistance, and the described 3rd compares The outfan of device connects the set end of described rest-set flip-flop,

Wherein, described saw-tooth wave generating circuit includes:

First current source；

6th electric capacity；

9th switch；And

First phase inverter,

Wherein, the input of described first phase inverter receives described driving signal, described first anti- The outfan of phase device connects the control end of described 9th switch,

The positive input terminal of the first described second comparator of termination of described 6th electric capacity, the described 6th Second end ground connection of electric capacity,

The negative input end of described second comparator receives described compensation signal,

Wherein, it is being between low period when described driving signal, described 9th switch conduction, institute The both end voltage stating the 6th electric capacity remains zero；It is between high period at described driving signal, institute Stating the 9th to cut-off out, described constant-current source gives described 6th electric capacity charging, the of described 6th electric capacity One end level is linearly increasing,

In multiple cycles of described driving signal, the voltage signal at described 6th electric capacity two ends is One sawtooth signal, and, when the peak value of described sawtooth signal is equal to the level compensating signal Time, the output level of described second comparator is high level from low level upset,

The outfan of described second comparator connects the reset terminal R of rest-set flip-flop.

15. constant-current control circuits according to claim 14, it is characterised in that described RS Output signal Q of trigger is as described driving signal.

16. constant-current control circuits according to claim 14, it is characterised in that described PFC Drive circuit also includes peak value sampling signal generating circuit, described peak value sampling signal generating circuit bag Include:

Time delay module；

Second phase inverter；

With door；And

Or door,

Wherein, described rest-set flip-flop output signal Q connect described time delay module input, The input of described second phase inverter and the described or first input end of door,

Second input of described or door terminates the outfan of described time delay module, described or door defeated Go out signal as described driving signal,

The outfan of described time delay module connects the described first input end with door, described second anti- The outfan of phase device connects described the second input with door,

The described output signal with door, as control signal, is used for controlling described current sample module Carry out peak point current sampling.

17. according to the constant-current control circuit described in claim 14 or 16, it is characterised in that institute Stating main power circuit and include transformator, described zero cross detection circuit is by the auxiliary to described transformator The zero crossing of voltage signal of the Same Name of Ends output of winding detects, it is judged that transformer primary side around The zero crossing of group electric current.

18. 1 kinds of constant-current drive circuits, it is characterised in that including:

Main power circuit；And

According to the constant-current control circuit according to any one of claim 1 to 15,

Wherein, described main power circuit includes:

Power switch pipe, described power switch pipe leads on-off under the control of described driving signal Open；And

Transformator, the primary side winding of described transformator is connected in series with described power switch pipe, institute Wherein, during the conducting of described power switch pipe, external power source is former to described transformator The charging of limit winding, during the disconnection of described power switch pipe, the primary side winding of described transformator to Load supplying, the vice-side winding of described transformator provides zero passage detection signal.

19. constant-current drive circuits according to claim 18, wherein, described main power circuit Can be on the spot type Buck power circuit, conventional virtual earth type Buck power circuit, flyback power circuit, Any one in Buck-boost type power circuit, Boost type power circuit circuit.