CN205563400U - Novel machine case structure - Google Patents

Novel machine case structure Download PDF

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Publication number
CN205563400U
CN205563400U CN201620266202.5U CN201620266202U CN205563400U CN 205563400 U CN205563400 U CN 205563400U CN 201620266202 U CN201620266202 U CN 201620266202U CN 205563400 U CN205563400 U CN 205563400U
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CN
China
Prior art keywords
interface
xilinx fpga
computer
casing
hard disk
Prior art date
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Active
Application number
CN201620266202.5U
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Chinese (zh)
Inventor
黄立滨
周鹏鹏
王伟
关红兵
林雪华
袁艺
胡云
傅润炜
李志勇
庄良文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XUCHANG KETOP TESTING RESEARCH INSTITUTE Co.,Ltd.
Research Institute of Southern Power Grid Co Ltd
Original Assignee
XUCHANG KETOP DETECTION TECHNOLOGY Co Ltd
Power Grid Technology Research Center of China Southern Power Grid Co Ltd
Research Institute of Southern Power Grid Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by XUCHANG KETOP DETECTION TECHNOLOGY Co Ltd, Power Grid Technology Research Center of China Southern Power Grid Co Ltd, Research Institute of Southern Power Grid Co Ltd filed Critical XUCHANG KETOP DETECTION TECHNOLOGY Co Ltd
Priority to CN201620266202.5U priority Critical patent/CN205563400U/en
Application granted granted Critical
Publication of CN205563400U publication Critical patent/CN205563400U/en
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Abstract

The utility model discloses a novel machine case structure, including the box, and set up in the box and install computer motherboard, xilinx FPGA integrated circuit board, quick -witted case power and the hard disk on the coplanar, the xilinxFPGA integrated circuit board sets up in the right back side of box, and near its backplate of box, machine case power is installed in the right back side of box, and near its backplate of box, computer motherboard and hard disk are installed in the box anteriorly respectively. The utility model discloses a novel machine case structure adopts computer motherboard and xilinx FPGA integrated circuit board to install side by side, reduces quick -witted case height, when reducing totality screen cabinet installation space and require, saves quick -witted case power, through equitable xilinx FPGA integrated circuit board put with high design to complete development of xilinx FPGA and the operating environment of 2U machine case installation.

Description

A kind of Novel chassis structure
Technical field
This utility model relates to a kind of cabinet, particularly relates to a kind of Novel chassis structure, belongs to chassis design technical field.
Background technology
At present, the FPGA developing operation environment built by microcomputer and Xilinx FPGA board can be carried out by following two mode: mode 1: be directly inserted on the PCIE groove of microcomputer by Xilinx FPGA board, it is desirable to cabinet height is at least 4U;Mode 2: Xilinx FPGA board and microcomputer are separately mounted in two cabinets, two cabinets the most at least need 2U height;The hardware environment of the establishment of above two mode is desirable that the screen cabinet installing space of 4U height;For mode 1, owing to Xilinx FPGA motherboard mounting heights is 125mm, and owing to optical interface is on board top, need to increase extra 40mm height, therefore use this mode to can be only installed in the cabinet of 4U height;For mode 2, being affected by radiator fan requirement, two cabinets at microcomputer and FPGA board place are required to 2U height, and adding up to is equally 4U height, and two cabinets are required to power supply support, and relative and mode 1 also needs to extra power supply support.
Summary of the invention
Thering is provided a kind of Novel chassis structure in place of the purpose of this utility model is to avoid the deficiencies in the prior art, it is put by rational Xilinx FPGA board and height design, installs complete Xilinx FPGA exploitation and running environment with 2U cabinet;While reducing overall screen cabinet installing space, save chassis power supply.
The purpose of this utility model is realized by following technological means: Novel chassis structure of the present utility model, including casing, and in being arranged at casing and install computer motherboard, Xilinx FPGA board, chassis power supply and hard disk at grade;Described Xilinx FPGA board is arranged at casing right lateral side, and against its backplate of casing;Described chassis power supply is installed on casing right lateral side, and against its backplate of casing;It is anterior that described computer motherboard and hard disk are respectively arranged in casing, makes full use of chassis space, installs complete Xilinx FPGA exploitation and running environment with a standard 2U cabinet (1U=44.45mm), saves screen cabinet installing space;
On rear side of described Xilinx FPGA board, Xilinx FPGA optical fiber interface is installed;Described Xilinx FPGA board side is provided with Xilinx FPGA network interface and Xilinx FPGA debugging interface;
Described computer motherboard side is respectively arranged with computer data network interface and computer debugging network interface;
Optical fiber interface, computer debugging network converting interface and power interface is offered on its backplate of described casing;Described computer debugging network converting interface is arranged between optical fiber interface and power interface.
Described computer motherboard is installed on front side of Xilinx FPGA board.
Described hard disk is installed on front side of chassis power supply.
Its outfan of described chassis power supply electrically connects with computer motherboard, Xilinx FPGA board and hard disk respectively;Its input of described chassis power supply is electrically connected with civil power through cable by power interface.
Described hard disk, by hard disc data line and computer motherboard communication, provides memory space for computer motherboard.
Described Xilinx FPGA network interface is electrically connected by short netting twine with computer data network interface, sets up microcomputer and the data communication of Xilinx FPGA.
Described Xilinx FPGA optical fiber interface is electrically connected to optical fiber interface by short fiber, and through short fiber, Xilinx FPGA fiber data is connected to optical fiber interface by Xilinx FPGA optical fiber interface.
Described computer debugging network interface is electrically connected to computer debugging network converting interface by short netting twine.
Novel chassis structure of the present utility model, computer motherboard is used to be mounted side by side with Xilinx FPGA board, reduce cabinet height, while reducing overall screen cabinet requirements of installation space, save chassis power supply, put by rational Xilinx FPGA board and height design, with 2U cabinet, complete Xilinx FPGA exploitation and running environment are installed.
Accompanying drawing explanation
Utilize accompanying drawing that this utility model is further described, but the content in accompanying drawing is not constituted any restriction of the present utility model.
Fig. 1 is this utility model integral installation structural representation.
Fig. 2 is this utility model back plate structure schematic diagram.
In fig. 1 and 2, including:
Casing 001
Backplate 002
Xilinx FPGA board 100
Xilinx FPGA optical fiber interface 101
Xilinx FPGA network interface 102
Xilinx FPGA debugging interface 103
Computer motherboard 200
Computer data network interface 201
Computer debugging network interface 202
Chassis power supply 300
Hard disk 400
Optical fiber interface 600
Computer debugging network converting interface 800
Power interface 900.
Detailed description of the invention
The utility model is described in further detail with the following Examples.
Embodiment 1
The present embodiment provides a kind of Novel chassis structure, as depicted in figs. 1 and 2, including casing 001, and in being arranged at casing 001 and install computer motherboard 200, Xilinx FPGA board 100, chassis power supply 300 and hard disk 400 at grade;Described Xilinx FPGA board 100 is arranged at casing 001 right lateral side, and against its backplate 002 of casing 001;Described chassis power supply 300 is installed on casing 001 right lateral side, and against its backplate 002 of casing 001;It is anterior that described computer motherboard 200 and hard disk 400 are respectively arranged in casing 001, makes full use of chassis space, installs complete Xilinx FPGA exploitation and running environment with a standard 2U cabinet (1U=44.45mm), saves screen cabinet installing space;On rear side of described Xilinx FPGA board 100, Xilinx FPGA optical fiber interface 101 is installed;Described Xilinx FPGA board 100 side is provided with Xilinx FPGA network interface 102 and Xilinx FPGA debugging interface 103;Described computer motherboard 200 side is respectively arranged with computer data network interface 201 and computer debugging network interface 202;Optical fiber interface 600, computer debugging network converting interface 800 and power interface 900 is offered on its backplate 002 of described casing 001;Described computer debugging network converting interface 800 is arranged between optical fiber interface 600 and power interface 900;Described computer motherboard 200 is installed on front side of Xilinx FPGA board 100;Described hard disk 400 is installed on front side of chassis power supply 300.
In another embodiment, described its outfan of chassis power supply 300 electrically connects with computer motherboard 200, Xilinx FPGA board 100 and hard disk 400 respectively;Described its input of chassis power supply 300 is electrically connected with civil power through cable by power interface 900.
In another embodiment, described hard disk 400, by hard disc data line and computer motherboard 200 communication, provides memory space for computer motherboard 200.
In another embodiment, described Xilinx FPGA network interface 102 is electrically connected by short netting twine with computer data network interface 201, sets up microcomputer and the data communication of Xilinx FPGA.
In another embodiment, described Xilinx FPGA optical fiber interface 101 is electrically connected to optical fiber interface 600 by short fiber, and through short fiber, Xilinx FPGA fiber data is connected to optical fiber interface 600 by Xilinx FPGA optical fiber interface 101.
In another embodiment, described computer debugging network interface 202 is electrically connected to computer debugging network converting interface 800 by short netting twine.
Finally should be noted that; above example is only in order to illustrate the technical solution of the utility model rather than restriction to this utility model protection domain; although this utility model being explained in detail with reference to preferred embodiment; it will be understood by those within the art that; the technical solution of the utility model can be modified or equivalent, without deviating from the spirit and scope of technical solutions of the utility model.

Claims (8)

1. a Novel chassis structure, it is characterised in that: include casing, and in being arranged at casing and computer motherboard, Xilinx FPGA board, chassis power supply and hard disk at grade is installed;Described Xilinx FPGA board is arranged at casing right lateral side, and against its backplate of casing;Described chassis power supply is installed on casing right lateral side, and against its backplate of casing;It is anterior that described computer motherboard and hard disk are respectively arranged in casing;On rear side of described Xilinx FPGA board, Xilinx FPGA optical fiber interface is installed;Described Xilinx FPGA board side is provided with Xilinx FPGA network interface and Xilinx FPGA debugging interface;Described computer motherboard side is respectively arranged with computer data network interface and computer debugging network interface;Optical fiber interface, computer debugging network converting interface and power interface is offered on its backplate of described casing;Described computer debugging network converting interface is arranged between optical fiber interface and power interface.
Novel chassis structure the most according to claim 1, it is characterised in that: described computer motherboard is installed on front side of Xilinx FPGA board.
Novel chassis structure the most according to claim 1, it is characterised in that: described hard disk is installed on front side of chassis power supply.
Novel chassis structure the most according to claim 1, it is characterised in that: its outfan of described chassis power supply electrically connects with computer motherboard, Xilinx FPGA board and hard disk respectively;Its input of described chassis power supply is electrically connected with civil power through cable by power interface.
Novel chassis structure the most according to claim 1, it is characterised in that: described hard disk is by hard disc data line and computer motherboard communication.
Novel chassis structure the most according to claim 1, it is characterised in that: described Xilinx FPGA network interface is electrically connected by short netting twine with computer data network interface.
Novel chassis structure the most according to claim 1, it is characterised in that: described Xilinx FPGA optical fiber interface is electrically connected to optical fiber interface by short fiber.
Novel chassis structure the most according to claim 1, it is characterised in that: described computer debugging network interface is electrically connected to computer debugging network converting interface by short netting twine.
CN201620266202.5U 2016-04-04 2016-04-04 Novel machine case structure Active CN205563400U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620266202.5U CN205563400U (en) 2016-04-04 2016-04-04 Novel machine case structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620266202.5U CN205563400U (en) 2016-04-04 2016-04-04 Novel machine case structure

Publications (1)

Publication Number Publication Date
CN205563400U true CN205563400U (en) 2016-09-07

Family

ID=56813427

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620266202.5U Active CN205563400U (en) 2016-04-04 2016-04-04 Novel machine case structure

Country Status (1)

Country Link
CN (1) CN205563400U (en)

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: Guangzhou City, Guangdong province Yuexiu District 510080 Dongfeng East Road, No. 8, 6 water Kong Guangdong West Building 13-20 layer

Co-patentee after: Xuchang general testing & Research Institute Limited by Share Ltd

Patentee after: Power Grid Technique Research Center of China Southern Power Grid Co., Ltd.

Co-patentee after: Research Institute of Southern Power Grid Co., Ltd.

Address before: Guangzhou City, Guangdong province Yuexiu District 510080 Dongfeng East Road, No. 8, 6 water Kong Guangdong West Building 13-20 layer

Co-patentee before: XUCHANG KETOP DETECTION TECHNOLOGY CO., LTD.

Patentee before: Power Grid Technique Research Center of China Southern Power Grid Co., Ltd.

Co-patentee before: Research Institute of Southern Power Grid Co., Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210813

Address after: 510663 3 building, 3, 4, 5 and J1 building, 11 building, No. 11, Ke Xiang Road, Luogang District Science City, Guangzhou, Guangdong.

Patentee after: China Southern Power Grid Research Institute Co.,Ltd.

Patentee after: XUCHANG KETOP TESTING RESEARCH INSTITUTE Co.,Ltd.

Address before: 510080 floors 13-20, West Tower, Yuedian building, No. 6 and 8, shuijungang, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong

Patentee before: CSG POWER GRID TECHNOLOGY RESEARCH CENTER

Patentee before: XUCHANG KETOP TESTING RESEARCH INSTITUTE Co.,Ltd.

Patentee before: China Southern Power Grid Research Institute Co.,Ltd.