CN205485846U - a chassis structure - Google Patents
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- CN205485846U CN205485846U CN201620266203.XU CN201620266203U CN205485846U CN 205485846 U CN205485846 U CN 205485846U CN 201620266203 U CN201620266203 U CN 201620266203U CN 205485846 U CN205485846 U CN 205485846U
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Abstract
Description
技术领域 technical field
本实用新型涉及一种机箱,特别是涉及一种机箱结构,属于机箱设计技术领域。 The utility model relates to a cabinet, in particular to a cabinet structure, which belongs to the technical field of cabinet design.
背景技术 Background technique
目前,通过微型计算机和Xilinx FPGA板卡构建的FPGA开发运行环境可以通过以下两种方式进行:方式1:将Xilinx FPGA板卡直接插在微型计算机的PCIE槽上,要求机箱高度至少为4U;方式2:将Xilinx FPGA板卡和微型计算机分别安装在两个机箱内,两个机箱均至少需要2U高度;上述两种方式的组建的硬件环境都要求4U高度的屏柜安装空间;对于方式1,由于Xilinx FPGA主板安装高度为125mm,且由于光接口在板卡上部,需要增加额外40mm高度,因此采用此方式只能安装在4U高度的机箱内;对于方式2,受散热风扇要求影响,微型计算机和FPGA板卡所在的两个机箱均需要2U高度,合计一样是4U高度,且两个机箱均需要电源支持,相对与方式1还需要额外的电源支持。 At present, the FPGA development and operation environment built by microcomputers and Xilinx FPGA boards can be implemented in the following two ways: Method 1: Insert the Xilinx FPGA board directly into the PCIE slot of the microcomputer, requiring a chassis height of at least 4U; 2: Install the Xilinx FPGA board and the microcomputer in two chassis respectively, and the two chassis need at least 2U height; the hardware environment formed by the above two methods requires a 4U height screen cabinet installation space; for method 1, Since the installation height of the Xilinx FPGA motherboard is 125mm, and because the optical interface is on the upper part of the board, an additional 40mm height needs to be added, so this method can only be installed in a 4U chassis; for method 2, affected by the requirements of the cooling fan, the microcomputer The two chassis where the FPGA board is located both need a height of 2U, the total height is the same as 4U, and both chassis need power support, compared with method 1, additional power support is required.
发明内容 Contents of the invention
本实用新型的目的在于避免现有技术的不足之处而提供一种机箱结构,其降低了机箱高度,以2U机箱安装完整的Xilinx FPGA开发和运行环境;且在减小总体屏柜安装空间的同时,节省机箱电源。 The purpose of this utility model is to avoid the deficiencies of the prior art and provide a kind of chassis structure, and it has reduced the chassis height, installs complete Xilinx FPGA development and operating environment with 2U chassis; And in reducing overall screen cabinet installation space At the same time, save chassis power.
本实用新型的目的通过如下技术手段实现:本实用新型的机箱结构,包括箱体,及设置于箱体内且安装在同一平面上的微型计算机主板、Xilinx FPGA板卡、机箱电源和硬盘;所述微型计算机主板安装于箱体右后侧,且紧靠箱体其背面板;所述Xilinx FPGA板卡设置于箱体左后侧,且紧靠箱体其背面板;所述机箱电源和硬盘分别安装于箱体前部,充分利用机箱空间,以一个标准2U机箱(1U=44.45mm)安装完整的Xilinx FPGA开发和运行环境,节省屏柜安装空间; The purpose of the utility model is realized by following technical means: the cabinet structure of the utility model comprises a casing, and is arranged in the casing and is installed on the microcomputer mainboard, Xilinx FPGA board, cabinet power supply and hard disk on the same plane; The microcomputer motherboard is installed on the right rear side of the cabinet, and is close to the back panel of the cabinet; the Xilinx FPGA board is arranged on the left rear side of the cabinet, and is close to the back panel of the cabinet; the power supply and the hard disk of the cabinet are respectively Installed in the front of the box, make full use of the box space, install a complete Xilinx FPGA development and operating environment in a standard 2U box (1U=44.45mm), save the installation space of the screen cabinet;
所述微型计算机主板后侧分别设置有计算机数据网络接口和计算机调试网络接口; The rear side of the mainboard of the microcomputer is respectively provided with a computer data network interface and a computer debugging network interface;
所述Xilinx FPGA板卡后侧分别设置有Xilinx FPGA网络接口和Xilinx FPGA调试接口;所述Xilinx FPGA板卡右后侧安装有Xilinx FPGA光纤接口; The Xilinx FPGA board rear side is respectively provided with a Xilinx FPGA network interface and a Xilinx FPGA debugging interface; the Xilinx FPGA board card rear right side is equipped with a Xilinx FPGA optical fiber interface;
所述箱体其背面板上开设有主板接口开槽、光纤转接口、Xilinx FPGA板卡开口和电源接口;所述主板接口开槽和Xilinx FPGA板卡开口分别设置于背面板两侧;所述光纤转接口开设于主板接口开槽和Xilinx FPGA板卡开口之间;所述电源接口设置于Xilinx FPGA板卡开口上方; Its back panel of the box body is provided with main board interface slotting, optical fiber transfer interface, Xilinx FPGA board card opening and power supply interface; Described main board interface slotting and Xilinx FPGA board card opening are respectively arranged on the back panel both sides; The optical fiber conversion interface is provided between the main board interface slot and the opening of the Xilinx FPGA board; the power interface is arranged above the opening of the Xilinx FPGA board;
所述Xilinx FPGA板卡其安装支柱高度高于微型计算机主板其安装支柱高度。 The installation pillar height of the Xilinx FPGA board card is higher than the installation pillar height of the microcomputer motherboard.
所述机箱电源设置于微型计算机主板前侧。 The chassis power supply is arranged on the front side of the main board of the microcomputer.
所述硬盘安装于Xilinx FPGA板卡前侧。 The hard disk is installed on the front side of the Xilinx FPGA board.
所述机箱电源其输出端分别与微型计算机主板、Xilinx FPGA板卡和硬盘电连接;所述机箱电源其输入端通过电源接口经电缆与市电电连接。 Its output end of described chassis power supply is electrically connected with microcomputer main board, Xilinx FPGA board card and hard disk respectively; Its input end of described chassis power supply is electrically connected with mains through cable through power supply interface.
所述硬盘通过硬盘数据线与微型计算机主板通讯,为微型计算机主板提供存储空间。 The hard disk communicates with the mainboard of the microcomputer through the data line of the hard disk to provide storage space for the mainboard of the microcomputer.
所述Xilinx FPGA网络接口与计算机数据网络接口通过短网线电连接,建立微型计算机和Xilinx FPGA的数据通讯。 The Xilinx FPGA network interface is electrically connected with the computer data network interface through a short network cable to establish data communication between the microcomputer and the Xilinx FPGA.
所述Xilinx FPGA光纤接口通过短光纤电连接至光纤转换口,将Xilinx FPGA光纤数据通过Xilinx FPGA光纤接口经短光纤连接到光纤转换口。 The Xilinx FPGA optical fiber interface is electrically connected to the optical fiber conversion port through a short optical fiber, and the Xilinx FPGA optical fiber data is connected to the optical fiber conversion port through the Xilinx FPGA optical fiber interface through the short optical fiber.
所述Xilinx FPGA板卡其安装支柱较微型计算机主板其安装支柱高10ms,为光纤接入Xilinx FPGA光纤接口提供空间。 The installation pillar of the Xilinx FPGA board is 10ms higher than the installation pillar of the microcomputer main board, providing space for the optical fiber to connect to the Xilinx FPGA optical fiber interface.
本实用新型的机箱结构,采用微型计算机主板与Xilinx FPGA板卡并排安装,降低机箱高度,以2U机箱安装完整的Xilinx FPGA开发和运行环境;且将微型计算机主板与Xilinx FPGA板卡安装于同一机箱内,在减小总体屏柜安装空间要求的同时,节省机箱电源。 The chassis structure of the present utility model adopts the microcomputer motherboard and the Xilinx FPGA board to be installed side by side, reduces the height of the chassis, and installs a complete Xilinx FPGA development and operating environment with a 2U chassis; and the microcomputer motherboard and the Xilinx FPGA board are installed in the same chassis Inside, while reducing the installation space requirements of the overall screen cabinet, it also saves the power of the chassis.
附图说明 Description of drawings
利用附图对本实用新型作进一步的说明,但附图中的内容不构成对本实用新型的任何限制。 Utilize accompanying drawing to further illustrate the utility model, but the content in the accompanying drawing does not constitute any limitation to the utility model.
图1是本实用新型整体安装结构示意图。 Fig. 1 is a schematic diagram of the overall installation structure of the utility model.
图2是本实用新型背面板结构示意图。 Fig. 2 is a schematic diagram of the structure of the back panel of the utility model.
图3是本实用新型Xilinx FPGA板卡和微型计算机主板的纵向位置关系示意图。 Fig. 3 is a schematic diagram of the longitudinal positional relationship between the Xilinx FPGA board and the microcomputer mainboard of the utility model.
在图1至图3中,包括: In Figures 1 to 3, including:
箱体001 Box 001
背面板002 Back panel 002
Xilinx FPGA板卡100 Xilinx FPGA board 100
Xilinx FPGA光纤接口101 Xilinx FPGA Fiber Interface 101
Xilinx FPGA网络接口102 Xilinx FPGA Network Interface 102
Xilinx FPGA调试接口103 Xilinx FPGA Debug Interface 103
计算机主板200 Computer motherboard 200
计算机数据网络接口201 Computer Data Network Interface 201
计算机调试网络接口202 Computer debugging network interface 202
机箱电源300 Chassis power supply 300
硬盘400 HDD 400
安装支柱500 Install strut 500
主板接口开槽600 Motherboard interface slot 600
光纤转接口700 Fiber optic adapter 700
Xilinx FPGA板卡开口800 Xilinx FPGA board opening 800
电源接口900。 Power interface 900 .
具体实施方式 detailed description
结合以下实施例对本实用新型作进一步说明。 The utility model will be further described in conjunction with the following examples.
实施例Example 11
本实施例提供一种机箱结构,如图1至图3所示,包括箱体001,及设置于箱体001内且安装在同一平面上的微型计算机主板200、Xilinx FPGA板卡100、机箱电源300和硬盘400;所述微型计算机主板200安装于箱体001右后侧,且紧靠箱体001其背面板002;所述Xilinx FPGA板卡100设置于箱体001左后侧,且紧靠箱体001其背面板002;所述机箱电源300和硬盘400分别安装于箱体001前部,充分利用机箱空间,以一个标准2U机箱(1U=44.45mm)安装完整的Xilinx FPGA开发和运行环境,节省屏柜安装空间;所述微型计算机主板200后侧分别设置有计算机数据网络接口201和计算机调试网络接口202;所述Xilinx FPGA板卡100后侧分别设置有Xilinx FPGA网络接口102和Xilinx FPGA调试接口103;所述Xilinx FPGA板卡100右后侧安装有Xilinx FPGA光纤接口101;所述箱体001其背面板002上开设有主板接口开槽600、光纤转接口700、Xilinx FPGA板卡开口800和电源接口900;所述主板接口开槽600和Xilinx FPGA板卡开口800分别设置于背面板002两侧;所述光纤转接口700开设于主板接口开槽600和Xilinx FPGA板卡开口800之间;所述电源接口900设置于Xilinx FPGA板卡开口800上方;所述Xilinx FPGA板卡100其安装支柱500高度高于微型计算机主板200其安装支柱500高度;所述机箱电源300设置于微型计算机主板200前侧;所述硬盘400安装于Xilinx FPGA板卡100前侧。 The present embodiment provides a kind of chassis structure, as shown in Figure 1 to Figure 3, comprise casing 001, and be arranged on in casing 001 and be installed on the microcomputer motherboard 200, Xilinx FPGA board card 100, casing power supply on the same plane 300 and hard disk 400; the microcomputer motherboard 200 is installed on the right rear side of the casing 001, and is close to its back panel 002 of the casing 001; the Xilinx FPGA board 100 is arranged on the left rear side of the casing 001, and is close to the The back panel 002 of the cabinet 001; the chassis power supply 300 and the hard disk 400 are respectively installed in the front of the cabinet 001, making full use of the chassis space, and installing a complete Xilinx FPGA development and operating environment in a standard 2U chassis (1U=44.45mm) , save the installation space of the screen cabinet; the back side of the microcomputer mainboard 200 is respectively provided with a computer data network interface 201 and a computer debugging network interface 202; the back side of the Xilinx FPGA board card 100 is respectively provided with a Xilinx FPGA network interface 102 and a Xilinx FPGA Debugging interface 103; Xilinx FPGA fiber interface 101 is installed on the right rear side of the Xilinx FPGA board card 100; the back panel 002 of the box body 001 is provided with a motherboard interface slot 600, an optical fiber transfer interface 700, and a Xilinx FPGA board card opening 800 and power supply interface 900; said motherboard interface slot 600 and Xilinx FPGA board card opening 800 are respectively arranged on the back panel 002 both sides; Between; described power interface 900 is arranged on Xilinx FPGA board opening 800 tops; Its installation pillar 500 height of described Xilinx FPGA board 100 is higher than its installation pillar 500 height of microcomputer motherboard 200; Described chassis power supply 300 is arranged on microcomputer The front side of the motherboard 200; the hard disk 400 is installed on the front side of the Xilinx FPGA board 100.
再一实施例中,所述机箱电源300其输出端分别与微型计算机主板200、Xilinx FPGA板卡100和硬盘400电连接;所述机箱电源300其输入端通过电源接口900经电缆与市电电连接。 In yet another embodiment, its output end of the chassis power supply 300 is electrically connected with the microcomputer motherboard 200, the Xilinx FPGA board card 100 and the hard disk 400 respectively; connect.
再一实施例中,所述硬盘400通过硬盘数据线与微型计算机主板200通讯,为微型计算机主板200提供存储空间。 In yet another embodiment, the hard disk 400 communicates with the microcomputer motherboard 200 through a hard disk data cable to provide storage space for the microcomputer motherboard 200 .
再一实施例中,所述Xilinx FPGA网络接口102与计算机数据网络接口201通过短网线电连接,建立微型计算机和Xilinx FPGA的数据通讯。 In yet another embodiment, the Xilinx FPGA network interface 102 is electrically connected to the computer data network interface 201 through a short network cable to establish data communication between the microcomputer and the Xilinx FPGA.
再一实施例中,所述Xilinx FPGA光纤接口101通过短光纤电连接至光纤转换口700,将Xilinx FPGA光纤数据通过Xilinx FPGA光纤接口101经短光纤连接到光纤转换口700。 In yet another embodiment, the Xilinx FPGA fiber interface 101 is electrically connected to the fiber conversion port 700 through a short fiber, and the Xilinx FPGA fiber data is connected to the fiber conversion port 700 through the Xilinx FPGA fiber interface 101 through a short fiber.
再一实施例中,所述Xilinx FPGA板卡100其安装支柱500较微型计算机主板200其安装支柱500高10ms,为光纤接入Xilinx FPGA光纤接口101提供空间。 In yet another embodiment, the installation pillar 500 of the Xilinx FPGA board 100 is 10ms higher than the installation pillar 500 of the microcomputer motherboard 200, providing space for the optical fiber to insert into the Xilinx FPGA optical fiber interface 101.
最后应当说明的是,以上实施例仅用以说明本实用新型的技术方案而非对本实用新型保护范围的限制,尽管参照较佳实施例对本实用新型作了详细说明,本领域的普通技术人员应当理解,可以对本实用新型的技术方案进行修改或者等同替换,而不脱离本实用新型技术方案的实质和范围。 Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present utility model rather than limiting the protection scope of the present utility model. Although the utility model has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should It is understood that the technical solution of the utility model can be modified or equivalently replaced without departing from the spirit and scope of the technical solution of the utility model.
Claims (8)
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106919482A (en) * | 2016-12-19 | 2017-07-04 | 天津市品通电力科技有限公司 | A kind of debugging apparatus for the debugging of DSP mainboards |
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- 2016-04-04 CN CN201620266203.XU patent/CN205485846U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106919482A (en) * | 2016-12-19 | 2017-07-04 | 天津市品通电力科技有限公司 | A kind of debugging apparatus for the debugging of DSP mainboards |
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Address after: Guangzhou City, Guangdong province Yuexiu District 510080 Dongfeng East Road, No. 8, 6 water Kong Guangdong West Building 13-20 layer Co-patentee after: XUCHANG KETOP TESTING RESEARCH INSTITUTE CO.,LTD. Patentee after: POWER GRID TECHNOLOGY RESEARCH CENTER. CHINA SOUTHERN POWER GRID Co-patentee after: China South Power Grid International Co.,Ltd. Address before: Guangzhou City, Guangdong province Yuexiu District 510080 Dongfeng East Road, No. 8, 6 water Kong Guangdong West Building 13-20 layer Co-patentee before: XUCHANG KETOP TESTING TECHNOLOGY CO.,LTD. Patentee before: POWER GRID TECHNOLOGY RESEARCH CENTER. CHINA SOUTHERN POWER GRID Co-patentee before: China South Power Grid International Co.,Ltd. |
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Effective date of registration: 20210901 Address after: 510663 3 building, 3, 4, 5 and J1 building, 11 building, No. 11, Ke Xiang Road, Luogang District Science City, Guangzhou, Guangdong. Patentee after: China South Power Grid International Co.,Ltd. Patentee after: XUCHANG KETOP TESTING RESEARCH INSTITUTE CO.,LTD. Address before: 510080 floors 13-20, West Tower, Yuedian building, No. 6 and 8, shuijungang, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong Patentee before: POWER GRID TECHNOLOGY RESEARCH CENTER. CHINA SOUTHERN POWER GRID Patentee before: XUCHANG KETOP TESTING RESEARCH INSTITUTE CO.,LTD. Patentee before: China South Power Grid International Co.,Ltd. |