CN205545158U - Face down chip linear power amplifier of high yield and mobile terminal thereof - Google Patents
Face down chip linear power amplifier of high yield and mobile terminal thereof Download PDFInfo
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- CN205545158U CN205545158U CN201620394408.6U CN201620394408U CN205545158U CN 205545158 U CN205545158 U CN 205545158U CN 201620394408 U CN201620394408 U CN 201620394408U CN 205545158 U CN205545158 U CN 205545158U
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Abstract
The utility model discloses a face down chip linear power amplifier of high yield and mobile terminal thereof, characterized by set up the array of a NM parallel connection's of a M cascade amplification circuit in power amplifier's the output stage unit amplifying unit for linear range, corresponding ground wire GND flip -chip node linked to each other during each unit amplifying unit in the list array of linear range adopted face down chip technology and the projecting pole through its transistor or grid and a set of ground wire GND respectively, each unit amplifying unit in the list array of linear range adopts face down chip technology respectively and passes through the collecting electrode of its transistor or leak the level and links to each other with the corresponding power cord VCC flip -chip node of a set of power cord VCC. The utility model discloses can use the face down chip node of unified size to improve the node density of power amplifier ground connection to reach the mesh of high yield and high reliability.
Description
Technical field
This utility model relates to radio-frequency power amplifier, the employing upside-down mounting of a kind of high efficiency high yield high reliability
The power amplifier that can balance heat radiation of chip technology and mobile terminal thereof.
Background technology
Radio-frequency transmissions front-end module is the key components that rf terminal device realizes signal transmission.Current along with global radio communication
User quickly increases and the user's more high-end demand for experience to radio communication, and market is quick to the demand of the bandwidth of radio communication
Increase.In order to solve this market demand, global open private radio communication frequency range out is more and more and more and more crowded.
The modulation demodulation system that frequency range utilization rate is high, such as: WCDMA (the Wideband Code Division Multiple of 3G
Access, WCDMA), band CDMA (Code Division Multiple Access, CDMA), TD SDMA
(Time Division Synchronous Code Division Multiple Access, TD-SCDMA), and gradually replace 3G skill
Art becomes the Long term evolution, LTE of the 4G technology of the market mainstream and includes paired spectrum pattern (Frequency
Domain duplexing, FDD) and non-paired spectrum mode (Time domain duplexing, TDD).These frequency range utilization rates
High various modulation demodulation systems all propose higher requirement to wireless communication terminal, such as: high-quality voice call, reduce
Mistake in data communication, the switching of quick voice data transmission, etc..
For main force's components and parts radio-frequency power amplifier and module thereof of radio-frequency transmissions front end, it is meant that in new frequency range profit
With under the high modulation demodulation system of rate, power amplifier must have the higher linearity to ensure that radiofrequency signal can amplify transmission
And distorted signals can be lacked as far as possible.The high linearity of general power amplifier means that reducing its output reduces output crystalline substance
The generation of the non-linear harmonic wave of body tube device.Power amplifier is core parts during radio communication connects, and is with solely
The form of vertical module occurs among wireless communication system.Existing power amplifier typically uses multicomponent to be integrated in a base
Form a module (MCM) on plate, its module may comprise and be not limited to following multiple elements: power amplifier chip,
Power-mode control circuitry is typically CMOS technology, and output matching circuit can use passive discrete component or passive semiconductor device
Part, radio-frequency (RF) switch is typically with GaAs pHEMT technique or SOI technology.Each chip is basic with the connected mode of substrate
Having two kinds, a kind of is by the pad on fly line technology chip and the pad node on substrate, and another kind is flip-chip skill
Art is directly docked by scolding tin or copper post by the metal salient point on chip and the node on substrate.
As a example by common high-performance High Linear power amplifier output-stage connected mode, on market, existing major part linear power is put
Big device is by fly line technology, power amplifier chip to be realized being connected with substrate, and the biggest common configuration of the transistor is probably wafer
Through ground connection TWV.Fig. 1 is shown that the output stage amplifier circuit grounding design of the existing most linear power amplifiers in market.Figure
In 1 101,102 ..., (wherein P is integer, P=N for 10 (P-1), 10PM) be market common linear power amplifier output
Basic amplifying unit in level amplifying circuit, each unit can be made up of single-transistor and is likely to less substantially be amplified by multiple
Unit composes in parallel.111,112 ..., 11 (X-1), 11X (wherein X is integer) represent the ground on power amplifier chip
GND, is by the wafer of wafer substrate through ground connection TWV, in LDMOS GaAs HBT or pHEMT technique
It is the quasiconductor of degree of depth doping in technique, in CMOS technology, may be by the wafer through ground connection TWV of wafer substrate also
May be by the ground wire to substrate of pad bond pad fly line on chip.121,122 ..., 12 (J-1), 12J (wherein J
It is integer) represent pad bond pad on the chip of amplifier RF output, the voltage of output amplifier connects and radio frequency
Output is all to be connected to the load output matching network of amplifier by pad bond pad fly line on this J chip.NMIndividual amplification
Circuit elementary cell parallel connection is connected to ground GND shape by the emitter stage of HBT or the grid of pHEMT/LDMOS/CMOS
Become a NMCellular array, typically has 1 such array connection methods as shown in Figure 1.This array composition amplifier
Output stage amplifier circuit.GND (111-11X) is arranged in one group, connects emitter stage and the grid of all amplifying units of unique array
Pole.This GND group becomes parallel direction with pad bond pad on the radio frequency pio chip of 121-12J.Each array is put substantially
Pad on the chip of the Vcc/RFout that the colelctor electrode of big unit or drain electrode are connected to radio frequency output by the metal in chip technology
Bond pad 121-12J is as shown in Figure 1.This method of attachment is commonly used to the design of linear amplifier.But this wafer is through
Earthing mode radiating effect is the best, because the emitter stage of business HBT transistor is mostly in the superiors of transistor multi-layer material, and electricity
Stream needs to flow through the multilayer material under emitter by the emitting stage of transistor and includes ground level layer, collector layer, substrate
Layer, then by the coat of metal ground connection of wafer rear, a so long path can cause inductance and resistance excessive, thus
Heat transfer efficiency is very poor.
It is straight by the metal salient point on chip and the node on substrate that the common chip in another kind of market is connected by flip chip technology (fct)
Connected scolding tin or the docking of copper post.This mode is common in the high-performance processor chip of multi-pipe pin, and recent market gradually goes out
The circuit of existing power amplifier realizes power amplifier chip to be connected with substrate by flip chip technology (fct).This design is usually
Form as the fly line Joining Technology of figure 1 above directly arrives simply transforming of flip-chip.As shown in Figures 2 and 3, in Fig. 2 201,
202 ..., 301,302 in 20 (P-1), 20P (wherein P is integer) and Fig. 3 ..., (wherein P is whole for 30 (P-1), 30P
Number) it is the basic amplifying unit in the common linear power amplifier output stage amplifier circuit in market, each unit can be by monocrystal
Pipe composition is likely to be composed in parallel by multiple less basic amplifying units.In Fig. 2 in 211 and Fig. 3 311 represent merit
Upside-down mounting ground connection GND node on rate amplifier chip, each ellipse represents a big flip-chip node, these upside-down mountings
Chip ground node generally uses the most large-area scolding tin or copper post to reach more preferable radiating effect with expectation.In Fig. 2 221,
In Fig. 3 321,322 ..., 32 (J-1), 32J (wherein J is integer) represent falling on the chip of amplifier RF output
Dress node, the voltage of output amplifier connects and radio frequency output is all to be connected to amplify by upside-down mounting node on this J chip
The load output matching network of device.NMIndividual amplifying circuit elementary cell parallel connection by the emitter stage of HBT or
The grid of pHEMT/LDMOS/CMOS is connected to ground GND and forms a NMCellular array.This single array composition is put
Big device output stage amplifier circuit.In Fig. 2 in 211 and Fig. 3 311 are all big flip-chip ground nodes, should
Ground nodes connects emitter stage and the grid of all amplifying units of unique array.Length direction and radio frequency that this node is oval export
Flip-chip node array or node ellipse length direction becomes parallel direction.The current collection of basic amplifying unit in this amplifier array
Pole or drain electrode are connected to the flip chip on-chip node 221 of the Vcc/RFout of radio frequency output such as by the metal in chip technology
Shown in Fig. 2 or 321-32J as shown in Figure 3.But the shortcoming of this design is owing to flip-chip size of node differs,
Cause the substrate after upside-down mounting and chip discontinuity, the ground connection of most important node each cascaded stages level of especially power amplifier
Node usually because chip semiconductor material is passed in surface excessive stresses effect, causes the fracture in chip semiconductor material layer, from
And cause the reduction of product yield, in some instances it may even be possible to reduce the reliability of product.
Utility model content
In place of this utility model is for solving above-mentioned the deficiencies in the prior art, it is provided that falling of a kind of high yield balancing heat radiation
Cartridge chip linear power amplifier and mobile terminal thereof, to using the flip-chip node of unified size to improve power amplification
The node density of device ground connection, thus reach the purpose of high yield and high reliability.
This utility model adopts the following technical scheme that for solving technical problem
The linear power amplifier of the flip-chip of a kind of high yield of this utility model, including: M level Cascaded amplification circuit and output
Match circuit；The amplifying circuit of the i-th cascade of described M level Cascaded amplification circuit comprises NiThe individual unit being connected in parallel is amplified
Unit；1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of described M level Cascaded amplification circuit is into and through NiIndividual
After the amplification of the unit amplifying unit being connected in parallel, then the input exporting the amplifying circuit to i+1 cascade is amplified,
Until after the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to described output matching circuit；
Described output matching circuit exports to antenna after described Cascaded amplification signal is carried out load optimized coupling, is characterized in:
The N of m-th Cascaded amplification circuit in the output stage of described power amplifier is setMThe individual unit being connected in parallel is amplified single
Unit is an array of linear array；
One group of ground wire GND is set；Described ground wire GND is formed a line by several flip-chip nodes and forms；
One group of power line VCC is set；And described power line VCC is parallel to each other with described one group of ground wire GND；Described one group
Power line VCC is the output lead of m-th Cascaded amplification circuit, and is formed a line by several flip-chip nodes and form；
Each unit amplifying unit in the single array of described linear array is respectively adopted controlled collapsible chip connec-tion and by its crystal
The emitter stage of pipe or the grid ground wire GND upside-down mounting node corresponding with described one group of ground wire GND is connected；
Each unit amplifying unit in the single array of described linear array is respectively adopted controlled collapsible chip connec-tion and by its crystal
The colelctor electrode of pipe or the drain power line VCC upside-down mounting node corresponding for power line VCC with a group are connected.
The feature of the linear power amplifier of the flip-chip of high yield described in the utility model lies also in:
All upside-down mounting node size in described power amplifier are the most identical.
The feature of a kind of mobile terminal of this utility model is: use described power amplifier.
Compared with the prior art, this utility model has the beneficial effect that:
1, comparing most of power amplifiers on market uses fly line to connect and for the through ground connection of wafer, of the present utility model
Flip-chip power amplifier uses the upside-down mounting node of unified size, and upside-down mounting connects signal and the heat radiation grounding design of amplifier,
This design not only decreases the use of fly line, decreases the area of power amplifier chip, and decreases the area of module,
Resistance and the inductance of ground connection can be greatly reduced simultaneously, thus improve the heat transfer efficiency of amplifier, it is possible to increase the effect of amplifier
Rate, makes module product integrated level higher, and cost is lower.
2, flip-chip of the present utility model uses the upside-down mounting node of unified size, uses high density at power amplifier ground connection
Multinode replaces existing big node inversely installed power amplifier design, thus is realizing the basis of equilibrium heat radiation grounding design
On, the uneven distribution of the semiconductor surface stress produced after decreasing upside-down mounting, directly enhance and use this controlled collapsible chip connec-tion
The product yield of power amplifier batch production.Due to the minimizing of semiconductor surface stress thus decrease quasiconductor inner layers of material
Fracture, the reliability of power amplifier product using controlled collapsible chip connec-tion can be improved.This reverse installation process reduces partly leads
The junction temperature of body transistor, thus improve the efficiency of power amplifier.In actual applications, this reverse installation process can more balance
Heat radiation, simultaneously can save chip area.
3, the linear amplifier design in the such scheme of market is for 3G circuit, or 4G networking, this utility model
Power amplifier can be by controlled collapsible chip connec-tion and use unified upside-down mounting node size, in the amount not affecting this amplifier
On the basis of producing yield and product reliability, keeping in the linearity performance designed, by improving power amplification simultaneously
The heat dispersion of device can improve this power amplifier efficiency in different modes and/or under different communication standard.
4, using the mobile terminal in existing scheme on market, every grade needs multiple power amplifier circuits to carry out turning of implementation pattern
Change.Many power amplifiers of the present utility model, can make mobile terminal reduce area/volume, can save the cost of mobile terminal,
Simultaneously because output stage amplifier can be symmetrical dispel the heat in ground wire two lateral balance, thus improve mobile terminal the linearity and
The efficiency of mobile terminal.
Accompanying drawing explanation
Fig. 1 is existing fly line technology linear power amplifiers output stage amplifier circuit wafer through ground connection schematic diagram；
Fig. 2 is existing flip chip technology (fct) linear power amplifiers output stage big node ground connection schematic diagram；
Fig. 3 is that the existing flip chip technology (fct) linear power amplifiers output stage big node big node of ground connection connects power line schematic diagram；
Fig. 4 is this utility model flip chip technology (fct) linear power amplifier output stage multinode ground connection schematic diagram；
Fig. 5 is the few node ground connection schematic diagram of this utility model flip chip technology (fct) linear power amplifier output stage.
Fig. 6 a is the signal of existing flip chip technology (fct) linear power amplifiers output stage big node ground connection entirety domain upside-down mounting node
Figure；
Fig. 6 b is this utility model flip chip technology (fct) linear power amplifier output stage multinode ground connection entirety domain upside-down mounting node
Schematic diagram；
Detailed description of the invention
In the present embodiment, the linear mould power amplifier of the flip-chip of a kind of how high yield, is the amplification electricity utilizing at least two-stage
Road connects in cascaded fashion, is attached power amplifier and substrate by the technology of flip-chip, to levels at different levels in amplifier
Connection amplifying circuit earthing mode realizes the high performance heat radiation of power amplifier with the method for designing unifying size high density node upside-down mounting.
This power amplifier is owing to have employed flip chip technology (fct), and output-stage circuit can significantly more efficient ground connection dispel the heat, it is achieved thereby that
One design that can balance heat radiation more efficiently, improves the efficiency of amplifier on the premise of the hold amplifier linearity.
Specifically, this multimode power amplifier includes: M level Cascaded amplification circuit and output matching circuit；M level therein cascades
The amplifying circuit of the i-th cascade of amplifying circuit comprises NiThe individual unit amplifying unit being connected in parallel；1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of M level Cascaded amplification circuit is into and through NiIndividual parallel connection
After the amplification of the unit amplifying unit connected, then the input exporting the amplifying circuit to i+1 cascade is amplified, until
After the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to output matching circuit；
Output matching circuit exports to antenna after Cascaded amplification signal is carried out load optimized coupling.
The fly line Joining Technology that the linear power amplifier being different from the existing most of mobile phone wireless communication plans in market uses, with
And the through earthing mode of wafer to dispel the heat to power amplifier.As shown in Figure 4, in the present embodiment, the upside-down mounting of a kind of high yield
The linear power amplifier of chip uses flip chip technology (fct) and keeps upside-down mounting node size consistent, uses high density multinode
Amplifier ground radiating mode.
The N of m-th Cascaded amplification circuit in power amplifier output-stage is setMThe individual unit amplifying unit being connected in parallel is line
One array of shape arrangement；This array comprises NMThe individual unit amplifying unit being connected in parallel, and each amplifying unit is by upside-down mounting core
Blade technolgy is connected respectively on corresponding ground nodes, and this ground nodes is connected to the ground of substrate by string scolding tin or copper post
On line.
This group ground wire GND is formed a line by X upside-down mounting node and forms；X is that arbitrary integer according to circuit chip area and dissipates
Depending on heat needs.
Each unit amplifying unit in the linear single array of this power amplifier is respectively by emitter stage or the grid of its transistor
The pole ground wire GND upside-down mounting node corresponding with this group ground wire GND is connected；
Each unit amplifying unit in the single array of this power amplifier is respectively by colelctor electrode or the drain and of its transistor
Power line VCC upside-down mounting node corresponding for group power line VCC is connected；
This group power line VCC is the output lead of m-th Cascaded amplification circuit, and is formed a line by upside-down mounting node on J chip
Composition；Wherein J is integer, and J > 3, generally its quantity by chip area and to power output matching demand and load output
Impedance optimizing regulation is determined；
All upside-down mounting node size in power amplifier are the most identical, and power amplifier grounding connection uses high density multinode method
Realization connects high-efficiency heat conduction.
This group ground wire and this group power line VCC are for be arrangeding in parallel.
In addition this utility model uses the upside-down mounting node of unified size as shown in Figures 4 and 5, and this is with existing flip chip power
Amplifier design uses big upside-down mounting node (211 in Fig. 2,311 in 221 Fig. 3) different as shown in Figures 2 and 3.
In whole power amplifier chip domain upside-down mounting node schematic diagram, such as Fig. 6 a, shown in 6b, 601,602 ... represent chip
Upper all of upside-down mounting node, wherein 604 in Fig. 6 a are power amplifier upside-down mounting ground nodes, and other is all signal node；Its
In middle Fig. 6 b 604,605,606,607 are power amplifier upside-down mounting ground nodes, and other is all signal node.With existing
The big node that uses of flip-chip power amplifier design power amplifier ground connection as shown in Figure 6 a (in Fig. 6 a
604) different, this utility model uses the upside-down mounting node of unified size as shown in Figure 6 b, and power amplifier of the present utility model connects
Ground upside-down mounting node (in such as Fig. 6 b 604,605,606,607) is consistent with other upside-down mounting node size on chip, simply
This utility model uses the design of local multinode high density node to improve the ground connection heat of power amplifier power amplifier ground connection
Conductance, the emitter current of the power amplifier HBT transistor of the flip-chip of this utility model application flows out and directly passes through scolding tin
Or copper post substantially increases the heat transfer efficiency of amplifier to substrate ground, shorter thermal conductance path, thus reduces this power and put
The junction temperature of big device semiconductor transistor, thus improve the efficiency of power amplifier.In actual applications, this flip-chip
Earthing mode can also save the area of chip area and module.
This utility model output stage amplifier circuit uses the connected mode of the brand-new local height just ground connection of density multinode.Wherein
The design of multi-stage cascade power amplifier can be the semiconductor technology of any applicable amplifier, such as, can include and be not limited to
The technology of CMOS, the technology of SOI, the technology of GaAs HBT, the technology of GaAs pHEMT, the technology of GaN HEMT,
The technology of LDMOS, it might even be possible to be that the first order amplifying circuit of the combination of multiple semiconductor technology, such as amplifier is by CMOS
Or SOI technology design, second level amplifying circuit is by GaAs HBT Technology design.The wherein resistance in load output matching circuit
Anti-element can be passive discrete component, or passive element based on semiconductor integration technology, or based on substrate process,
But it is not limited to above-mentioned implementation, it is also possible to be the combination of above-mentioned multiple technologies.
This utility model is mainly applied and can be included being not limited to mobile phone, panel computer, notebook at rf terminal equipment
Computer, the Wireless Telecom Equipment of vehicle electronics, Wireless Telecom Equipment of Internet of Things etc..Multimode the most of the present utility model is amplified
Device and module thereof can also be applied among other Wireless Telecom Equipment, including being not limited to communication base station, and satellite wireless communication,
Military Wireless Telecom Equipment etc..Therefore the technical scheme that this utility model is proposed, can apply to need many power modes and
The adjustable any wireless communication terminal of bandwidth of operation, and do not limited by concrete communications band.Any at physical circuit or chip
Change in layout way of realization, within being included in the covering scope of this patent.
Claims (3)
1. a flip-chip linear power amplifier for high yield, including: M level Cascaded amplification circuit and output matching circuit；The amplifying circuit of the i-th cascade of described M level Cascaded amplification circuit comprises NiThe individual unit amplifying unit being connected in parallel；1≤i≤M and M >=2；
The input of the amplifying circuit that radiofrequency signal cascades from the i-th of described M level Cascaded amplification circuit is into and through NiAfter the amplification of the individual unit amplifying unit being connected in parallel, then the input exporting the amplifying circuit to i+1 cascade is amplified, until after the amplification of the amplifying circuit of m-th cascade, it is thus achieved that Cascaded amplification signal also passes to described output matching circuit；
Described output matching circuit exports to antenna after described Cascaded amplification signal is carried out load optimized coupling, it is characterized in that:
The N of m-th Cascaded amplification circuit in the output stage of described power amplifier is setMIndividual unit amplifying unit is linear array the array being connected in parallel；
One group of ground wire GND is set；Described ground wire GND is formed a line by several flip-chip nodes and forms；
One group of power line VCC is set；And described power line VCC is parallel to each other with described one group of ground wire GND；Described one group of power line VCC is the output lead of m-th Cascaded amplification circuit, and is formed a line by several flip-chip nodes and form；
Each unit amplifying unit in the single array of described linear array is respectively adopted controlled collapsible chip connec-tion and is connected by the ground wire GND upside-down mounting node that the emitter stage of its transistor or grid are corresponding with described one group of ground wire GND；
Each unit amplifying unit in the single array of described linear array is respectively adopted controlled collapsible chip connec-tion and is connected by the power line VCC upside-down mounting node that the colelctor electrode of its transistor or drain are corresponding for power line VCC with a group.
The flip-chip linear power amplifier of high yield the most according to claim 1, is characterized in that: all upside-down mounting node size in described power amplifier are the most identical.
3. a mobile terminal, is characterized in that: use power amplifier as claimed in claim 1 or 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620394408.6U CN205545158U (en) | 2016-05-04 | 2016-05-04 | Face down chip linear power amplifier of high yield and mobile terminal thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620394408.6U CN205545158U (en) | 2016-05-04 | 2016-05-04 | Face down chip linear power amplifier of high yield and mobile terminal thereof |
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| Publication Number | Publication Date |
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| CN205545158U true CN205545158U (en) | 2016-08-31 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201620394408.6U Withdrawn - After Issue CN205545158U (en) | 2016-05-04 | 2016-05-04 | Face down chip linear power amplifier of high yield and mobile terminal thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105897178A (en) * | 2016-05-04 | 2016-08-24 | 苏州雷诚芯微电子有限公司 | High-yield flip chip linear power amplifier and application thereof |
-
2016
- 2016-05-04 CN CN201620394408.6U patent/CN205545158U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105897178A (en) * | 2016-05-04 | 2016-08-24 | 苏州雷诚芯微电子有限公司 | High-yield flip chip linear power amplifier and application thereof |
| CN105897178B (en) * | 2016-05-04 | 2018-09-11 | 苏州雷诚芯微电子有限公司 | A kind of flip-chip linear power amplifier of high yield and its application |
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|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20160831 Effective date of abandoning: 20180911 |
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| AV01 | Patent right actively abandoned |